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From: Tzung-Bi Shih <tzungbi@google.com>
To: Kewei Xu <kewei.xu@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
	wsa@the-dreams.de, robh+dt@kernel.org, linux-i2c@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
	srv_heupstream@mediatek.com, leilk.liu@mediatek.com,
	qii.wang@mediatek.com, qiangming.xia@mediatek.com,
	liguo.zhang@mediatek.com
Subject: Re: [PATCH 2/3] i2c: mediatek: Dump i2c/dma register when a timeout occurs
Date: Tue, 29 Jun 2021 12:19:12 +0800	[thread overview]
Message-ID: <CA+Px+wU8qqEDU+bV0QpoJssNOxebutzRGgHo6WpC9VFJwckKKQ@mail.gmail.com> (raw)
In-Reply-To: <1623206624.14050.10.camel@mhfsdcap03>

On Wed, Jun 9, 2021 at 10:44 AM Kewei Xu <kewei.xu@mediatek.com> wrote:
>
> On Tue, 2021-06-08 at 16:01 +0200, Matthias Brugger wrote:
> > Is this offset only for mt8192 or also for mt8183?
> > In any case that should go in as another patch. Either a fix or a new
> > mt_i2c_regs_v3[]
>
> This offset value is suitable for the IC of mt_i2c_regs_v2 hardware
> design similar to mt8192/8195, not for 8183.
>
> The reason for the modification here is that the previous
> offset information is incorrect, OFFSET_DEBUGSTAT = 0XE4 is
> the correct value.

Please submit another patch for fixing the incorrect value.

WARNING: multiple messages have this Message-ID (diff)
From: Tzung-Bi Shih <tzungbi@google.com>
To: Kewei Xu <kewei.xu@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
	wsa@the-dreams.de, robh+dt@kernel.org,
	 linux-i2c@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	 linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
	 leilk.liu@mediatek.com, qii.wang@mediatek.com,
	qiangming.xia@mediatek.com,  liguo.zhang@mediatek.com
Subject: Re: [PATCH 2/3] i2c: mediatek: Dump i2c/dma register when a timeout occurs
Date: Tue, 29 Jun 2021 12:19:12 +0800	[thread overview]
Message-ID: <CA+Px+wU8qqEDU+bV0QpoJssNOxebutzRGgHo6WpC9VFJwckKKQ@mail.gmail.com> (raw)
In-Reply-To: <1623206624.14050.10.camel@mhfsdcap03>

On Wed, Jun 9, 2021 at 10:44 AM Kewei Xu <kewei.xu@mediatek.com> wrote:
>
> On Tue, 2021-06-08 at 16:01 +0200, Matthias Brugger wrote:
> > Is this offset only for mt8192 or also for mt8183?
> > In any case that should go in as another patch. Either a fix or a new
> > mt_i2c_regs_v3[]
>
> This offset value is suitable for the IC of mt_i2c_regs_v2 hardware
> design similar to mt8192/8195, not for 8183.
>
> The reason for the modification here is that the previous
> offset information is incorrect, OFFSET_DEBUGSTAT = 0XE4 is
> the correct value.

Please submit another patch for fixing the incorrect value.

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Tzung-Bi Shih <tzungbi@google.com>
To: Kewei Xu <kewei.xu@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
	wsa@the-dreams.de, robh+dt@kernel.org,
	 linux-i2c@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	 linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
	 leilk.liu@mediatek.com, qii.wang@mediatek.com,
	qiangming.xia@mediatek.com,  liguo.zhang@mediatek.com
Subject: Re: [PATCH 2/3] i2c: mediatek: Dump i2c/dma register when a timeout occurs
Date: Tue, 29 Jun 2021 12:19:12 +0800	[thread overview]
Message-ID: <CA+Px+wU8qqEDU+bV0QpoJssNOxebutzRGgHo6WpC9VFJwckKKQ@mail.gmail.com> (raw)
In-Reply-To: <1623206624.14050.10.camel@mhfsdcap03>

On Wed, Jun 9, 2021 at 10:44 AM Kewei Xu <kewei.xu@mediatek.com> wrote:
>
> On Tue, 2021-06-08 at 16:01 +0200, Matthias Brugger wrote:
> > Is this offset only for mt8192 or also for mt8183?
> > In any case that should go in as another patch. Either a fix or a new
> > mt_i2c_regs_v3[]
>
> This offset value is suitable for the IC of mt_i2c_regs_v2 hardware
> design similar to mt8192/8195, not for 8183.
>
> The reason for the modification here is that the previous
> offset information is incorrect, OFFSET_DEBUGSTAT = 0XE4 is
> the correct value.

Please submit another patch for fixing the incorrect value.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-06-29  4:19 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08  3:16 [PATCH 0/3] add i2c support for mt8195 Kewei Xu
2021-06-08  3:16 ` Kewei Xu
2021-06-08  3:16 ` Kewei Xu
2021-06-08  3:16 ` [PATCH 1/3] dt-bindings: i2c: update bindings for MT8195 SoC Kewei Xu
2021-06-08  3:16   ` Kewei Xu
2021-06-08  3:16   ` Kewei Xu
2021-06-08 13:59   ` Matthias Brugger
2021-06-08 13:59     ` Matthias Brugger
2021-06-08 13:59     ` Matthias Brugger
2021-06-18 20:27   ` Rob Herring
2021-06-18 20:27     ` Rob Herring
2021-06-18 20:27     ` Rob Herring
2021-06-08  3:16 ` [PATCH 2/3] i2c: mediatek: Dump i2c/dma register when a timeout occurs Kewei Xu
2021-06-08  3:16   ` Kewei Xu
2021-06-08  3:16   ` Kewei Xu
2021-06-08 14:01   ` Matthias Brugger
2021-06-08 14:01     ` Matthias Brugger
2021-06-08 14:01     ` Matthias Brugger
2021-06-09  2:43     ` Kewei Xu
2021-06-09  2:43       ` Kewei Xu
2021-06-09  2:43       ` Kewei Xu
2021-06-29  4:19       ` Tzung-Bi Shih [this message]
2021-06-29  4:19         ` Tzung-Bi Shih
2021-06-29  4:19         ` Tzung-Bi Shih
2021-06-29 12:12         ` Kewei Xu
2021-06-29 12:12           ` Kewei Xu
2021-06-29 12:12           ` Kewei Xu
2021-06-08  3:16 ` [PATCH 3/3] i2c: mediatek: Reset the handshake signal between i2c and dma Kewei Xu
2021-06-08  3:16   ` Kewei Xu
2021-06-08  3:16   ` Kewei Xu

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