[PATCH 0/2] Add support to identify RZ/Five SoC

[PATCH 0/2] Add support to identify RZ/Five SoC

[Lad Prabhakar]

Hi All,

This patch series adds support to identify the Renesas RZ/Five SoC.

Below is the output tested on SMARC EVK based on RZ/Five SoC:
/ # dmesg  | grep Detect
[    0.065484] Detected Renesas RZ/Five r9a07g043 Rev 0
/ # cat /sys/devices/soc0/family
RZ/Five
/ # cat /sys/devices/soc0/machine
Renesas SMARC EVK based on r9a07g043
/ # cat /sys/devices/soc0/revision
0
/ # cat /sys/devices/soc0/soc_id
r9a07g043
/ # 

Cheers,
Prabhakar

Lad Prabhakar (2):
  dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/Five SoC
  soc: renesas: Identify RZ/Five SoC

 .../soc/renesas/renesas,rzg2l-sysc.yaml       | 56 +++++++++++++------
 drivers/soc/renesas/Kconfig                   | 10 ++++
 drivers/soc/renesas/renesas-soc.c             | 14 +++++
 3 files changed, 63 insertions(+), 17 deletions(-)

-- 
2.25.1

[PATCH 1/2] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/Five SoC

[Lad Prabhakar]

Document RZ/Five (R9A07G043) SYSC bindings. SYSC block found on the
RZ/Five SoC is almost identical to one found on the RZ/G2L (and alike)
SoC's. To differentiate RZ/G2UL from RZ/Five, "-rzfive" is included in
the compatible string for the RZ/Five SoC as there are no interrupts
from the SYSC block to the core.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../soc/renesas/renesas,rzg2l-sysc.yaml       | 56 +++++++++++++------
 1 file changed, 39 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
index ce2875c89329..bdaf05f8b29b 100644
--- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
@@ -20,35 +20,57 @@ description:
 properties:
   compatible:
     enum:
-      - renesas,r9a07g043-sysc # RZ/G2UL
-      - renesas,r9a07g044-sysc # RZ/G2{L,LC}
-      - renesas,r9a07g054-sysc # RZ/V2L
+      - renesas,r9a07g043-rzfive-sysc # RZ/Five
+      - renesas,r9a07g043-sysc        # RZ/G2UL
+      - renesas,r9a07g044-sysc        # RZ/G2{L,LC}
+      - renesas,r9a07g054-sysc        # RZ/V2L
 
   reg:
     maxItems: 1
 
-  interrupts:
-    items:
-      - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
-      - description: CA55 Software Standby Mode release request interrupt
-      - description: CM33 Software Standby Mode release request interrupt
-      - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
+  interrupts: true
 
-  interrupt-names:
-    items:
-      - const: lpm_int
-      - const: ca55stbydone_int
-      - const: cm33stbyr_int
-      - const: ca55_deny
+  interrupt-names: true
 
 required:
   - compatible
   - reg
-  - interrupts
-  - interrupt-names
 
 additionalProperties: false
 
+allOf:
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - renesas,r9a07g043-rzfive-sysc
+    then:
+      properties:
+        interrupts:
+          items:
+            - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
+            - description: CA55 Software Standby Mode release request interrupt
+            - description: CM33 Software Standby Mode release request interrupt
+            - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
+
+        interrupt-names:
+          items:
+            - const: lpm_int
+            - const: ca55stbydone_int
+            - const: cm33stbyr_int
+            - const: ca55_deny
+
+      required:
+        - interrupts
+        - interrupt-names
+
+    else:
+      properties:
+        interrupts: false
+        interrupt-names: false
+
 examples:
   - |
     #include <dt-bindings/interrupt-controller/arm-gic.h>
-- 
2.25.1

[PATCH 2/2] soc: renesas: Identify RZ/Five SoC

[Lad Prabhakar]

Add support for identifying the (R9A07G043) RZ/Five SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/soc/renesas/Kconfig       | 10 ++++++++++
 drivers/soc/renesas/renesas-soc.c | 14 ++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 390f52109cb7..2e3508fbae53 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -333,6 +333,16 @@ config ARCH_R9A09G011
 
 endif # ARM64
 
+if RISCV
+
+config ARCH_R9A07G043
+	bool "RISCV Platform support for RZ/Five"
+	select ARCH_RZG2L
+	help
+	  This enables support for the Renesas RZ/Five SoC.
+
+endif # RISCV
+
 config RST_RCAR
 	bool "Reset Controller support for R-Car" if COMPILE_TEST
 
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index d171f1b635c7..1a31692fc884 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -50,6 +50,10 @@ static const struct renesas_family fam_rza2 __initconst __maybe_unused = {
 	.name	= "RZ/A2",
 };
 
+static const struct renesas_family fam_rzfive __initconst __maybe_unused = {
+	.name	= "RZ/Five",
+};
+
 static const struct renesas_family fam_rzg1 __initconst __maybe_unused = {
 	.name	= "RZ/G1",
 	.reg	= 0xff000044,		/* PRR (Product Register) */
@@ -102,6 +106,11 @@ static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
 	.id	= 0x40,
 };
 
+static const struct renesas_soc soc_rz_five __initconst __maybe_unused = {
+	.family = &fam_rzfive,
+	.id     = 0x847c447,
+};
+
 static const struct renesas_soc soc_rz_g1h __initconst __maybe_unused = {
 	.family	= &fam_rzg1,
 	.id	= 0x45,
@@ -358,8 +367,12 @@ static const struct of_device_id renesas_socs[] __initconst = {
 	{ .compatible = "renesas,r8a779g0",	.data = &soc_rcar_v4h },
 #endif
 #if defined(CONFIG_ARCH_R9A07G043)
+#ifdef CONFIG_RISCV
+	{ .compatible = "renesas,r9a07g043",	.data = &soc_rz_five },
+#else
 	{ .compatible = "renesas,r9a07g043",	.data = &soc_rz_g2ul },
 #endif
+#endif
 #if defined(CONFIG_ARCH_R9A07G044)
 	{ .compatible = "renesas,r9a07g044",	.data = &soc_rz_g2l },
 #endif
@@ -398,6 +411,7 @@ static const struct renesas_id id_prr __initconst = {
 
 static const struct of_device_id renesas_ids[] __initconst = {
 	{ .compatible = "renesas,bsid",			.data = &id_bsid },
+	{ .compatible = "renesas,r9a07g043-rzfive-sysc", .data = &id_rzg2l },
 	{ .compatible = "renesas,r9a07g043-sysc",	.data = &id_rzg2l },
 	{ .compatible = "renesas,r9a07g044-sysc",	.data = &id_rzg2l },
 	{ .compatible = "renesas,r9a07g054-sysc",	.data = &id_rzg2l },
-- 
2.25.1

Re: [PATCH 1/2] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/Five SoC

[Geert Uytterhoeven]

Hi Prabhakar,

On Fri, Jul 22, 2022 at 12:15 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Document RZ/Five (R9A07G043) SYSC bindings. SYSC block found on the
> RZ/Five SoC is almost identical to one found on the RZ/G2L (and alike)
> SoC's. To differentiate RZ/G2UL from RZ/Five, "-rzfive" is included in
> the compatible string for the RZ/Five SoC as there are no interrupts
> from the SYSC block to the core.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> ---
>  .../soc/renesas/renesas,rzg2l-sysc.yaml       | 56 +++++++++++++------
>  1 file changed, 39 insertions(+), 17 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> index ce2875c89329..bdaf05f8b29b 100644
> --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> @@ -20,35 +20,57 @@ description:
>  properties:
>    compatible:
>      enum:
> -      - renesas,r9a07g043-sysc # RZ/G2UL
> -      - renesas,r9a07g044-sysc # RZ/G2{L,LC}
> -      - renesas,r9a07g054-sysc # RZ/V2L
> +      - renesas,r9a07g043-rzfive-sysc # RZ/Five

renesas,r9a07g043f-sysc?

But I'm wondering if we really need a different compatible value?
It looks like both blocks differ only in external wiring, so if
anything needs to be handled differently (the removed/added registers
are related to CPU topology), that can be inferred from the system
topology (or even #ifdef CONFIG_{ARM64,RISCV} ;-)

> +      - renesas,r9a07g043-sysc        # RZ/G2UL
> +      - renesas,r9a07g044-sysc        # RZ/G2{L,LC}
> +      - renesas,r9a07g054-sysc        # RZ/V2L
>
>    reg:
>      maxItems: 1
>
> -  interrupts:
> -    items:
> -      - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
> -      - description: CA55 Software Standby Mode release request interrupt
> -      - description: CM33 Software Standby Mode release request interrupt
> -      - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
> +  interrupts: true
>
> -  interrupt-names:
> -    items:
> -      - const: lpm_int
> -      - const: ca55stbydone_int
> -      - const: cm33stbyr_int
> -      - const: ca55_deny
> +  interrupt-names: true
>
>  required:
>    - compatible
>    - reg
> -  - interrupts
> -  - interrupt-names
>
>  additionalProperties: false
>
> +allOf:
> +  - if:
> +      not:
> +        properties:
> +          compatible:
> +            contains:
> +              enum:
> +                - renesas,r9a07g043-rzfive-sysc
> +    then:
> +      properties:
> +        interrupts:
> +          items:
> +            - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
> +            - description: CA55 Software Standby Mode release request interrupt
> +            - description: CM33 Software Standby Mode release request interrupt
> +            - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
> +
> +        interrupt-names:
> +          items:
> +            - const: lpm_int
> +            - const: ca55stbydone_int
> +            - const: cm33stbyr_int
> +            - const: ca55_deny
> +
> +      required:
> +        - interrupts
> +        - interrupt-names
> +
> +    else:
> +      properties:
> +        interrupts: false
> +        interrupt-names: false

Do all interrupts{,-names} have to be moved?
Wouldn't it be sufficient to just have

    if [...]
    then:
        required:
          - interrupts
          - interrupt-names
    else:
        properties:
            interrupts: false
            interrupt-names: false

?

But again, without a new compatible value, you could just make
interrupts{,-names} not required?

> +
>  examples:
>    - |
>      #include <dt-bindings/interrupt-controller/arm-gic.h>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/2] soc: renesas: Identify RZ/Five SoC

[Geert Uytterhoeven]

Hi Prabhakar,

On Fri, Jul 22, 2022 at 12:12 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add support for identifying the (R9A07G043) RZ/Five SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/drivers/soc/renesas/Kconfig
> +++ b/drivers/soc/renesas/Kconfig
> @@ -333,6 +333,16 @@ config ARCH_R9A09G011
>
>  endif # ARM64
>
> +if RISCV
> +
> +config ARCH_R9A07G043
> +       bool "RISCV Platform support for RZ/Five"

RISC-V

> +       select ARCH_RZG2L
> +       help
> +         This enables support for the Renesas RZ/Five SoC.
> +
> +endif # RISCV
> +
>  config RST_RCAR
>         bool "Reset Controller support for R-Car" if COMPILE_TEST
>

> @@ -102,6 +106,11 @@ static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
>         .id     = 0x40,
>  };
>
> +static const struct renesas_soc soc_rz_five __initconst __maybe_unused = {
> +       .family = &fam_rzfive,
> +       .id     = 0x847c447,

The Hardware User's Manual Rev.1.00 says H’x841_C447?

> @@ -398,6 +411,7 @@ static const struct renesas_id id_prr __initconst = {
>
>  static const struct of_device_id renesas_ids[] __initconst = {
>         { .compatible = "renesas,bsid",                 .data = &id_bsid },
> +       { .compatible = "renesas,r9a07g043-rzfive-sysc", .data = &id_rzg2l },
>         { .compatible = "renesas,r9a07g043-sysc",       .data = &id_rzg2l },
>         { .compatible = "renesas,r9a07g044-sysc",       .data = &id_rzg2l },
>         { .compatible = "renesas,r9a07g054-sysc",       .data = &id_rzg2l },

This change might not be needed (cfr. my comments on patch 1/2).

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/2] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/Five SoC

[Lad, Prabhakar]

Hi Geert,

Thank you for the review.

On Fri, Jul 22, 2022 at 10:31 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Jul 22, 2022 at 12:15 AM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > Document RZ/Five (R9A07G043) SYSC bindings. SYSC block found on the
> > RZ/Five SoC is almost identical to one found on the RZ/G2L (and alike)
> > SoC's. To differentiate RZ/G2UL from RZ/Five, "-rzfive" is included in
> > the compatible string for the RZ/Five SoC as there are no interrupts
> > from the SYSC block to the core.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > ---
> >  .../soc/renesas/renesas,rzg2l-sysc.yaml       | 56 +++++++++++++------
> >  1 file changed, 39 insertions(+), 17 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> > index ce2875c89329..bdaf05f8b29b 100644
> > --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> > +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> > @@ -20,35 +20,57 @@ description:
> >  properties:
> >    compatible:
> >      enum:
> > -      - renesas,r9a07g043-sysc # RZ/G2UL
> > -      - renesas,r9a07g044-sysc # RZ/G2{L,LC}
> > -      - renesas,r9a07g054-sysc # RZ/V2L
> > +      - renesas,r9a07g043-rzfive-sysc # RZ/Five
>
> renesas,r9a07g043f-sysc?
>
Agreed.

> But I'm wondering if we really need a different compatible value?
> It looks like both blocks differ only in external wiring, so if
> anything needs to be handled differently (the removed/added registers
> are related to CPU topology), that can be inferred from the system
> topology (or even #ifdef CONFIG_{ARM64,RISCV} ;-)
>
Good point, but I wonder if we would end up in too many #ifdef
CONFIG_{ARM64,RISCV} checks. If thats OK I will stick with
"renesas,r9a07g043-sysc"

> > +      - renesas,r9a07g043-sysc        # RZ/G2UL
> > +      - renesas,r9a07g044-sysc        # RZ/G2{L,LC}
> > +      - renesas,r9a07g054-sysc        # RZ/V2L
> >
> >    reg:
> >      maxItems: 1
> >
> > -  interrupts:
> > -    items:
> > -      - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
> > -      - description: CA55 Software Standby Mode release request interrupt
> > -      - description: CM33 Software Standby Mode release request interrupt
> > -      - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
> > +  interrupts: true
> >
> > -  interrupt-names:
> > -    items:
> > -      - const: lpm_int
> > -      - const: ca55stbydone_int
> > -      - const: cm33stbyr_int
> > -      - const: ca55_deny
> > +  interrupt-names: true
> >
> >  required:
> >    - compatible
> >    - reg
> > -  - interrupts
> > -  - interrupt-names
> >
> >  additionalProperties: false
> >
> > +allOf:
> > +  - if:
> > +      not:
> > +        properties:
> > +          compatible:
> > +            contains:
> > +              enum:
> > +                - renesas,r9a07g043-rzfive-sysc
> > +    then:
> > +      properties:
> > +        interrupts:
> > +          items:
> > +            - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
> > +            - description: CA55 Software Standby Mode release request interrupt
> > +            - description: CM33 Software Standby Mode release request interrupt
> > +            - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
> > +
> > +        interrupt-names:
> > +          items:
> > +            - const: lpm_int
> > +            - const: ca55stbydone_int
> > +            - const: cm33stbyr_int
> > +            - const: ca55_deny
> > +
> > +      required:
> > +        - interrupts
> > +        - interrupt-names
> > +
> > +    else:
> > +      properties:
> > +        interrupts: false
> > +        interrupt-names: false
>
> Do all interrupts{,-names} have to be moved?
> Wouldn't it be sufficient to just have
>
Agreed.

>     if [...]
>     then:
>         required:
>           - interrupts
>           - interrupt-names
>     else:
>         properties:
>             interrupts: false
>             interrupt-names: false
>
> ?
>
> But again, without a new compatible value, you could just make
> interrupts{,-names} not required?
>
You mean we just make it optional for all the SoC's?

Cheers,
Prabhakar

Re: [PATCH 1/2] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/Five SoC

[Geert Uytterhoeven]

Hi Prabhakar,

On Fri, Jul 22, 2022 at 12:21 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Fri, Jul 22, 2022 at 10:31 AM Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> > On Fri, Jul 22, 2022 at 12:15 AM Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > > Document RZ/Five (R9A07G043) SYSC bindings. SYSC block found on the
> > > RZ/Five SoC is almost identical to one found on the RZ/G2L (and alike)
> > > SoC's. To differentiate RZ/G2UL from RZ/Five, "-rzfive" is included in
> > > the compatible string for the RZ/Five SoC as there are no interrupts
> > > from the SYSC block to the core.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> > > ---
> > >  .../soc/renesas/renesas,rzg2l-sysc.yaml       | 56 +++++++++++++------
> > >  1 file changed, 39 insertions(+), 17 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> > > index ce2875c89329..bdaf05f8b29b 100644
> > > --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> > > +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> > > @@ -20,35 +20,57 @@ description:
> > >  properties:
> > >    compatible:
> > >      enum:
> > > -      - renesas,r9a07g043-sysc # RZ/G2UL
> > > -      - renesas,r9a07g044-sysc # RZ/G2{L,LC}
> > > -      - renesas,r9a07g054-sysc # RZ/V2L
> > > +      - renesas,r9a07g043-rzfive-sysc # RZ/Five
> >
> > renesas,r9a07g043f-sysc?
> >
> Agreed.
>
> > But I'm wondering if we really need a different compatible value?
> > It looks like both blocks differ only in external wiring, so if
> > anything needs to be handled differently (the removed/added registers
> > are related to CPU topology), that can be inferred from the system
> > topology (or even #ifdef CONFIG_{ARM64,RISCV} ;-)
> >
> Good point, but I wonder if we would end up in too many #ifdef
> CONFIG_{ARM64,RISCV} checks. If thats OK I will stick with
> "renesas,r9a07g043-sysc"
>
> > > +      - renesas,r9a07g043-sysc        # RZ/G2UL
> > > +      - renesas,r9a07g044-sysc        # RZ/G2{L,LC}
> > > +      - renesas,r9a07g054-sysc        # RZ/V2L
> > >
> > >    reg:
> > >      maxItems: 1
> > >
> > > -  interrupts:
> > > -    items:
> > > -      - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
> > > -      - description: CA55 Software Standby Mode release request interrupt
> > > -      - description: CM33 Software Standby Mode release request interrupt
> > > -      - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
> > > +  interrupts: true
> > >
> > > -  interrupt-names:
> > > -    items:
> > > -      - const: lpm_int
> > > -      - const: ca55stbydone_int
> > > -      - const: cm33stbyr_int
> > > -      - const: ca55_deny
> > > +  interrupt-names: true
> > >
> > >  required:
> > >    - compatible
> > >    - reg
> > > -  - interrupts
> > > -  - interrupt-names
> > >
> > >  additionalProperties: false
> > >
> > > +allOf:
> > > +  - if:
> > > +      not:
> > > +        properties:
> > > +          compatible:
> > > +            contains:
> > > +              enum:
> > > +                - renesas,r9a07g043-rzfive-sysc
> > > +    then:
> > > +      properties:
> > > +        interrupts:
> > > +          items:
> > > +            - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
> > > +            - description: CA55 Software Standby Mode release request interrupt
> > > +            - description: CM33 Software Standby Mode release request interrupt
> > > +            - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
> > > +
> > > +        interrupt-names:
> > > +          items:
> > > +            - const: lpm_int
> > > +            - const: ca55stbydone_int
> > > +            - const: cm33stbyr_int
> > > +            - const: ca55_deny
> > > +
> > > +      required:
> > > +        - interrupts
> > > +        - interrupt-names
> > > +
> > > +    else:
> > > +      properties:
> > > +        interrupts: false
> > > +        interrupt-names: false
> >
> > Do all interrupts{,-names} have to be moved?
> > Wouldn't it be sufficient to just have
> >
> Agreed.
>
> >     if [...]
> >     then:
> >         required:
> >           - interrupts
> >           - interrupt-names
> >     else:
> >         properties:
> >             interrupts: false
> >             interrupt-names: false
> >
> > ?
> >
> > But again, without a new compatible value, you could just make
> > interrupts{,-names} not required?
> >
> You mean we just make it optional for all the SoC's?

Indeed.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/2] soc: renesas: Identify RZ/Five SoC

[Lad, Prabhakar]

Hi Geert,

Thank you for the review.

On Fri, Jul 22, 2022 at 10:37 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Jul 22, 2022 at 12:12 AM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > Add support for identifying the (R9A07G043) RZ/Five SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/soc/renesas/Kconfig
> > +++ b/drivers/soc/renesas/Kconfig
> > @@ -333,6 +333,16 @@ config ARCH_R9A09G011
> >
> >  endif # ARM64
> >
> > +if RISCV
> > +
> > +config ARCH_R9A07G043
> > +       bool "RISCV Platform support for RZ/Five"
>
> RISC-V
>
Agreed.

> > +       select ARCH_RZG2L
> > +       help
> > +         This enables support for the Renesas RZ/Five SoC.
> > +
> > +endif # RISCV
> > +
> >  config RST_RCAR
> >         bool "Reset Controller support for R-Car" if COMPILE_TEST
> >
>
> > @@ -102,6 +106,11 @@ static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
> >         .id     = 0x40,
> >  };
> >
> > +static const struct renesas_soc soc_rz_five __initconst __maybe_unused = {
> > +       .family = &fam_rzfive,
> > +       .id     = 0x847c447,
>
> The Hardware User's Manual Rev.1.00 says H’x841_C447?
>
You caught a typo in theHW manual, H’x841_C447 is the value for
RZ/G2L, for RZ/Five the value is H’x847_C447 (and can be verified on
page 146 SYS_DEVID register).

Below is the log from RZ/Five SMARC EVK:
U-Boot SPL 2020.10-ge84e786a34-dirty (Feb 25 2022 - 17:10:04 +0000)
Trying to boot from NOR


U-Boot 2020.10-ge84e786a34-dirty (Feb 25 2022 - 17:10:04 +0000)

CPU:   rv64imafdc
Model: smarc-rzf
DRAM:  896 MiB
MMC:   sh-sdhi: 0, sh-sdhi: 1
Loading Environment from MMC... OK
In:    serial@1004b800
Out:   serial@1004b800
Err:   serial@1004b800
Net:   eth0: ethernet@11c30000
Hit any key to stop autoboot:  0
=> md 0x11020a04 1
11020a04: 0847c447                               G.G.
=>


> > @@ -398,6 +411,7 @@ static const struct renesas_id id_prr __initconst = {
> >
> >  static const struct of_device_id renesas_ids[] __initconst = {
> >         { .compatible = "renesas,bsid",                 .data = &id_bsid },
> > +       { .compatible = "renesas,r9a07g043-rzfive-sysc", .data = &id_rzg2l },
> >         { .compatible = "renesas,r9a07g043-sysc",       .data = &id_rzg2l },
> >         { .compatible = "renesas,r9a07g044-sysc",       .data = &id_rzg2l },
> >         { .compatible = "renesas,r9a07g054-sysc",       .data = &id_rzg2l },
>
> This change might not be needed (cfr. my comments on patch 1/2).
>
Ok.

Cheers,
Prabhakar