[PATCH 0/4] BDW DDI buffer level shifters for HDMI/DVI

[PATCH 0/4] BDW DDI buffer level shifters for HDMI/DVI

[Damien Lespiau]

While cruising through the specs, I noticed that we were missing the BDW HDMI
DDI buffer tables.

Patch 1: re-factor how we handle the VBT entry as the parsing code made
	 HSW-specific assumptions about the level tables
Patch 2: The actual BDW tables
Pathes 3 & 4 are trivial clean ups on top.

(Paulo is signed up for rewiew)

-- 
Damien

Damien Lespiau (4):
  drm/i915: Gather the HDMI level shifter logic into one place
  drm/i915/bdw: Provide the BDW specific HDMI buffer translation table
  drm/i915/bdw: Remove the HDMI/DVI entry from the DP/eDP/FDI tables
  drm/i915: Remove now useless comments about the translation values

 drivers/gpu/drm/i915/i915_drv.h   |  6 +++++
 drivers/gpu/drm/i915/intel_bios.c | 13 +++++------
 drivers/gpu/drm/i915/intel_ddi.c  | 47 ++++++++++++++++++++++++++++++---------
 3 files changed, 48 insertions(+), 18 deletions(-)

-- 
1.8.3.1

[PATCH 1/4] drm/i915: Gather the HDMI level shifter logic into one place

[Damien Lespiau]

The knowledge about the HDMI/DVI DDI translation table was scattered
around.
  - info->hdmi_level_shift was initialized with 6, the index of the 800
    mV, 0dB translation
  - A check on the VBT value was done to ensure it wasn't overflowing
    the translation table (< 0xC)
  - The actual programming was done in intel_ddi.c

As we need to change that knowledge for Broadwell, let's gather
everything into one place.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   |  6 ++++++
 drivers/gpu/drm/i915/intel_bios.c | 13 +++++--------
 drivers/gpu/drm/i915/intel_ddi.c  | 14 +++++++++++++-
 3 files changed, 24 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d604f4f..2e41616 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1229,6 +1229,12 @@ enum modeset_restore {
 };
 
 struct ddi_vbt_port_info {
+	/*
+	 * This is an index in the HDMI/DVI DDI buffer translation table.
+	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
+	 * populate this field.
+	 */
+#define HDMI_LEVEL_SHIFT_UNKNOWN	0xff
 	uint8_t hdmi_level_shift;
 
 	uint8_t supports_dvi:1;
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index a669550..031c565 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -976,12 +976,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 	if (bdb->version >= 158) {
 		/* The VBT HDMI level shift values match the table we have. */
 		hdmi_level_shift = child->raw[7] & 0xF;
-		if (hdmi_level_shift < 0xC) {
-			DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
-				      port_name(port),
-				      hdmi_level_shift);
-			info->hdmi_level_shift = hdmi_level_shift;
-		}
+		DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
+			      port_name(port),
+			      hdmi_level_shift);
+		info->hdmi_level_shift = hdmi_level_shift;
 	}
 }
 
@@ -1114,8 +1112,7 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
 		struct ddi_vbt_port_info *info =
 			&dev_priv->vbt.ddi_port_info[port];
 
-		/* Recommended BSpec default: 800mV 0dB. */
-		info->hdmi_level_shift = 6;
+		info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
 
 		info->supports_dvi = (port != PORT_A && port != PORT_E);
 		info->supports_hdmi = info->supports_dvi;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index a6024de..80e2a42 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -145,7 +145,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg;
-	int i;
+	int i, n_hdmi_entries, hdmi_800mV_0dB;
 	int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
 	const u32 *ddi_translations_fdi;
 	const u32 *ddi_translations_dp;
@@ -156,15 +156,21 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 		ddi_translations_fdi = bdw_ddi_translations_fdi;
 		ddi_translations_dp = bdw_ddi_translations_dp;
 		ddi_translations_edp = bdw_ddi_translations_edp;
+		n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
+		hdmi_800mV_0dB = 6;
 	} else if (IS_HASWELL(dev)) {
 		ddi_translations_fdi = hsw_ddi_translations_fdi;
 		ddi_translations_dp = hsw_ddi_translations_dp;
 		ddi_translations_edp = hsw_ddi_translations_dp;
+		n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
+		hdmi_800mV_0dB = 6;
 	} else {
 		WARN(1, "ddi translation table missing\n");
 		ddi_translations_edp = bdw_ddi_translations_dp;
 		ddi_translations_fdi = bdw_ddi_translations_fdi;
 		ddi_translations_dp = bdw_ddi_translations_dp;
+		n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
+		hdmi_800mV_0dB = 6;
 	}
 
 	switch (port) {
@@ -193,6 +199,12 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 		I915_WRITE(reg, ddi_translations[i]);
 		reg += 4;
 	}
+
+	/* Choose a good default if VBT is badly populated */
+	if (hdmi_level == HDMI_LEVEL_SHIFT_UNKNOWN ||
+	    hdmi_level >= n_hdmi_entries)
+		hdmi_level = hdmi_800mV_0dB;
+
 	/* Entry 9 is for HDMI: */
 	for (i = 0; i < 2; i++) {
 		I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
-- 
1.8.3.1

[PATCH 2/4] drm/i915/bdw: Provide the BDW specific HDMI buffer translation table

[Damien Lespiau]

Among the changes, the tables has only 10 entries instead of 12 on HSW
and the index the the 800mV/0dB entry has changed.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 28 +++++++++++++++++++++++-----
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 80e2a42..67feea2 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -111,6 +111,20 @@ static const u32 bdw_ddi_translations_fdi[] = {
 	0x00FFFFFF, 0x00140006		/* HDMI parameters 800mV 0dB*/
 };
 
+static const u32 bdw_ddi_translations_hdmi[] = {
+				/* Idx	NT mV diff	T mV diff	db  */
+	0x00FFFFFF, 0x0007000E, /* 0:	400		400		0   */
+	0x00D75FFF, 0x000E000A, /* 1:	400		600		3.5 */
+	0x00BEFFFF, 0x00140006, /* 2:	400		800		6   */
+	0x00FFFFFF, 0x0009000D, /* 3:	450		450		0   */
+	0x00FFFFFF, 0x000E000A, /* 4:	600		600		0   */
+	0x00D7FFFF, 0x00140006, /* 5:	600		800		2.5 */
+	0x80CB2FFF, 0x001B0002, /* 6:	600		1000		4.5 */
+	0x00FFFFFF, 0x00140006, /* 7:	800		800		0   */
+	0x80E79FFF, 0x001B0002, /* 8:	800		1000		2   */
+	0x80FFFFFF, 0x001B0002, /* 9:	1000		1000		0   */
+};
+
 enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
 {
 	struct drm_encoder *encoder = &intel_encoder->base;
@@ -150,18 +164,21 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 	const u32 *ddi_translations_fdi;
 	const u32 *ddi_translations_dp;
 	const u32 *ddi_translations_edp;
+	const u32 *ddi_translations_hdmi;
 	const u32 *ddi_translations;
 
 	if (IS_BROADWELL(dev)) {
 		ddi_translations_fdi = bdw_ddi_translations_fdi;
 		ddi_translations_dp = bdw_ddi_translations_dp;
 		ddi_translations_edp = bdw_ddi_translations_edp;
-		n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
-		hdmi_800mV_0dB = 6;
+		ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+		n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+		hdmi_800mV_0dB = 7;
 	} else if (IS_HASWELL(dev)) {
 		ddi_translations_fdi = hsw_ddi_translations_fdi;
 		ddi_translations_dp = hsw_ddi_translations_dp;
 		ddi_translations_edp = hsw_ddi_translations_dp;
+		ddi_translations_hdmi = hsw_ddi_translations_hdmi;
 		n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
 		hdmi_800mV_0dB = 6;
 	} else {
@@ -169,8 +186,9 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 		ddi_translations_edp = bdw_ddi_translations_dp;
 		ddi_translations_fdi = bdw_ddi_translations_fdi;
 		ddi_translations_dp = bdw_ddi_translations_dp;
-		n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
-		hdmi_800mV_0dB = 6;
+		ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+		n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+		hdmi_800mV_0dB = 7;
 	}
 
 	switch (port) {
@@ -207,7 +225,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 
 	/* Entry 9 is for HDMI: */
 	for (i = 0; i < 2; i++) {
-		I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
+		I915_WRITE(reg, ddi_translations_hdmi[hdmi_level * 2 + i]);
 		reg += 4;
 	}
 }
-- 
1.8.3.1

[PATCH 3/4] drm/i915/bdw: Remove the HDMI/DVI entry from the DP/eDP/FDI tables

[Damien Lespiau]

We always write entries 0 to 8 from the DDI translation tables and then
entry 9 for HDMI/DVI with the help of the VBT. We then don't need the
failsafe HDMI entry in the DP/eDP/FDI tables.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 67feea2..80526ab 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -82,7 +82,6 @@ static const u32 bdw_ddi_translations_edp[] = {
 	0x00BEEFFF, 0x000A000C,
 	0x00FFFFFF, 0x0005000F,
 	0x00DB6FFF, 0x000A000C,
-	0x00FFFFFF, 0x00140006		/* HDMI parameters 800mV 0dB*/
 };
 
 static const u32 bdw_ddi_translations_dp[] = {
@@ -95,7 +94,6 @@ static const u32 bdw_ddi_translations_dp[] = {
 	0x80CB2FFF, 0x001B0002,
 	0x00F7DFFF, 0x00180004,
 	0x80D75FFF, 0x001B0002,
-	0x00FFFFFF, 0x00140006		/* HDMI parameters 800mV 0dB*/
 };
 
 static const u32 bdw_ddi_translations_fdi[] = {
@@ -108,7 +106,6 @@ static const u32 bdw_ddi_translations_fdi[] = {
 	0x00C30FFF, 0x000C0000,
 	0x00FFFFFF, 0x00070006,
 	0x00D75FFF, 0x000C0000,
-	0x00FFFFFF, 0x00140006		/* HDMI parameters 800mV 0dB*/
 };
 
 static const u32 bdw_ddi_translations_hdmi[] = {
-- 
1.8.3.1

[PATCH 4/4] drm/i915: Remove now useless comments about the translation values

[Damien Lespiau]

We used to carry a default HDMI value in entry 9, but this entry got
removed for both HSW and BDW.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 80526ab..ab5f65f 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -33,7 +33,7 @@
  * automatically adapt to HDMI connections as well
  */
 static const u32 hsw_ddi_translations_dp[] = {
-	0x00FFFFFF, 0x0006000E,		/* DP parameters */
+	0x00FFFFFF, 0x0006000E,
 	0x00D75FFF, 0x0005000A,
 	0x00C30FFF, 0x00040006,
 	0x80AAAFFF, 0x000B0000,
@@ -45,7 +45,7 @@ static const u32 hsw_ddi_translations_dp[] = {
 };
 
 static const u32 hsw_ddi_translations_fdi[] = {
-	0x00FFFFFF, 0x0007000E,		/* FDI parameters */
+	0x00FFFFFF, 0x0007000E,
 	0x00D75FFF, 0x000F000A,
 	0x00C30FFF, 0x00060006,
 	0x00AAAFFF, 0x001E0000,
@@ -73,7 +73,7 @@ static const u32 hsw_ddi_translations_hdmi[] = {
 };
 
 static const u32 bdw_ddi_translations_edp[] = {
-	0x00FFFFFF, 0x00000012,		/* eDP parameters */
+	0x00FFFFFF, 0x00000012,
 	0x00EBAFFF, 0x00020011,
 	0x00C71FFF, 0x0006000F,
 	0x00AAAFFF, 0x000E000A,
@@ -85,7 +85,7 @@ static const u32 bdw_ddi_translations_edp[] = {
 };
 
 static const u32 bdw_ddi_translations_dp[] = {
-	0x00FFFFFF, 0x0007000E,		/* DP parameters */
+	0x00FFFFFF, 0x0007000E,
 	0x00D75FFF, 0x000E000A,
 	0x00BEFFFF, 0x00140006,
 	0x80B2CFFF, 0x001B0002,
@@ -97,7 +97,7 @@ static const u32 bdw_ddi_translations_dp[] = {
 };
 
 static const u32 bdw_ddi_translations_fdi[] = {
-	0x00FFFFFF, 0x0001000E,		/* FDI parameters */
+	0x00FFFFFF, 0x0001000E,
 	0x00D75FFF, 0x0004000A,
 	0x00C30FFF, 0x00070006,
 	0x00AAAFFF, 0x000C0000,
-- 
1.8.3.1

Re: [PATCH 1/4] drm/i915: Gather the HDMI level shifter logic into one place

[Paulo Zanoni]

2014-08-01 7:07 GMT-03:00 Damien Lespiau <damien.lespiau@intel.com>:
> The knowledge about the HDMI/DVI DDI translation table was scattered
> around.
>   - info->hdmi_level_shift was initialized with 6, the index of the 800
>     mV, 0dB translation
>   - A check on the VBT value was done to ensure it wasn't overflowing
>     the translation table (< 0xC)
>   - The actual programming was done in intel_ddi.c
>
> As we need to change that knowledge for Broadwell, let's gather
> everything into one place.

Yeah, it's much better this way.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   |  6 ++++++
>  drivers/gpu/drm/i915/intel_bios.c | 13 +++++--------
>  drivers/gpu/drm/i915/intel_ddi.c  | 14 +++++++++++++-
>  3 files changed, 24 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d604f4f..2e41616 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1229,6 +1229,12 @@ enum modeset_restore {
>  };
>
>  struct ddi_vbt_port_info {
> +       /*
> +        * This is an index in the HDMI/DVI DDI buffer translation table.
> +        * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> +        * populate this field.
> +        */
> +#define HDMI_LEVEL_SHIFT_UNKNOWN       0xff
>         uint8_t hdmi_level_shift;
>
>         uint8_t supports_dvi:1;
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index a669550..031c565 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -976,12 +976,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>         if (bdb->version >= 158) {
>                 /* The VBT HDMI level shift values match the table we have. */
>                 hdmi_level_shift = child->raw[7] & 0xF;
> -               if (hdmi_level_shift < 0xC) {
> -                       DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
> -                                     port_name(port),
> -                                     hdmi_level_shift);
> -                       info->hdmi_level_shift = hdmi_level_shift;
> -               }
> +               DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
> +                             port_name(port),
> +                             hdmi_level_shift);
> +               info->hdmi_level_shift = hdmi_level_shift;
>         }
>  }
>
> @@ -1114,8 +1112,7 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
>                 struct ddi_vbt_port_info *info =
>                         &dev_priv->vbt.ddi_port_info[port];
>
> -               /* Recommended BSpec default: 800mV 0dB. */
> -               info->hdmi_level_shift = 6;
> +               info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
>
>                 info->supports_dvi = (port != PORT_A && port != PORT_E);
>                 info->supports_hdmi = info->supports_dvi;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index a6024de..80e2a42 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -145,7 +145,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         u32 reg;
> -       int i;
> +       int i, n_hdmi_entries, hdmi_800mV_0dB;
>         int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
>         const u32 *ddi_translations_fdi;
>         const u32 *ddi_translations_dp;
> @@ -156,15 +156,21 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>                 ddi_translations_fdi = bdw_ddi_translations_fdi;
>                 ddi_translations_dp = bdw_ddi_translations_dp;
>                 ddi_translations_edp = bdw_ddi_translations_edp;
> +               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
> +               hdmi_800mV_0dB = 6;
>         } else if (IS_HASWELL(dev)) {
>                 ddi_translations_fdi = hsw_ddi_translations_fdi;
>                 ddi_translations_dp = hsw_ddi_translations_dp;
>                 ddi_translations_edp = hsw_ddi_translations_dp;
> +               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
> +               hdmi_800mV_0dB = 6;
>         } else {
>                 WARN(1, "ddi translation table missing\n");
>                 ddi_translations_edp = bdw_ddi_translations_dp;
>                 ddi_translations_fdi = bdw_ddi_translations_fdi;
>                 ddi_translations_dp = bdw_ddi_translations_dp;
> +               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
> +               hdmi_800mV_0dB = 6;
>         }
>
>         switch (port) {
> @@ -193,6 +199,12 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>                 I915_WRITE(reg, ddi_translations[i]);
>                 reg += 4;
>         }
> +
> +       /* Choose a good default if VBT is badly populated */
> +       if (hdmi_level == HDMI_LEVEL_SHIFT_UNKNOWN ||
> +           hdmi_level >= n_hdmi_entries)
> +               hdmi_level = hdmi_800mV_0dB;
> +
>         /* Entry 9 is for HDMI: */
>         for (i = 0; i < 2; i++) {
>                 I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

Re: [PATCH 2/4] drm/i915/bdw: Provide the BDW specific HDMI buffer translation table

[Paulo Zanoni]

2014-08-01 7:07 GMT-03:00 Damien Lespiau <damien.lespiau@intel.com>:
> Among the changes, the tables has only 10 entries instead of 12 on HSW
> and the index the the 800mV/0dB entry has changed.
>

And now your HDMI monitors on BDW will look better if you have eagle eyes.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 28 +++++++++++++++++++++++-----
>  1 file changed, 23 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 80e2a42..67feea2 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -111,6 +111,20 @@ static const u32 bdw_ddi_translations_fdi[] = {
>         0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
>  };
>
> +static const u32 bdw_ddi_translations_hdmi[] = {
> +                               /* Idx  NT mV diff      T mV diff       db  */
> +       0x00FFFFFF, 0x0007000E, /* 0:   400             400             0   */
> +       0x00D75FFF, 0x000E000A, /* 1:   400             600             3.5 */
> +       0x00BEFFFF, 0x00140006, /* 2:   400             800             6   */
> +       0x00FFFFFF, 0x0009000D, /* 3:   450             450             0   */
> +       0x00FFFFFF, 0x000E000A, /* 4:   600             600             0   */
> +       0x00D7FFFF, 0x00140006, /* 5:   600             800             2.5 */
> +       0x80CB2FFF, 0x001B0002, /* 6:   600             1000            4.5 */
> +       0x00FFFFFF, 0x00140006, /* 7:   800             800             0   */
> +       0x80E79FFF, 0x001B0002, /* 8:   800             1000            2   */
> +       0x80FFFFFF, 0x001B0002, /* 9:   1000            1000            0   */
> +};
> +
>  enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
>  {
>         struct drm_encoder *encoder = &intel_encoder->base;
> @@ -150,18 +164,21 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>         const u32 *ddi_translations_fdi;
>         const u32 *ddi_translations_dp;
>         const u32 *ddi_translations_edp;
> +       const u32 *ddi_translations_hdmi;
>         const u32 *ddi_translations;
>
>         if (IS_BROADWELL(dev)) {
>                 ddi_translations_fdi = bdw_ddi_translations_fdi;
>                 ddi_translations_dp = bdw_ddi_translations_dp;
>                 ddi_translations_edp = bdw_ddi_translations_edp;
> -               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
> -               hdmi_800mV_0dB = 6;
> +               ddi_translations_hdmi = bdw_ddi_translations_hdmi;
> +               n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
> +               hdmi_800mV_0dB = 7;
>         } else if (IS_HASWELL(dev)) {
>                 ddi_translations_fdi = hsw_ddi_translations_fdi;
>                 ddi_translations_dp = hsw_ddi_translations_dp;
>                 ddi_translations_edp = hsw_ddi_translations_dp;
> +               ddi_translations_hdmi = hsw_ddi_translations_hdmi;
>                 n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
>                 hdmi_800mV_0dB = 6;
>         } else {
> @@ -169,8 +186,9 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>                 ddi_translations_edp = bdw_ddi_translations_dp;
>                 ddi_translations_fdi = bdw_ddi_translations_fdi;
>                 ddi_translations_dp = bdw_ddi_translations_dp;
> -               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
> -               hdmi_800mV_0dB = 6;
> +               ddi_translations_hdmi = bdw_ddi_translations_hdmi;
> +               n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
> +               hdmi_800mV_0dB = 7;
>         }
>
>         switch (port) {
> @@ -207,7 +225,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>
>         /* Entry 9 is for HDMI: */
>         for (i = 0; i < 2; i++) {
> -               I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
> +               I915_WRITE(reg, ddi_translations_hdmi[hdmi_level * 2 + i]);
>                 reg += 4;
>         }
>  }
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

Re: [PATCH 3/4] drm/i915/bdw: Remove the HDMI/DVI entry from the DP/eDP/FDI tables

[Paulo Zanoni]

2014-08-01 7:07 GMT-03:00 Damien Lespiau <damien.lespiau@intel.com>:
> We always write entries 0 to 8 from the DDI translation tables and then
> entry 9 for HDMI/DVI with the help of the VBT. We then don't need the
> failsafe HDMI entry in the DP/eDP/FDI tables.

And it seems we were not even using these values anyway...

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 3 ---
>  1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 67feea2..80526ab 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -82,7 +82,6 @@ static const u32 bdw_ddi_translations_edp[] = {
>         0x00BEEFFF, 0x000A000C,
>         0x00FFFFFF, 0x0005000F,
>         0x00DB6FFF, 0x000A000C,
> -       0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
>  };
>
>  static const u32 bdw_ddi_translations_dp[] = {
> @@ -95,7 +94,6 @@ static const u32 bdw_ddi_translations_dp[] = {
>         0x80CB2FFF, 0x001B0002,
>         0x00F7DFFF, 0x00180004,
>         0x80D75FFF, 0x001B0002,
> -       0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
>  };
>
>  static const u32 bdw_ddi_translations_fdi[] = {
> @@ -108,7 +106,6 @@ static const u32 bdw_ddi_translations_fdi[] = {
>         0x00C30FFF, 0x000C0000,
>         0x00FFFFFF, 0x00070006,
>         0x00D75FFF, 0x000C0000,
> -       0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
>  };
>
>  static const u32 bdw_ddi_translations_hdmi[] = {
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

Re: [PATCH 4/4] drm/i915: Remove now useless comments about the translation values

[Paulo Zanoni]

2014-08-01 7:07 GMT-03:00 Damien Lespiau <damien.lespiau@intel.com>:
> We used to carry a default HDMI value in entry 9, but this entry got
> removed for both HSW and BDW.
>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 80526ab..ab5f65f 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -33,7 +33,7 @@
>   * automatically adapt to HDMI connections as well
>   */
>  static const u32 hsw_ddi_translations_dp[] = {
> -       0x00FFFFFF, 0x0006000E,         /* DP parameters */
> +       0x00FFFFFF, 0x0006000E,
>         0x00D75FFF, 0x0005000A,
>         0x00C30FFF, 0x00040006,
>         0x80AAAFFF, 0x000B0000,
> @@ -45,7 +45,7 @@ static const u32 hsw_ddi_translations_dp[] = {
>  };
>
>  static const u32 hsw_ddi_translations_fdi[] = {
> -       0x00FFFFFF, 0x0007000E,         /* FDI parameters */
> +       0x00FFFFFF, 0x0007000E,
>         0x00D75FFF, 0x000F000A,
>         0x00C30FFF, 0x00060006,
>         0x00AAAFFF, 0x001E0000,
> @@ -73,7 +73,7 @@ static const u32 hsw_ddi_translations_hdmi[] = {
>  };
>
>  static const u32 bdw_ddi_translations_edp[] = {
> -       0x00FFFFFF, 0x00000012,         /* eDP parameters */
> +       0x00FFFFFF, 0x00000012,
>         0x00EBAFFF, 0x00020011,
>         0x00C71FFF, 0x0006000F,
>         0x00AAAFFF, 0x000E000A,
> @@ -85,7 +85,7 @@ static const u32 bdw_ddi_translations_edp[] = {
>  };
>
>  static const u32 bdw_ddi_translations_dp[] = {
> -       0x00FFFFFF, 0x0007000E,         /* DP parameters */
> +       0x00FFFFFF, 0x0007000E,
>         0x00D75FFF, 0x000E000A,
>         0x00BEFFFF, 0x00140006,
>         0x80B2CFFF, 0x001B0002,
> @@ -97,7 +97,7 @@ static const u32 bdw_ddi_translations_dp[] = {
>  };
>
>  static const u32 bdw_ddi_translations_fdi[] = {
> -       0x00FFFFFF, 0x0001000E,         /* FDI parameters */
> +       0x00FFFFFF, 0x0001000E,
>         0x00D75FFF, 0x0004000A,
>         0x00C30FFF, 0x00070006,
>         0x00AAAFFF, 0x000C0000,
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

Re: [PATCH 4/4] drm/i915: Remove now useless comments about the translation values

[Daniel Vetter]

On Fri, Aug 01, 2014 at 12:29:22PM -0300, Paulo Zanoni wrote:
> 2014-08-01 7:07 GMT-03:00 Damien Lespiau <damien.lespiau@intel.com>:
> > We used to carry a default HDMI value in entry 9, but this entry got
> > removed for both HSW and BDW.
> >
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Pulled in entire series, thanks. I'll shuffle the first two for 3.17 when
I split my queue. We can cc: stable if they are known to make an actual
user happier ;-)
-Daniel
> 
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 10 +++++-----
> >  1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index 80526ab..ab5f65f 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -33,7 +33,7 @@
> >   * automatically adapt to HDMI connections as well
> >   */
> >  static const u32 hsw_ddi_translations_dp[] = {
> > -       0x00FFFFFF, 0x0006000E,         /* DP parameters */
> > +       0x00FFFFFF, 0x0006000E,
> >         0x00D75FFF, 0x0005000A,
> >         0x00C30FFF, 0x00040006,
> >         0x80AAAFFF, 0x000B0000,
> > @@ -45,7 +45,7 @@ static const u32 hsw_ddi_translations_dp[] = {
> >  };
> >
> >  static const u32 hsw_ddi_translations_fdi[] = {
> > -       0x00FFFFFF, 0x0007000E,         /* FDI parameters */
> > +       0x00FFFFFF, 0x0007000E,
> >         0x00D75FFF, 0x000F000A,
> >         0x00C30FFF, 0x00060006,
> >         0x00AAAFFF, 0x001E0000,
> > @@ -73,7 +73,7 @@ static const u32 hsw_ddi_translations_hdmi[] = {
> >  };
> >
> >  static const u32 bdw_ddi_translations_edp[] = {
> > -       0x00FFFFFF, 0x00000012,         /* eDP parameters */
> > +       0x00FFFFFF, 0x00000012,
> >         0x00EBAFFF, 0x00020011,
> >         0x00C71FFF, 0x0006000F,
> >         0x00AAAFFF, 0x000E000A,
> > @@ -85,7 +85,7 @@ static const u32 bdw_ddi_translations_edp[] = {
> >  };
> >
> >  static const u32 bdw_ddi_translations_dp[] = {
> > -       0x00FFFFFF, 0x0007000E,         /* DP parameters */
> > +       0x00FFFFFF, 0x0007000E,
> >         0x00D75FFF, 0x000E000A,
> >         0x00BEFFFF, 0x00140006,
> >         0x80B2CFFF, 0x001B0002,
> > @@ -97,7 +97,7 @@ static const u32 bdw_ddi_translations_dp[] = {
> >  };
> >
> >  static const u32 bdw_ddi_translations_fdi[] = {
> > -       0x00FFFFFF, 0x0001000E,         /* FDI parameters */
> > +       0x00FFFFFF, 0x0001000E,
> >         0x00D75FFF, 0x0004000A,
> >         0x00C30FFF, 0x00070006,
> >         0x00AAAFFF, 0x000C0000,
> > --
> > 1.8.3.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch