* [PATCH] drm/msm/dpu: enable DSPP support on SM8[12]50
@ 2020-11-03 5:21 ` Dmitry Baryshkov
0 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2020-11-03 5:21 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Jonathan Marek
Cc: Stephen Boyd, Jeffrey Hugo, Harigovindan P, David Airlie,
Daniel Vetter, linux-arm-msm, dri-devel, freedreno
Add support for color correction sub block on SM8150 and SM8250.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 26 +++++++++++++++----
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 3 +--
2 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index bb1add2e49dd..240a21c5e5fe 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -466,9 +466,9 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
static const struct dpu_lm_cfg sm8150_lm[] = {
LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
- &sdm845_lm_sblk, PINGPONG_0, LM_1, 0),
+ &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0),
LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
- &sdm845_lm_sblk, PINGPONG_1, LM_0, 0),
+ &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1),
LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
&sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
@@ -487,16 +487,28 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = {
.len = 0x90, .version = 0x10000},
};
-#define DSPP_BLK(_name, _id, _base) \
+static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = {
+ .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
+ .len = 0x90, .version = 0x40000},
+};
+
+#define DSPP_BLK(_name, _id, _base, _sblk) \
{\
.name = _name, .id = _id, \
.base = _base, .len = 0x1800, \
.features = DSPP_SC7180_MASK, \
- .sblk = &sc7180_dspp_sblk \
+ .sblk = _sblk \
}
static const struct dpu_dspp_cfg sc7180_dspp[] = {
- DSPP_BLK("dspp_0", DSPP_0, 0x54000),
+ DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sc7180_dspp_sblk),
+};
+
+static const struct dpu_dspp_cfg sm8150_dspp[] = {
+ DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sm8150_dspp_sblk),
+ DSPP_BLK("dspp_1", DSPP_1, 0x56000, &sm8150_dspp_sblk),
+ DSPP_BLK("dspp_2", DSPP_2, 0x58000, &sm8150_dspp_sblk),
+ DSPP_BLK("dspp_3", DSPP_3, 0x5a000, &sm8150_dspp_sblk),
};
/*************************************************************
@@ -888,6 +900,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.sspp = sdm845_sspp,
.mixer_count = ARRAY_SIZE(sm8150_lm),
.mixer = sm8150_lm,
+ .dspp_count = ARRAY_SIZE(sm8150_dspp),
+ .dspp = sm8150_dspp,
.pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
@@ -919,6 +933,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.sspp = sm8250_sspp,
.mixer_count = ARRAY_SIZE(sm8150_lm),
.mixer = sm8150_lm,
+ .dspp_count = ARRAY_SIZE(sm8150_dspp),
+ .dspp = sm8150_dspp,
.pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
index a7a24539921f..e42f901a7de5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
@@ -57,8 +57,7 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
static void _setup_dspp_ops(struct dpu_hw_dspp *c,
unsigned long features)
{
- if (test_bit(DPU_DSPP_PCC, &features) &&
- IS_SC7180_TARGET(c->hw.hwversion))
+ if (test_bit(DPU_DSPP_PCC, &features))
c->ops.setup_pcc = dpu_setup_dspp_pcc;
}
--
2.28.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] drm/msm/dpu: enable DSPP support on SM8[12]50
@ 2020-11-03 5:21 ` Dmitry Baryshkov
0 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2020-11-03 5:21 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Jonathan Marek
Cc: Jeffrey Hugo, Stephen Boyd, linux-arm-msm, Harigovindan P,
dri-devel, David Airlie, freedreno
Add support for color correction sub block on SM8150 and SM8250.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 26 +++++++++++++++----
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 3 +--
2 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index bb1add2e49dd..240a21c5e5fe 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -466,9 +466,9 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
static const struct dpu_lm_cfg sm8150_lm[] = {
LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
- &sdm845_lm_sblk, PINGPONG_0, LM_1, 0),
+ &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0),
LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
- &sdm845_lm_sblk, PINGPONG_1, LM_0, 0),
+ &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1),
LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
&sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
@@ -487,16 +487,28 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = {
.len = 0x90, .version = 0x10000},
};
-#define DSPP_BLK(_name, _id, _base) \
+static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = {
+ .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
+ .len = 0x90, .version = 0x40000},
+};
+
+#define DSPP_BLK(_name, _id, _base, _sblk) \
{\
.name = _name, .id = _id, \
.base = _base, .len = 0x1800, \
.features = DSPP_SC7180_MASK, \
- .sblk = &sc7180_dspp_sblk \
+ .sblk = _sblk \
}
static const struct dpu_dspp_cfg sc7180_dspp[] = {
- DSPP_BLK("dspp_0", DSPP_0, 0x54000),
+ DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sc7180_dspp_sblk),
+};
+
+static const struct dpu_dspp_cfg sm8150_dspp[] = {
+ DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sm8150_dspp_sblk),
+ DSPP_BLK("dspp_1", DSPP_1, 0x56000, &sm8150_dspp_sblk),
+ DSPP_BLK("dspp_2", DSPP_2, 0x58000, &sm8150_dspp_sblk),
+ DSPP_BLK("dspp_3", DSPP_3, 0x5a000, &sm8150_dspp_sblk),
};
/*************************************************************
@@ -888,6 +900,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.sspp = sdm845_sspp,
.mixer_count = ARRAY_SIZE(sm8150_lm),
.mixer = sm8150_lm,
+ .dspp_count = ARRAY_SIZE(sm8150_dspp),
+ .dspp = sm8150_dspp,
.pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
@@ -919,6 +933,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.sspp = sm8250_sspp,
.mixer_count = ARRAY_SIZE(sm8150_lm),
.mixer = sm8150_lm,
+ .dspp_count = ARRAY_SIZE(sm8150_dspp),
+ .dspp = sm8150_dspp,
.pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
index a7a24539921f..e42f901a7de5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
@@ -57,8 +57,7 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
static void _setup_dspp_ops(struct dpu_hw_dspp *c,
unsigned long features)
{
- if (test_bit(DPU_DSPP_PCC, &features) &&
- IS_SC7180_TARGET(c->hw.hwversion))
+ if (test_bit(DPU_DSPP_PCC, &features))
c->ops.setup_pcc = dpu_setup_dspp_pcc;
}
--
2.28.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/msm/dpu: enable DSPP support on SM8[12]50
2020-11-03 5:21 ` Dmitry Baryshkov
@ 2020-12-05 15:23 ` Dmitry Baryshkov
-1 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2020-12-05 15:23 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Jonathan Marek
Cc: Stephen Boyd, Jeffrey Hugo, Harigovindan P, David Airlie,
Daniel Vetter, open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, freedreno
On Tue, 3 Nov 2020 at 08:21, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> Add support for color correction sub block on SM8150 and SM8250.
Gracious ping for this patch
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 26 +++++++++++++++----
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 3 +--
> 2 files changed, 22 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index bb1add2e49dd..240a21c5e5fe 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -466,9 +466,9 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
>
> static const struct dpu_lm_cfg sm8150_lm[] = {
> LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
> - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0),
> + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0),
> LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
> - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0),
> + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1),
> LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
> &sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
> LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
> @@ -487,16 +487,28 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = {
> .len = 0x90, .version = 0x10000},
> };
>
> -#define DSPP_BLK(_name, _id, _base) \
> +static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = {
> + .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
> + .len = 0x90, .version = 0x40000},
> +};
> +
> +#define DSPP_BLK(_name, _id, _base, _sblk) \
> {\
> .name = _name, .id = _id, \
> .base = _base, .len = 0x1800, \
> .features = DSPP_SC7180_MASK, \
> - .sblk = &sc7180_dspp_sblk \
> + .sblk = _sblk \
> }
>
> static const struct dpu_dspp_cfg sc7180_dspp[] = {
> - DSPP_BLK("dspp_0", DSPP_0, 0x54000),
> + DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sc7180_dspp_sblk),
> +};
> +
> +static const struct dpu_dspp_cfg sm8150_dspp[] = {
> + DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sm8150_dspp_sblk),
> + DSPP_BLK("dspp_1", DSPP_1, 0x56000, &sm8150_dspp_sblk),
> + DSPP_BLK("dspp_2", DSPP_2, 0x58000, &sm8150_dspp_sblk),
> + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, &sm8150_dspp_sblk),
> };
>
> /*************************************************************
> @@ -888,6 +900,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .sspp = sdm845_sspp,
> .mixer_count = ARRAY_SIZE(sm8150_lm),
> .mixer = sm8150_lm,
> + .dspp_count = ARRAY_SIZE(sm8150_dspp),
> + .dspp = sm8150_dspp,
> .pingpong_count = ARRAY_SIZE(sm8150_pp),
> .pingpong = sm8150_pp,
> .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
> @@ -919,6 +933,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .sspp = sm8250_sspp,
> .mixer_count = ARRAY_SIZE(sm8150_lm),
> .mixer = sm8150_lm,
> + .dspp_count = ARRAY_SIZE(sm8150_dspp),
> + .dspp = sm8150_dspp,
> .pingpong_count = ARRAY_SIZE(sm8150_pp),
> .pingpong = sm8150_pp,
> .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> index a7a24539921f..e42f901a7de5 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> @@ -57,8 +57,7 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
> static void _setup_dspp_ops(struct dpu_hw_dspp *c,
> unsigned long features)
> {
> - if (test_bit(DPU_DSPP_PCC, &features) &&
> - IS_SC7180_TARGET(c->hw.hwversion))
> + if (test_bit(DPU_DSPP_PCC, &features))
> c->ops.setup_pcc = dpu_setup_dspp_pcc;
> }
>
> --
> 2.28.0
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/msm/dpu: enable DSPP support on SM8[12]50
@ 2020-12-05 15:23 ` Dmitry Baryshkov
0 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2020-12-05 15:23 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Jonathan Marek
Cc: Jeffrey Hugo, Stephen Boyd,
open list:DRM DRIVER FOR MSM ADRENO GPU, Harigovindan P,
open list:DRM DRIVER FOR MSM ADRENO GPU, David Airlie, freedreno
On Tue, 3 Nov 2020 at 08:21, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> Add support for color correction sub block on SM8150 and SM8250.
Gracious ping for this patch
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 26 +++++++++++++++----
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 3 +--
> 2 files changed, 22 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index bb1add2e49dd..240a21c5e5fe 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -466,9 +466,9 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
>
> static const struct dpu_lm_cfg sm8150_lm[] = {
> LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
> - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0),
> + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0),
> LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
> - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0),
> + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1),
> LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
> &sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
> LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
> @@ -487,16 +487,28 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = {
> .len = 0x90, .version = 0x10000},
> };
>
> -#define DSPP_BLK(_name, _id, _base) \
> +static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = {
> + .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
> + .len = 0x90, .version = 0x40000},
> +};
> +
> +#define DSPP_BLK(_name, _id, _base, _sblk) \
> {\
> .name = _name, .id = _id, \
> .base = _base, .len = 0x1800, \
> .features = DSPP_SC7180_MASK, \
> - .sblk = &sc7180_dspp_sblk \
> + .sblk = _sblk \
> }
>
> static const struct dpu_dspp_cfg sc7180_dspp[] = {
> - DSPP_BLK("dspp_0", DSPP_0, 0x54000),
> + DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sc7180_dspp_sblk),
> +};
> +
> +static const struct dpu_dspp_cfg sm8150_dspp[] = {
> + DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sm8150_dspp_sblk),
> + DSPP_BLK("dspp_1", DSPP_1, 0x56000, &sm8150_dspp_sblk),
> + DSPP_BLK("dspp_2", DSPP_2, 0x58000, &sm8150_dspp_sblk),
> + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, &sm8150_dspp_sblk),
> };
>
> /*************************************************************
> @@ -888,6 +900,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .sspp = sdm845_sspp,
> .mixer_count = ARRAY_SIZE(sm8150_lm),
> .mixer = sm8150_lm,
> + .dspp_count = ARRAY_SIZE(sm8150_dspp),
> + .dspp = sm8150_dspp,
> .pingpong_count = ARRAY_SIZE(sm8150_pp),
> .pingpong = sm8150_pp,
> .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
> @@ -919,6 +933,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .sspp = sm8250_sspp,
> .mixer_count = ARRAY_SIZE(sm8150_lm),
> .mixer = sm8150_lm,
> + .dspp_count = ARRAY_SIZE(sm8150_dspp),
> + .dspp = sm8150_dspp,
> .pingpong_count = ARRAY_SIZE(sm8150_pp),
> .pingpong = sm8150_pp,
> .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> index a7a24539921f..e42f901a7de5 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> @@ -57,8 +57,7 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
> static void _setup_dspp_ops(struct dpu_hw_dspp *c,
> unsigned long features)
> {
> - if (test_bit(DPU_DSPP_PCC, &features) &&
> - IS_SC7180_TARGET(c->hw.hwversion))
> + if (test_bit(DPU_DSPP_PCC, &features))
> c->ops.setup_pcc = dpu_setup_dspp_pcc;
> }
>
> --
> 2.28.0
>
--
With best wishes
Dmitry
_______________________________________________
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2020-11-03 5:21 [PATCH] drm/msm/dpu: enable DSPP support on SM8[12]50 Dmitry Baryshkov
2020-11-03 5:21 ` Dmitry Baryshkov
2020-12-05 15:23 ` Dmitry Baryshkov
2020-12-05 15:23 ` Dmitry Baryshkov
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