From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Tengfei Fan <quic_tengfan@quicinc.com>
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, keescook@chromium.org,
tony.luck@intel.com, gpiccoli@igalia.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org,
kernel@quicinc.com, Qiang Yu <quic_qianyu@quicinc.com>,
Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Subject: Re: [PATCH v7 4/4] arm64: dts: qcom: aim300: add AIM300 AIoT
Date: Thu, 25 Apr 2024 02:50:10 +0300 [thread overview]
Message-ID: <CAA8EJpqAkxy9aXw=nr-H0iguD8zRdkviWvMn-h==v1qzeRXc1Q@mail.gmail.com> (raw)
In-Reply-To: <20240424024508.3857602-5-quic_tengfan@quicinc.com>
On Wed, 24 Apr 2024 at 05:46, Tengfei Fan <quic_tengfan@quicinc.com> wrote:
>
> Add AIM300 AIoT Carrier board DTS support, including usb, UART, PCIe,
> I2C functions support.
> Here is a diagram of AIM300 AIoT Carrie Board and SoM
> +--------------------------------------------------+
> | AIM300 AIOT Carrier Board |
> | |
> | +-----------------+ |
> |power----->| Fixed regulator |---------+ |
> | +-----------------+ | |
> | | |
> | v VPH_PWR |
> | +----------------------------------------------+ |
> | | AIM300 SOM | | |
> | | |VPH_PWR | |
> | | v | |
> | | +-------+ +--------+ +------+ | |
> | | | UFS | | QCS8550| |PMIC | | |
> | | +-------+ +--------+ +------+ | |
> | | | |
> | +----------------------------------------------+ |
> | |
> | +----+ +------+ |
> | |USB | | UART | |
> | +----+ +------+ |
> +--------------------------------------------------+
>
> Co-developed-by: Qiang Yu <quic_qianyu@quicinc.com>
> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
> Co-developed-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/qcs8550-aim300-aiot.dts | 343 ++++++++++++++++++
> 2 files changed, 344 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index f63abb43e9fe..c46c10d85697 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -96,6 +96,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qrb4210-rb2.dtb
> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
> new file mode 100644
> index 000000000000..146bf6ea9e6a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
> @@ -0,0 +1,343 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/leds/common.h>
> +#include "qcs8550-aim300.dtsi"
> +#include "pm8010.dtsi"
> +#include "pmr735d_a.dtsi"
> +#include "pmr735d_b.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. QCS8550 AIM300 AIOT";
> + compatible = "qcom,qcs8550-aim300-aiot", "qcom,qcs8550-aim300", "qcom,qcs8550",
> + "qcom,sm8550";
> +
> + aliases {
> + serial0 = &uart7;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-0 = <&volume_up_n>;
> + pinctrl-names = "default";
> +
> + key-volume-up {
> + label = "Volume Up";
> + debounce-interval = <15>;
> + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + linux,can-disable;
> + wakeup-source;
> + };
> + };
> +
> + pmic-glink {
> + compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_hs_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss_in: endpoint {
> + remote-endpoint = <&redriver_ss_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + pmic_glink_sbu: endpoint {
> + remote-endpoint = <&fsa4480_sbu_mux>;
> + };
> + };
> + };
> + };
> + };
> +
> + vph_pwr: regulator-vph-pwr {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +};
> +
> +&apps_rsc {
> + regulators-0 {
> + vdd-bob1-supply = <&vph_pwr>;
> + vdd-bob2-supply = <&vph_pwr>;
> + };
> +
> + regulators-3 {
> + vdd-s4-supply = <&vph_pwr>;
> + vdd-s5-supply = <&vph_pwr>;
> + };
> +
> + regulators-4 {
> + vdd-s4-supply = <&vph_pwr>;
> + };
> +
> + regulators-5 {
> + vdd-s1-supply = <&vph_pwr>;
> + vdd-s2-supply = <&vph_pwr>;
> + vdd-s3-supply = <&vph_pwr>;
> + vdd-s4-supply = <&vph_pwr>;
> + vdd-s5-supply = <&vph_pwr>;
> + vdd-s6-supply = <&vph_pwr>;
> + };
> +};
> +
> +&i2c_hub_2 {
> + status = "okay";
> +
> + typec-mux@42 {
> + compatible = "fcs,fsa4480";
> + reg = <0x42>;
> +
> + vcc-supply = <&vreg_bob1>;
> +
> + mode-switch;
> + orientation-switch;
> +
> + port {
> + fsa4480_sbu_mux: endpoint {
> + remote-endpoint = <&pmic_glink_sbu>;
> + };
> + };
> + };
> +
> + typec-retimer@1c {
> + compatible = "onnn,nb7vpq904m";
> + reg = <0x1c>;
> +
> + vcc-supply = <&vreg_l15b_1p8>;
> +
> + orientation-switch;
> + retimer-switch;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + redriver_ss_out: endpoint {
> + remote-endpoint = <&pmic_glink_ss_in>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + redriver_ss_in: endpoint {
> + data-lanes = <3 2 1 0>;
> + remote-endpoint = <&usb_dp_qmpphy_out>;
> + };
> + };
> + };
> + };
> +};
> +
> +&mdss_dsi0 {
> + status = "okay";
> +
> + panel@0 {
> + compatible = "visionox,vtdr6130";
> + reg = <0>;
> +
> + pinctrl-0 = <&dsi_active>, <&te_active>;
> + pinctrl-1 = <&dsi_suspend>, <&te_suspend>;
> + pinctrl-names = "default", "sleep";
> +
> + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
> +
> + vci-supply = <&vreg_l13b_3p0>;
> + vdd-supply = <&vreg_l11b_1p2>;
> + vddio-supply = <&vreg_l12b_1p8>;
> +
> + port {
> + panel0_in: endpoint {
> + remote-endpoint = <&mdss_dsi0_out>;
> + };
> + };
> + };
> +};
> +
> +&mdss_dsi0_out {
> + remote-endpoint = <&panel0_in>;
> + data-lanes = <0 1 2 3>;
> +};
> +
> +&mdss_dsi0_phy {
> + status = "okay";
> +};
> +
> +&pcie0 {
> + pinctrl-0 = <&pcie0_default_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pcie0_phy {
> + status = "okay";
> +};
> +
> +&pcie1 {
> + pinctrl-0 = <&pcie1_default_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pcie1_phy {
> + status = "okay";
> +};
> +
> +&pm8550_gpios {
> + volume_up_n: volume-up-n-state {
> + pins = "gpio6";
> + function = "normal";
> + power-source = <1>;
> + bias-pull-up;
> + input-enable;
> + };
> +};
> +
> +&pon_pwrkey {
> + status = "okay";
> +};
> +
> +&pon_resin {
> + linux,code = <KEY_VOLUMEDOWN>;
> +
> + status = "okay";
> +};
> +
> +&qupv3_id_0 {
> + status = "okay";
> +};
> +
> +&remoteproc_adsp {
> + firmware-name = "qcom/qcs8550/adsp.mbn",
> + "qcom/qcs8550/adsp_dtbs.elf";
> + status = "okay";
> +};
> +
> +&remoteproc_cdsp {
> + firmware-name = "qcom/qcs8550/cdsp.mbn",
> + "qcom/qcs8550/cdsp_dtbs.elf";
> + status = "okay";
> +};
> +
> +&swr1 {
> + status = "okay";
> +};
> +
> +&swr2 {
> + status = "okay";
> +};
> +
> +&tlmm {
> + gpio-reserved-ranges = <32 8>;
> +
> + dsi_active: dsi-active-state {
> + pins = "gpio133";
> + function = "gpio";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + dsi_suspend: dsi-suspend-state {
> + pins = "gpio133";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + te_active: te-active-state {
> + pins = "gpio86";
> + function = "mdp_vsync";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + te_suspend: te-suspend-state {
> + pins = "gpio86";
> + function = "mdp_vsync";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +};
> +
> +&uart7 {
> + status = "okay";
> +};
> +
> +&usb_1 {
> + status = "okay";
> +};
> +
> +&usb_1_dwc3 {
> + dr_mode = "otg";
OTG is default and can be dropped.
> + usb-role-switch;
Please move to SoC dtsi and drop from board files.
> +};
> +
> +&usb_1_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in>;
> +};
> +
> +&usb_1_dwc3_ss {
> + remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
This too.
> +};
> +
> +&usb_1_hsphy {
> + status = "okay";
> +};
> +
> +&usb_dp_qmpphy {
> + orientation-switch;
This too
> +
> + status = "okay";
> +};
> +
> +&usb_dp_qmpphy_out {
> + remote-endpoint = <&redriver_ss_in>;
> +};
> +
> +&usb_dp_qmpphy_usb_ss_in {
> + remote-endpoint = <&usb_1_dwc3_ss>;
And this.
> +};
> --
> 2.25.1
>
--
With best wishes
Dmitry
next prev parent reply other threads:[~2024-04-24 23:50 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 2:45 [PATCH v7 0/4] arm64: qcom: add AIM300 AIoT board support Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 1/4] dt-bindings: arm: qcom: Document QCS8550 SoC and the AIM300 AIoT board Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 2/4] arm64: dts: qcom: qcs8550: introduce qcs8550 dtsi Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 3/4] arm64: dts: qcom: add base AIM300 dtsi Tengfei Fan
2024-04-24 23:47 ` Dmitry Baryshkov
2024-04-25 3:21 ` Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 4/4] arm64: dts: qcom: aim300: add AIM300 AIoT Tengfei Fan
2024-04-24 23:50 ` Dmitry Baryshkov [this message]
2024-04-25 3:23 ` Tengfei Fan
2024-04-24 13:14 ` [PATCH v7 0/4] arm64: qcom: add AIM300 AIoT board support Rob Herring
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