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From: Aaron Lewis <aaronlewis@google.com>
To: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Babu Moger <Babu.Moger@amd.com>,
	Yang Weijiang <weijiang.yang@intel.com>,
	kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	Jim Mattson <jmattson@google.com>
Subject: Re: [Patch 3/6] kvm: svm: Add support for XSAVES on AMD
Date: Thu, 10 Oct 2019 07:42:29 -0700	[thread overview]
Message-ID: <CAAAPnDHUAxHAfxUMsG0-zbBVGZ1EJx3bB+z327c1HrCYgH2o0g@mail.gmail.com> (raw)
In-Reply-To: <20191009064425.mxxiegsyr7ugiqum@linutronix.de>

On Tue, Oct 8, 2019 at 11:44 PM Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
>
> On 2019-10-08 17:41:39 [-0700], Aaron Lewis wrote:
> > Hoist support for IA32_XSS so it can be used for both AMD and Intel,
>
> Hoist
>
> > instead of for just Intel.
> >
> > AMD has no equivalent of Intel's "Enable XSAVES/XRSTORS" VM-execution
> > control. Instead, XSAVES is always available to the guest when supported
> > on the host.
>
> You could add that implement the XSAVES check based on host's features
> and move the MSR_IA32_XSS msr R/W from Intel only code to the common
> code.

Isn't this covered by my comments?  I mention that we are hoisting
IA32_XSS to common code in the first comment, then in the second
comment I say that XSAVES is available in the guest when supported on
the host.

>
> …
> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > index e90e658fd8a9..77f2e8c05047 100644
> > --- a/arch/x86/kvm/x86.c
> > +++ b/arch/x86/kvm/x86.c
> > @@ -2702,6 +2702,15 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> >       case MSR_IA32_TSC:
> >               kvm_write_tsc(vcpu, msr_info);
> >               break;
> > +     case MSR_IA32_XSS:
> > +             if (!kvm_x86_ops->xsaves_supported() ||
> > +                 (!msr_info->host_initiated &&
> > +                  !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)))
> > +                     return 1;
>
> I wouldn't ditch the comment. You could explain why only zero is allowed
> to be written. The Skylake is not true for both but this probably
> requires an explanation.
>
> > +             if (data != 0)
> > +                     return 1;
> > +             vcpu->arch.ia32_xss = data;
> > +             break;
> >       case MSR_SMI_COUNT:
> >               if (!msr_info->host_initiated)
> >                       return 1;

Resending as plain text!

  reply	other threads:[~2019-10-10 14:42 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-09  0:41 [Patch 1/6] KVM: VMX: Remove unneeded check for X86_FEATURE_XSAVE Aaron Lewis
2019-10-09  0:41 ` [Patch 2/6] KVM: VMX: Use wrmsr for switching between guest and host IA32_XSS Aaron Lewis
2019-10-09  4:49   ` Yang Weijiang
2019-10-09  6:30   ` Paolo Bonzini
2019-10-09 12:34     ` Vitaly Kuznetsov
2019-10-09  6:31   ` Sebastian Andrzej Siewior
2019-10-09  0:41 ` [Patch 3/6] kvm: svm: Add support for XSAVES on AMD Aaron Lewis
2019-10-09  6:44   ` Sebastian Andrzej Siewior
2019-10-10 14:42     ` Aaron Lewis [this message]
2019-10-10 16:04       ` Paolo Bonzini
2019-10-09  7:01   ` Paolo Bonzini
2019-10-09 21:29     ` Jim Mattson
2019-10-09 21:40       ` Paolo Bonzini
2019-10-09 21:58         ` Jim Mattson
2019-10-09 22:49           ` Paolo Bonzini
2019-10-10  0:42             ` Kang, Luwei
2019-10-09  0:41 ` [Patch 4/6] kvm: svm: Enumerate XSAVES in guest CPUID when it is available to the guest Aaron Lewis
2019-10-09  1:42   ` Yang Weijiang
2019-10-09  6:32     ` Paolo Bonzini
2019-10-09 23:35       ` Jim Mattson
2019-10-09  0:41 ` [Patch 5/6] kvm: x86: Add IA32_XSS to the emulated_msrs list Aaron Lewis
2019-10-09  0:41 ` [Patch 6/6] kvm: tests: Add test to verify MSR_IA32_XSS Aaron Lewis
2019-10-09  6:30   ` Paolo Bonzini
2019-10-09 23:44     ` Jim Mattson
2019-10-10 16:01       ` Paolo Bonzini

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