* [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 17:11 ` Dave Thaler
0 siblings, 0 replies; 8+ messages in thread
From: Dave Thaler @ 2024-04-26 17:11 UTC (permalink / raw)
To: bpf; +Cc: bpf, Dave Thaler, Dave Thaler
This patch elaborates on the use of PC by expanding the PC acronym,
explaining the units, and the relative position to which the offset
applies.
Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
---
Documentation/bpf/standardization/instruction-set.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index b44bdacd0..5592620cf 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src signed
JSLE 0xd any PC += offset if dst <= src signed
======== ===== ======= ================================= ===================================================
+where 'PC' denotes the program counter, and the offset to increment by
+is in units of 64-bit instructions relative to the instruction following
+the jump instruction. Thus 'PC += 1' results in the next instruction
+to execute being two 64-bit instructions later.
+
The BPF program needs to store the return value into register R0 before doing an
``EXIT``.
--
2.40.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 17:11 ` Dave Thaler
0 siblings, 0 replies; 8+ messages in thread
From: Dave Thaler @ 2024-04-26 17:11 UTC (permalink / raw)
To: bpf; +Cc: bpf, Dave Thaler, Dave Thaler
This patch elaborates on the use of PC by expanding the PC acronym,
explaining the units, and the relative position to which the offset
applies.
Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
---
Documentation/bpf/standardization/instruction-set.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index b44bdacd0..5592620cf 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src signed
JSLE 0xd any PC += offset if dst <= src signed
======== ===== ======= ================================= ===================================================
+where 'PC' denotes the program counter, and the offset to increment by
+is in units of 64-bit instructions relative to the instruction following
+the jump instruction. Thus 'PC += 1' results in the next instruction
+to execute being two 64-bit instructions later.
+
The BPF program needs to store the return value into register R0 before doing an
``EXIT``.
--
2.40.1
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 19:21 ` Alexei Starovoitov
0 siblings, 0 replies; 8+ messages in thread
From: Alexei Starovoitov @ 2024-04-26 19:21 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf, Dave Thaler
On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com> wrote:
>
> This patch elaborates on the use of PC by expanding the PC acronym,
> explaining the units, and the relative position to which the offset
> applies.
>
> Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> ---
> Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index b44bdacd0..5592620cf 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src signed
> JSLE 0xd any PC += offset if dst <= src signed
> ======== ===== ======= ================================= ===================================================
>
> +where 'PC' denotes the program counter, and the offset to increment by
> +is in units of 64-bit instructions relative to the instruction following
> +the jump instruction. Thus 'PC += 1' results in the next instruction
> +to execute being two 64-bit instructions later.
The last part is confusing.
"two 64-bit instructions later"
I'm struggling to understand that.
Maybe say that 'PC += 1' skips execution of the next insn?
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 19:21 ` Alexei Starovoitov
0 siblings, 0 replies; 8+ messages in thread
From: Alexei Starovoitov @ 2024-04-26 19:21 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf, Dave Thaler
On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com> wrote:
>
> This patch elaborates on the use of PC by expanding the PC acronym,
> explaining the units, and the relative position to which the offset
> applies.
>
> Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> ---
> Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index b44bdacd0..5592620cf 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src signed
> JSLE 0xd any PC += offset if dst <= src signed
> ======== ===== ======= ================================= ===================================================
>
> +where 'PC' denotes the program counter, and the offset to increment by
> +is in units of 64-bit instructions relative to the instruction following
> +the jump instruction. Thus 'PC += 1' results in the next instruction
> +to execute being two 64-bit instructions later.
The last part is confusing.
"two 64-bit instructions later"
I'm struggling to understand that.
Maybe say that 'PC += 1' skips execution of the next insn?
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 19:30 ` dthaler1968=40googlemail.com
0 siblings, 0 replies; 8+ messages in thread
From: dthaler1968 @ 2024-04-26 19:30 UTC (permalink / raw)
To: 'Alexei Starovoitov'; +Cc: 'bpf', bpf
> -----Original Message-----
> From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> Sent: Friday, April 26, 2024 12:22 PM
> To: Dave Thaler <dthaler1968@googlemail.com>
> Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> <dthaler1968@gmail.com>
> Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
>
> On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> wrote:
> >
> > This patch elaborates on the use of PC by expanding the PC acronym,
> > explaining the units, and the relative position to which the offset
> > applies.
> >
> > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > ---
> > Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > b/Documentation/bpf/standardization/instruction-set.rst
> > index b44bdacd0..5592620cf 100644
> > --- a/Documentation/bpf/standardization/instruction-set.rst
> > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > @@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src
> signed
> > JSLE 0xd any PC += offset if dst <= src signed
> > ======== ===== ======= =================================
> > ===================================================
> >
> > +where 'PC' denotes the program counter, and the offset to increment
> > +by is in units of 64-bit instructions relative to the instruction
> > +following the jump instruction. Thus 'PC += 1' results in the next
> > +instruction to execute being two 64-bit instructions later.
>
> The last part is confusing.
> "two 64-bit instructions later"
> I'm struggling to understand that.
> Maybe say that 'PC += 1' skips execution of the next insn?
If the next instruction is a 64-bit immediate instruction
that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
I assumed you'd need PC += 2, in which case "PC += 1" would
not skip execution of "the next instruction" but would try to jump
into mid instruction, and fail verification.
Hence my attempt at "64-bit instruction" wording.
Alternate wording suggestions welcome.
Dave
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 19:30 ` dthaler1968=40googlemail.com
0 siblings, 0 replies; 8+ messages in thread
From: dthaler1968=40googlemail.com @ 2024-04-26 19:30 UTC (permalink / raw)
To: 'Alexei Starovoitov'; +Cc: 'bpf', bpf
> -----Original Message-----
> From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> Sent: Friday, April 26, 2024 12:22 PM
> To: Dave Thaler <dthaler1968@googlemail.com>
> Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> <dthaler1968@gmail.com>
> Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
>
> On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> wrote:
> >
> > This patch elaborates on the use of PC by expanding the PC acronym,
> > explaining the units, and the relative position to which the offset
> > applies.
> >
> > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > ---
> > Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > b/Documentation/bpf/standardization/instruction-set.rst
> > index b44bdacd0..5592620cf 100644
> > --- a/Documentation/bpf/standardization/instruction-set.rst
> > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > @@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src
> signed
> > JSLE 0xd any PC += offset if dst <= src signed
> > ======== ===== ======= =================================
> > ===================================================
> >
> > +where 'PC' denotes the program counter, and the offset to increment
> > +by is in units of 64-bit instructions relative to the instruction
> > +following the jump instruction. Thus 'PC += 1' results in the next
> > +instruction to execute being two 64-bit instructions later.
>
> The last part is confusing.
> "two 64-bit instructions later"
> I'm struggling to understand that.
> Maybe say that 'PC += 1' skips execution of the next insn?
If the next instruction is a 64-bit immediate instruction
that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
I assumed you'd need PC += 2, in which case "PC += 1" would
not skip execution of "the next instruction" but would try to jump
into mid instruction, and fail verification.
Hence my attempt at "64-bit instruction" wording.
Alternate wording suggestions welcome.
Dave
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 19:36 ` Alexei Starovoitov
0 siblings, 0 replies; 8+ messages in thread
From: Alexei Starovoitov @ 2024-04-26 19:36 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf
On Fri, Apr 26, 2024 at 12:30 PM <dthaler1968@googlemail.com> wrote:
>
> > -----Original Message-----
> > From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> > Sent: Friday, April 26, 2024 12:22 PM
> > To: Dave Thaler <dthaler1968@googlemail.com>
> > Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> > <dthaler1968@gmail.com>
> > Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
> >
> > On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> > wrote:
> > >
> > > This patch elaborates on the use of PC by expanding the PC acronym,
> > > explaining the units, and the relative position to which the offset
> > > applies.
> > >
> > > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > > ---
> > > Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> > > 1 file changed, 5 insertions(+)
> > >
> > > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > > b/Documentation/bpf/standardization/instruction-set.rst
> > > index b44bdacd0..5592620cf 100644
> > > --- a/Documentation/bpf/standardization/instruction-set.rst
> > > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > > @@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src
> > signed
> > > JSLE 0xd any PC += offset if dst <= src signed
> > > ======== ===== ======= =================================
> > > ===================================================
> > >
> > > +where 'PC' denotes the program counter, and the offset to increment
> > > +by is in units of 64-bit instructions relative to the instruction
> > > +following the jump instruction. Thus 'PC += 1' results in the next
> > > +instruction to execute being two 64-bit instructions later.
> >
> > The last part is confusing.
> > "two 64-bit instructions later"
> > I'm struggling to understand that.
> > Maybe say that 'PC += 1' skips execution of the next insn?
>
> If the next instruction is a 64-bit immediate instruction
> that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
> I assumed you'd need PC += 2, in which case "PC += 1" would
> not skip execution of "the next instruction" but would try to jump
> into mid instruction, and fail verification.
Correct.
> Hence my attempt at "64-bit instruction" wording.
>
> Alternate wording suggestions welcome.
This "jump in the middle" issue is not obvious at all from
"two 64-bit instructions" part.
Say that PC +=1 skips execution of the next insn if it's a 64-bit insn
and fails verification if the next insn is 128-bit.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
@ 2024-04-26 19:36 ` Alexei Starovoitov
0 siblings, 0 replies; 8+ messages in thread
From: Alexei Starovoitov @ 2024-04-26 19:36 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf
On Fri, Apr 26, 2024 at 12:30 PM <dthaler1968@googlemail.com> wrote:
>
> > -----Original Message-----
> > From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> > Sent: Friday, April 26, 2024 12:22 PM
> > To: Dave Thaler <dthaler1968@googlemail.com>
> > Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> > <dthaler1968@gmail.com>
> > Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
> >
> > On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> > wrote:
> > >
> > > This patch elaborates on the use of PC by expanding the PC acronym,
> > > explaining the units, and the relative position to which the offset
> > > applies.
> > >
> > > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > > ---
> > > Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> > > 1 file changed, 5 insertions(+)
> > >
> > > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > > b/Documentation/bpf/standardization/instruction-set.rst
> > > index b44bdacd0..5592620cf 100644
> > > --- a/Documentation/bpf/standardization/instruction-set.rst
> > > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > > @@ -469,6 +469,11 @@ JSLT 0xc any PC += offset if dst < src
> > signed
> > > JSLE 0xd any PC += offset if dst <= src signed
> > > ======== ===== ======= =================================
> > > ===================================================
> > >
> > > +where 'PC' denotes the program counter, and the offset to increment
> > > +by is in units of 64-bit instructions relative to the instruction
> > > +following the jump instruction. Thus 'PC += 1' results in the next
> > > +instruction to execute being two 64-bit instructions later.
> >
> > The last part is confusing.
> > "two 64-bit instructions later"
> > I'm struggling to understand that.
> > Maybe say that 'PC += 1' skips execution of the next insn?
>
> If the next instruction is a 64-bit immediate instruction
> that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
> I assumed you'd need PC += 2, in which case "PC += 1" would
> not skip execution of "the next instruction" but would try to jump
> into mid instruction, and fail verification.
Correct.
> Hence my attempt at "64-bit instruction" wording.
>
> Alternate wording suggestions welcome.
This "jump in the middle" issue is not obvious at all from
"two 64-bit instructions" part.
Say that PC +=1 skips execution of the next insn if it's a 64-bit insn
and fails verification if the next insn is 128-bit.
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-04-26 19:37 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-04-26 17:11 [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst Dave Thaler
2024-04-26 17:11 ` [Bpf] " Dave Thaler
2024-04-26 19:21 ` Alexei Starovoitov
2024-04-26 19:21 ` [Bpf] " Alexei Starovoitov
2024-04-26 19:30 ` dthaler1968
2024-04-26 19:30 ` [Bpf] " dthaler1968=40googlemail.com
2024-04-26 19:36 ` Alexei Starovoitov
2024-04-26 19:36 ` [Bpf] " Alexei Starovoitov
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.