* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-04-20 9:25 ` pi-cheng.chen
0 siblings, 0 replies; 13+ messages in thread
From: pi-cheng.chen @ 2015-04-20 9:25 UTC (permalink / raw)
To: Mike Turquette, Stephen Boyd, Matthias Brugger, Sascha Hauer
Cc: Henry Chen, James Liao, fan.chen, Eddie Huang, Joe.C,
pi-cheng.chen, linux-kernel, linux-arm-kernel, devicetree,
linaro-kernel, linux-mediatek
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
intermediate clock source switching. It is based on v11 of common clock support
for Mediatek MT8135 and MT8173[1]
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
Changes in v2:
- Remove use of .determine_rate callback
Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
---
drivers/clk/mediatek/Makefile | 2 +-
drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
include/dt-bindings/clock/mt8173-clk.h | 4 +-
5 files changed, 180 insertions(+), 2 deletions(-)
create mode 100644 drivers/clk/mediatek/clk-cpumux.c
create mode 100644 drivers/clk/mediatek/clk-cpumux.h
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 8e4b2a4..299917a 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,4 +1,4 @@
-obj-y += clk-mtk.o clk-pll.o clk-gate.o
+obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
obj-$(CONFIG_RESET_CONTROLLER) += reset.o
obj-y += clk-mt8135.o
obj-y += clk-mt8173.o
diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
new file mode 100644
index 0000000..dc14074
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/mfd/syscon.h>
+#include <linux/slab.h>
+
+#include "clk-mtk.h"
+#include "clk-cpumux.h"
+
+static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
+{
+ return container_of(_hw, struct mtk_clk_cpumux, hw);
+}
+
+static u8 clk_cpumux_get_parent(struct clk_hw *hw)
+{
+ struct mtk_clk_cpumux *mux = to_clk_mux(hw);
+ int num_parents = __clk_get_num_parents(hw->clk);
+ u32 val;
+
+ regmap_read(mux->regmap, mux->reg, &val);
+
+ val >>= mux->shift;
+ val &= mux->mask;
+
+ if (val >= num_parents)
+ return -EINVAL;
+
+ return val;
+}
+
+static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct mtk_clk_cpumux *mux = to_clk_mux(hw);
+ u32 mask, val;
+
+ val = index << mux->shift;
+ mask = mux->mask << mux->shift;
+
+ return regmap_update_bits(mux->regmap, mux->reg, mask, val);
+}
+
+static struct clk_ops clk_cpumux_ops = {
+ .get_parent = clk_cpumux_get_parent,
+ .set_parent = clk_cpumux_set_parent,
+};
+
+static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
+ struct regmap *regmap)
+{
+ struct mtk_clk_cpumux *cpumux;
+ struct clk *clk;
+ struct clk_init_data init;
+
+ cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
+ if (!cpumux)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = mux->name;
+ init.ops = &clk_cpumux_ops;
+ init.parent_names = mux->parent_names;
+ init.num_parents = mux->num_parents;
+
+ cpumux->reg = mux->mux_reg;
+ cpumux->shift = mux->mux_shift;
+ cpumux->mask = (BIT(mux->mux_width) - 1);
+ cpumux->regmap = regmap;
+ cpumux->hw.init = &init;
+
+ clk = clk_register(NULL, &cpumux->hw);
+ if (IS_ERR(clk))
+ kfree(cpumux);
+
+ return clk;
+}
+
+int mtk_clk_register_cpumuxes(struct device_node *node,
+ const struct mtk_composite *clks, int num,
+ struct clk_onecell_data *clk_data)
+{
+ int i;
+ struct clk *clk;
+ struct regmap *regmap;
+
+ if (!clk_data)
+ return -ENOMEM;
+
+ regmap = syscon_node_to_regmap(node);
+ if (IS_ERR(regmap)) {
+ pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ for (i = 0; i < num; i++) {
+ const struct mtk_composite *mux = &clks[i];
+
+ clk = mtk_clk_register_cpumux(mux, regmap);
+ if (IS_ERR(clk)) {
+ pr_err("Failed to register clk %s: %ld\n",
+ mux->name, PTR_ERR(clk));
+ continue;
+ }
+
+ clk_data->clks[mux->id] = clk;
+ }
+
+ return 0;
+}
diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
new file mode 100644
index 0000000..b82ad20
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DRV_CLK_CPUMUX_H
+#define __DRV_CLK_CPUMUX_H
+
+#include <linux/regmap.h>
+
+struct mtk_clk_cpumux {
+ struct clk_hw hw;
+ struct regmap *regmap;
+ u32 reg;
+ u32 mask;
+ u8 shift;
+};
+
+int mtk_clk_register_cpumuxes(struct device_node *node,
+ const struct mtk_composite *clks, int num,
+ struct clk_onecell_data *clk_data);
+#endif /* __DRV_CLK_CPUMUX_H */
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
index 0584554..745f9d9 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -19,6 +19,7 @@
#include "clk-mtk.h"
#include "clk-gate.h"
+#include "clk-cpumux.h"
#include <dt-bindings/clock/mt8173-clk.h>
@@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
"apll2_div5"
};
+static const char * const ca53_parents[] __initconst = {
+ "clk26m",
+ "armca7pll",
+ "mainpll",
+ "univpll"
+};
+
+static const char * const ca57_parents[] __initconst = {
+ "clk26m",
+ "armca15pll",
+ "mainpll",
+ "univpll"
+};
+
static const struct mtk_composite top_muxes[] __initconst = {
/* CLK_CFG_0 */
MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
@@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
};
+static const struct mtk_composite cpu_muxes[] __initconst = {
+ MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
+ MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
+};
+
static void __init mtk_init_clk_topckgen(void __iomem *top_base,
struct clk_onecell_data *clk_data)
{
@@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
clk_data);
+ mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
+ clk_data);
+
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
index e648b28..2503b03 100644
--- a/include/dt-bindings/clock/mt8173-clk.h
+++ b/include/dt-bindings/clock/mt8173-clk.h
@@ -187,7 +187,9 @@
#define INFRA_CEC 9
#define INFRA_PMICSPI 10
#define INFRA_PMICWRAP 11
-#define INFRA_NR_CLK 12
+#define INFRA_CA53SEL 12
+#define INFRA_CA57SEL 13
+#define INFRA_NR_CLK 14
/* PERI_SYS */
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-04-20 9:25 ` pi-cheng.chen
0 siblings, 0 replies; 13+ messages in thread
From: pi-cheng.chen @ 2015-04-20 9:25 UTC (permalink / raw)
To: Mike Turquette, Stephen Boyd, Matthias Brugger, Sascha Hauer
Cc: Henry Chen, James Liao, fan.chen-NuS5LvNUpcJWk0Htik3J/w,
Eddie Huang, Joe.C, pi-cheng.chen,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
intermediate clock source switching. It is based on v11 of common clock support
for Mediatek MT8135 and MT8173[1]
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
Changes in v2:
- Remove use of .determine_rate callback
Signed-off-by: pi-cheng.chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
drivers/clk/mediatek/Makefile | 2 +-
drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
include/dt-bindings/clock/mt8173-clk.h | 4 +-
5 files changed, 180 insertions(+), 2 deletions(-)
create mode 100644 drivers/clk/mediatek/clk-cpumux.c
create mode 100644 drivers/clk/mediatek/clk-cpumux.h
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 8e4b2a4..299917a 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,4 +1,4 @@
-obj-y += clk-mtk.o clk-pll.o clk-gate.o
+obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
obj-$(CONFIG_RESET_CONTROLLER) += reset.o
obj-y += clk-mt8135.o
obj-y += clk-mt8173.o
diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
new file mode 100644
index 0000000..dc14074
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/mfd/syscon.h>
+#include <linux/slab.h>
+
+#include "clk-mtk.h"
+#include "clk-cpumux.h"
+
+static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
+{
+ return container_of(_hw, struct mtk_clk_cpumux, hw);
+}
+
+static u8 clk_cpumux_get_parent(struct clk_hw *hw)
+{
+ struct mtk_clk_cpumux *mux = to_clk_mux(hw);
+ int num_parents = __clk_get_num_parents(hw->clk);
+ u32 val;
+
+ regmap_read(mux->regmap, mux->reg, &val);
+
+ val >>= mux->shift;
+ val &= mux->mask;
+
+ if (val >= num_parents)
+ return -EINVAL;
+
+ return val;
+}
+
+static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct mtk_clk_cpumux *mux = to_clk_mux(hw);
+ u32 mask, val;
+
+ val = index << mux->shift;
+ mask = mux->mask << mux->shift;
+
+ return regmap_update_bits(mux->regmap, mux->reg, mask, val);
+}
+
+static struct clk_ops clk_cpumux_ops = {
+ .get_parent = clk_cpumux_get_parent,
+ .set_parent = clk_cpumux_set_parent,
+};
+
+static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
+ struct regmap *regmap)
+{
+ struct mtk_clk_cpumux *cpumux;
+ struct clk *clk;
+ struct clk_init_data init;
+
+ cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
+ if (!cpumux)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = mux->name;
+ init.ops = &clk_cpumux_ops;
+ init.parent_names = mux->parent_names;
+ init.num_parents = mux->num_parents;
+
+ cpumux->reg = mux->mux_reg;
+ cpumux->shift = mux->mux_shift;
+ cpumux->mask = (BIT(mux->mux_width) - 1);
+ cpumux->regmap = regmap;
+ cpumux->hw.init = &init;
+
+ clk = clk_register(NULL, &cpumux->hw);
+ if (IS_ERR(clk))
+ kfree(cpumux);
+
+ return clk;
+}
+
+int mtk_clk_register_cpumuxes(struct device_node *node,
+ const struct mtk_composite *clks, int num,
+ struct clk_onecell_data *clk_data)
+{
+ int i;
+ struct clk *clk;
+ struct regmap *regmap;
+
+ if (!clk_data)
+ return -ENOMEM;
+
+ regmap = syscon_node_to_regmap(node);
+ if (IS_ERR(regmap)) {
+ pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ for (i = 0; i < num; i++) {
+ const struct mtk_composite *mux = &clks[i];
+
+ clk = mtk_clk_register_cpumux(mux, regmap);
+ if (IS_ERR(clk)) {
+ pr_err("Failed to register clk %s: %ld\n",
+ mux->name, PTR_ERR(clk));
+ continue;
+ }
+
+ clk_data->clks[mux->id] = clk;
+ }
+
+ return 0;
+}
diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
new file mode 100644
index 0000000..b82ad20
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DRV_CLK_CPUMUX_H
+#define __DRV_CLK_CPUMUX_H
+
+#include <linux/regmap.h>
+
+struct mtk_clk_cpumux {
+ struct clk_hw hw;
+ struct regmap *regmap;
+ u32 reg;
+ u32 mask;
+ u8 shift;
+};
+
+int mtk_clk_register_cpumuxes(struct device_node *node,
+ const struct mtk_composite *clks, int num,
+ struct clk_onecell_data *clk_data);
+#endif /* __DRV_CLK_CPUMUX_H */
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
index 0584554..745f9d9 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -19,6 +19,7 @@
#include "clk-mtk.h"
#include "clk-gate.h"
+#include "clk-cpumux.h"
#include <dt-bindings/clock/mt8173-clk.h>
@@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
"apll2_div5"
};
+static const char * const ca53_parents[] __initconst = {
+ "clk26m",
+ "armca7pll",
+ "mainpll",
+ "univpll"
+};
+
+static const char * const ca57_parents[] __initconst = {
+ "clk26m",
+ "armca15pll",
+ "mainpll",
+ "univpll"
+};
+
static const struct mtk_composite top_muxes[] __initconst = {
/* CLK_CFG_0 */
MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
@@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
};
+static const struct mtk_composite cpu_muxes[] __initconst = {
+ MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
+ MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
+};
+
static void __init mtk_init_clk_topckgen(void __iomem *top_base,
struct clk_onecell_data *clk_data)
{
@@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
clk_data);
+ mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
+ clk_data);
+
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
index e648b28..2503b03 100644
--- a/include/dt-bindings/clock/mt8173-clk.h
+++ b/include/dt-bindings/clock/mt8173-clk.h
@@ -187,7 +187,9 @@
#define INFRA_CEC 9
#define INFRA_PMICSPI 10
#define INFRA_PMICWRAP 11
-#define INFRA_NR_CLK 12
+#define INFRA_CA53SEL 12
+#define INFRA_CA57SEL 13
+#define INFRA_NR_CLK 14
/* PERI_SYS */
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-04-20 9:25 ` pi-cheng.chen
0 siblings, 0 replies; 13+ messages in thread
From: pi-cheng.chen @ 2015-04-20 9:25 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
intermediate clock source switching. It is based on v11 of common clock support
for Mediatek MT8135 and MT8173[1]
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
Changes in v2:
- Remove use of .determine_rate callback
Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
---
drivers/clk/mediatek/Makefile | 2 +-
drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
include/dt-bindings/clock/mt8173-clk.h | 4 +-
5 files changed, 180 insertions(+), 2 deletions(-)
create mode 100644 drivers/clk/mediatek/clk-cpumux.c
create mode 100644 drivers/clk/mediatek/clk-cpumux.h
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 8e4b2a4..299917a 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,4 +1,4 @@
-obj-y += clk-mtk.o clk-pll.o clk-gate.o
+obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
obj-$(CONFIG_RESET_CONTROLLER) += reset.o
obj-y += clk-mt8135.o
obj-y += clk-mt8173.o
diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
new file mode 100644
index 0000000..dc14074
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/mfd/syscon.h>
+#include <linux/slab.h>
+
+#include "clk-mtk.h"
+#include "clk-cpumux.h"
+
+static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
+{
+ return container_of(_hw, struct mtk_clk_cpumux, hw);
+}
+
+static u8 clk_cpumux_get_parent(struct clk_hw *hw)
+{
+ struct mtk_clk_cpumux *mux = to_clk_mux(hw);
+ int num_parents = __clk_get_num_parents(hw->clk);
+ u32 val;
+
+ regmap_read(mux->regmap, mux->reg, &val);
+
+ val >>= mux->shift;
+ val &= mux->mask;
+
+ if (val >= num_parents)
+ return -EINVAL;
+
+ return val;
+}
+
+static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct mtk_clk_cpumux *mux = to_clk_mux(hw);
+ u32 mask, val;
+
+ val = index << mux->shift;
+ mask = mux->mask << mux->shift;
+
+ return regmap_update_bits(mux->regmap, mux->reg, mask, val);
+}
+
+static struct clk_ops clk_cpumux_ops = {
+ .get_parent = clk_cpumux_get_parent,
+ .set_parent = clk_cpumux_set_parent,
+};
+
+static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
+ struct regmap *regmap)
+{
+ struct mtk_clk_cpumux *cpumux;
+ struct clk *clk;
+ struct clk_init_data init;
+
+ cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
+ if (!cpumux)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = mux->name;
+ init.ops = &clk_cpumux_ops;
+ init.parent_names = mux->parent_names;
+ init.num_parents = mux->num_parents;
+
+ cpumux->reg = mux->mux_reg;
+ cpumux->shift = mux->mux_shift;
+ cpumux->mask = (BIT(mux->mux_width) - 1);
+ cpumux->regmap = regmap;
+ cpumux->hw.init = &init;
+
+ clk = clk_register(NULL, &cpumux->hw);
+ if (IS_ERR(clk))
+ kfree(cpumux);
+
+ return clk;
+}
+
+int mtk_clk_register_cpumuxes(struct device_node *node,
+ const struct mtk_composite *clks, int num,
+ struct clk_onecell_data *clk_data)
+{
+ int i;
+ struct clk *clk;
+ struct regmap *regmap;
+
+ if (!clk_data)
+ return -ENOMEM;
+
+ regmap = syscon_node_to_regmap(node);
+ if (IS_ERR(regmap)) {
+ pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ for (i = 0; i < num; i++) {
+ const struct mtk_composite *mux = &clks[i];
+
+ clk = mtk_clk_register_cpumux(mux, regmap);
+ if (IS_ERR(clk)) {
+ pr_err("Failed to register clk %s: %ld\n",
+ mux->name, PTR_ERR(clk));
+ continue;
+ }
+
+ clk_data->clks[mux->id] = clk;
+ }
+
+ return 0;
+}
diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
new file mode 100644
index 0000000..b82ad20
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DRV_CLK_CPUMUX_H
+#define __DRV_CLK_CPUMUX_H
+
+#include <linux/regmap.h>
+
+struct mtk_clk_cpumux {
+ struct clk_hw hw;
+ struct regmap *regmap;
+ u32 reg;
+ u32 mask;
+ u8 shift;
+};
+
+int mtk_clk_register_cpumuxes(struct device_node *node,
+ const struct mtk_composite *clks, int num,
+ struct clk_onecell_data *clk_data);
+#endif /* __DRV_CLK_CPUMUX_H */
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
index 0584554..745f9d9 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -19,6 +19,7 @@
#include "clk-mtk.h"
#include "clk-gate.h"
+#include "clk-cpumux.h"
#include <dt-bindings/clock/mt8173-clk.h>
@@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
"apll2_div5"
};
+static const char * const ca53_parents[] __initconst = {
+ "clk26m",
+ "armca7pll",
+ "mainpll",
+ "univpll"
+};
+
+static const char * const ca57_parents[] __initconst = {
+ "clk26m",
+ "armca15pll",
+ "mainpll",
+ "univpll"
+};
+
static const struct mtk_composite top_muxes[] __initconst = {
/* CLK_CFG_0 */
MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
@@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
};
+static const struct mtk_composite cpu_muxes[] __initconst = {
+ MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
+ MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
+};
+
static void __init mtk_init_clk_topckgen(void __iomem *top_base,
struct clk_onecell_data *clk_data)
{
@@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
clk_data);
+ mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
+ clk_data);
+
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
index e648b28..2503b03 100644
--- a/include/dt-bindings/clock/mt8173-clk.h
+++ b/include/dt-bindings/clock/mt8173-clk.h
@@ -187,7 +187,9 @@
#define INFRA_CEC 9
#define INFRA_PMICSPI 10
#define INFRA_PMICWRAP 11
-#define INFRA_NR_CLK 12
+#define INFRA_CA53SEL 12
+#define INFRA_CA57SEL 13
+#define INFRA_NR_CLK 14
/* PERI_SYS */
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
2015-04-20 9:25 ` pi-cheng.chen
@ 2015-05-15 6:16 ` Ricky Liang
-1 siblings, 0 replies; 13+ messages in thread
From: Ricky Liang @ 2015-05-15 6:16 UTC (permalink / raw)
To: pi-cheng.chen
Cc: Mike Turquette, Stephen Boyd, Matthias Brugger, Sascha Hauer,
James Liao, linaro-kernel, open list:OPEN FIRMWARE AND...,
open list, Henry Chen, fan.chen, linux-mediatek, Joe.C,
Eddie Huang, linux-arm-kernel
On Mon, Apr 20, 2015 at 5:25 PM, pi-cheng.chen <pi-cheng.chen@linaro.org> wrote:
> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
> intermediate clock source switching. It is based on v11 of common clock support
> for Mediatek MT8135 and MT8173[1]
>
> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
>
> Changes in v2:
> - Remove use of .determine_rate callback
>
> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
> ---
> drivers/clk/mediatek/Makefile | 2 +-
> drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
> drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
> drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
> include/dt-bindings/clock/mt8173-clk.h | 4 +-
> 5 files changed, 180 insertions(+), 2 deletions(-)
> create mode 100644 drivers/clk/mediatek/clk-cpumux.c
> create mode 100644 drivers/clk/mediatek/clk-cpumux.h
>
> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
> index 8e4b2a4..299917a 100644
> --- a/drivers/clk/mediatek/Makefile
> +++ b/drivers/clk/mediatek/Makefile
> @@ -1,4 +1,4 @@
> -obj-y += clk-mtk.o clk-pll.o clk-gate.o
> +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
> obj-y += clk-mt8135.o
> obj-y += clk-mt8173.o
> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
> new file mode 100644
> index 0000000..dc14074
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/slab.h>
> +
> +#include "clk-mtk.h"
> +#include "clk-cpumux.h"
> +
> +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
> +{
> + return container_of(_hw, struct mtk_clk_cpumux, hw);
> +}
> +
> +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
> +{
> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
> + int num_parents = __clk_get_num_parents(hw->clk);
> + u32 val;
> +
> + regmap_read(mux->regmap, mux->reg, &val);
> +
> + val >>= mux->shift;
> + val &= mux->mask;
> +
> + if (val >= num_parents)
> + return -EINVAL;
> +
> + return val;
> +}
> +
> +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
> +{
> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
> + u32 mask, val;
> +
> + val = index << mux->shift;
> + mask = mux->mask << mux->shift;
> +
> + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
> +}
> +
> +static struct clk_ops clk_cpumux_ops = {
> + .get_parent = clk_cpumux_get_parent,
> + .set_parent = clk_cpumux_set_parent,
> +};
> +
> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
> + struct regmap *regmap)
> +{
> + struct mtk_clk_cpumux *cpumux;
> + struct clk *clk;
> + struct clk_init_data init;
> +
> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
> + if (!cpumux)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = mux->name;
> + init.ops = &clk_cpumux_ops;
> + init.parent_names = mux->parent_names;
> + init.num_parents = mux->num_parents;
To be safe, please set
init.flags = mux->flags;
here
> +
> + cpumux->reg = mux->mux_reg;
> + cpumux->shift = mux->mux_shift;
> + cpumux->mask = (BIT(mux->mux_width) - 1);
> + cpumux->regmap = regmap;
> + cpumux->hw.init = &init;
> +
> + clk = clk_register(NULL, &cpumux->hw);
> + if (IS_ERR(clk))
> + kfree(cpumux);
> +
> + return clk;
> +}
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data)
> +{
> + int i;
> + struct clk *clk;
> + struct regmap *regmap;
> +
> + if (!clk_data)
> + return -ENOMEM;
> +
> + regmap = syscon_node_to_regmap(node);
> + if (IS_ERR(regmap)) {
> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
> + PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> + for (i = 0; i < num; i++) {
> + const struct mtk_composite *mux = &clks[i];
> +
> + clk = mtk_clk_register_cpumux(mux, regmap);
> + if (IS_ERR(clk)) {
> + pr_err("Failed to register clk %s: %ld\n",
> + mux->name, PTR_ERR(clk));
> + continue;
> + }
> +
> + clk_data->clks[mux->id] = clk;
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
> new file mode 100644
> index 0000000..b82ad20
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.h
> @@ -0,0 +1,31 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __DRV_CLK_CPUMUX_H
> +#define __DRV_CLK_CPUMUX_H
> +
> +#include <linux/regmap.h>
> +
> +struct mtk_clk_cpumux {
> + struct clk_hw hw;
> + struct regmap *regmap;
> + u32 reg;
> + u32 mask;
> + u8 shift;
> +};
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data);
> +#endif /* __DRV_CLK_CPUMUX_H */
> diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
> index 0584554..745f9d9 100644
> --- a/drivers/clk/mediatek/clk-mt8173.c
> +++ b/drivers/clk/mediatek/clk-mt8173.c
> @@ -19,6 +19,7 @@
>
> #include "clk-mtk.h"
> #include "clk-gate.h"
> +#include "clk-cpumux.h"
>
> #include <dt-bindings/clock/mt8173-clk.h>
>
> @@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
> "apll2_div5"
> };
>
> +static const char * const ca53_parents[] __initconst = {
> + "clk26m",
> + "armca7pll",
> + "mainpll",
> + "univpll"
> +};
> +
> +static const char * const ca57_parents[] __initconst = {
> + "clk26m",
> + "armca15pll",
> + "mainpll",
> + "univpll"
> +};
> +
> static const struct mtk_composite top_muxes[] __initconst = {
> /* CLK_CFG_0 */
> MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
> @@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
> MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
> };
>
> +static const struct mtk_composite cpu_muxes[] __initconst = {
> + MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
> + MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
> +};
> +
> static void __init mtk_init_clk_topckgen(void __iomem *top_base,
> struct clk_onecell_data *clk_data)
> {
> @@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
> mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
> clk_data);
>
> + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
> + clk_data);
> +
> r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> if (r)
> pr_err("%s(): could not register clock provider: %d\n",
> diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
> index e648b28..2503b03 100644
> --- a/include/dt-bindings/clock/mt8173-clk.h
> +++ b/include/dt-bindings/clock/mt8173-clk.h
> @@ -187,7 +187,9 @@
> #define INFRA_CEC 9
> #define INFRA_PMICSPI 10
> #define INFRA_PMICWRAP 11
> -#define INFRA_NR_CLK 12
> +#define INFRA_CA53SEL 12
> +#define INFRA_CA57SEL 13
> +#define INFRA_NR_CLK 14
>
> /* PERI_SYS */
>
> --
> 1.9.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-15 6:16 ` Ricky Liang
0 siblings, 0 replies; 13+ messages in thread
From: Ricky Liang @ 2015-05-15 6:16 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 20, 2015 at 5:25 PM, pi-cheng.chen <pi-cheng.chen@linaro.org> wrote:
> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
> intermediate clock source switching. It is based on v11 of common clock support
> for Mediatek MT8135 and MT8173[1]
>
> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
>
> Changes in v2:
> - Remove use of .determine_rate callback
>
> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
> ---
> drivers/clk/mediatek/Makefile | 2 +-
> drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
> drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
> drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
> include/dt-bindings/clock/mt8173-clk.h | 4 +-
> 5 files changed, 180 insertions(+), 2 deletions(-)
> create mode 100644 drivers/clk/mediatek/clk-cpumux.c
> create mode 100644 drivers/clk/mediatek/clk-cpumux.h
>
> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
> index 8e4b2a4..299917a 100644
> --- a/drivers/clk/mediatek/Makefile
> +++ b/drivers/clk/mediatek/Makefile
> @@ -1,4 +1,4 @@
> -obj-y += clk-mtk.o clk-pll.o clk-gate.o
> +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
> obj-y += clk-mt8135.o
> obj-y += clk-mt8173.o
> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
> new file mode 100644
> index 0000000..dc14074
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/slab.h>
> +
> +#include "clk-mtk.h"
> +#include "clk-cpumux.h"
> +
> +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
> +{
> + return container_of(_hw, struct mtk_clk_cpumux, hw);
> +}
> +
> +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
> +{
> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
> + int num_parents = __clk_get_num_parents(hw->clk);
> + u32 val;
> +
> + regmap_read(mux->regmap, mux->reg, &val);
> +
> + val >>= mux->shift;
> + val &= mux->mask;
> +
> + if (val >= num_parents)
> + return -EINVAL;
> +
> + return val;
> +}
> +
> +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
> +{
> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
> + u32 mask, val;
> +
> + val = index << mux->shift;
> + mask = mux->mask << mux->shift;
> +
> + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
> +}
> +
> +static struct clk_ops clk_cpumux_ops = {
> + .get_parent = clk_cpumux_get_parent,
> + .set_parent = clk_cpumux_set_parent,
> +};
> +
> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
> + struct regmap *regmap)
> +{
> + struct mtk_clk_cpumux *cpumux;
> + struct clk *clk;
> + struct clk_init_data init;
> +
> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
> + if (!cpumux)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = mux->name;
> + init.ops = &clk_cpumux_ops;
> + init.parent_names = mux->parent_names;
> + init.num_parents = mux->num_parents;
To be safe, please set
init.flags = mux->flags;
here
> +
> + cpumux->reg = mux->mux_reg;
> + cpumux->shift = mux->mux_shift;
> + cpumux->mask = (BIT(mux->mux_width) - 1);
> + cpumux->regmap = regmap;
> + cpumux->hw.init = &init;
> +
> + clk = clk_register(NULL, &cpumux->hw);
> + if (IS_ERR(clk))
> + kfree(cpumux);
> +
> + return clk;
> +}
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data)
> +{
> + int i;
> + struct clk *clk;
> + struct regmap *regmap;
> +
> + if (!clk_data)
> + return -ENOMEM;
> +
> + regmap = syscon_node_to_regmap(node);
> + if (IS_ERR(regmap)) {
> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
> + PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> + for (i = 0; i < num; i++) {
> + const struct mtk_composite *mux = &clks[i];
> +
> + clk = mtk_clk_register_cpumux(mux, regmap);
> + if (IS_ERR(clk)) {
> + pr_err("Failed to register clk %s: %ld\n",
> + mux->name, PTR_ERR(clk));
> + continue;
> + }
> +
> + clk_data->clks[mux->id] = clk;
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
> new file mode 100644
> index 0000000..b82ad20
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.h
> @@ -0,0 +1,31 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __DRV_CLK_CPUMUX_H
> +#define __DRV_CLK_CPUMUX_H
> +
> +#include <linux/regmap.h>
> +
> +struct mtk_clk_cpumux {
> + struct clk_hw hw;
> + struct regmap *regmap;
> + u32 reg;
> + u32 mask;
> + u8 shift;
> +};
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data);
> +#endif /* __DRV_CLK_CPUMUX_H */
> diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
> index 0584554..745f9d9 100644
> --- a/drivers/clk/mediatek/clk-mt8173.c
> +++ b/drivers/clk/mediatek/clk-mt8173.c
> @@ -19,6 +19,7 @@
>
> #include "clk-mtk.h"
> #include "clk-gate.h"
> +#include "clk-cpumux.h"
>
> #include <dt-bindings/clock/mt8173-clk.h>
>
> @@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
> "apll2_div5"
> };
>
> +static const char * const ca53_parents[] __initconst = {
> + "clk26m",
> + "armca7pll",
> + "mainpll",
> + "univpll"
> +};
> +
> +static const char * const ca57_parents[] __initconst = {
> + "clk26m",
> + "armca15pll",
> + "mainpll",
> + "univpll"
> +};
> +
> static const struct mtk_composite top_muxes[] __initconst = {
> /* CLK_CFG_0 */
> MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
> @@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
> MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
> };
>
> +static const struct mtk_composite cpu_muxes[] __initconst = {
> + MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
> + MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
> +};
> +
> static void __init mtk_init_clk_topckgen(void __iomem *top_base,
> struct clk_onecell_data *clk_data)
> {
> @@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
> mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
> clk_data);
>
> + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
> + clk_data);
> +
> r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> if (r)
> pr_err("%s(): could not register clock provider: %d\n",
> diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
> index e648b28..2503b03 100644
> --- a/include/dt-bindings/clock/mt8173-clk.h
> +++ b/include/dt-bindings/clock/mt8173-clk.h
> @@ -187,7 +187,9 @@
> #define INFRA_CEC 9
> #define INFRA_PMICSPI 10
> #define INFRA_PMICWRAP 11
> -#define INFRA_NR_CLK 12
> +#define INFRA_CA53SEL 12
> +#define INFRA_CA57SEL 13
> +#define INFRA_NR_CLK 14
>
> /* PERI_SYS */
>
> --
> 1.9.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
2015-04-20 9:25 ` pi-cheng.chen
@ 2015-05-15 19:00 ` Stephen Boyd
-1 siblings, 0 replies; 13+ messages in thread
From: Stephen Boyd @ 2015-05-15 19:00 UTC (permalink / raw)
To: pi-cheng.chen
Cc: Mike Turquette, Matthias Brugger, Sascha Hauer, Henry Chen,
James Liao, fan.chen, Eddie Huang, Joe.C, linux-kernel,
linux-arm-kernel, devicetree, linaro-kernel, linux-mediatek
On 04/20, pi-cheng.chen wrote:
> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
> new file mode 100644
> index 0000000..dc14074
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
Do you need this include for some reason?
> +#include <linux/clk-provider.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/slab.h>
> +
> +#include "clk-mtk.h"
> +#include "clk-cpumux.h"
> +
[...]
> +
> +static struct clk_ops clk_cpumux_ops = {
const?
> + .get_parent = clk_cpumux_get_parent,
> + .set_parent = clk_cpumux_set_parent,
> +};
> +
> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
> + struct regmap *regmap)
> +{
> + struct mtk_clk_cpumux *cpumux;
> + struct clk *clk;
> + struct clk_init_data init;
> +
> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
> + if (!cpumux)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = mux->name;
> + init.ops = &clk_cpumux_ops;
> + init.parent_names = mux->parent_names;
> + init.num_parents = mux->num_parents;
> +
> + cpumux->reg = mux->mux_reg;
> + cpumux->shift = mux->mux_shift;
> + cpumux->mask = (BIT(mux->mux_width) - 1);
Unnecessary parenthesis.
> + cpumux->regmap = regmap;
> + cpumux->hw.init = &init;
> +
> + clk = clk_register(NULL, &cpumux->hw);
> + if (IS_ERR(clk))
> + kfree(cpumux);
> +
> + return clk;
> +}
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data)
> +{
> + int i;
> + struct clk *clk;
> + struct regmap *regmap;
> +
> + if (!clk_data)
> + return -ENOMEM;
Why would we call the function with NULL clk_data? Please remove
this check.
> +
> + regmap = syscon_node_to_regmap(node);
> + if (IS_ERR(regmap)) {
> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
> + PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
> new file mode 100644
> index 0000000..b82ad20
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.h
> @@ -0,0 +1,31 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __DRV_CLK_CPUMUX_H
> +#define __DRV_CLK_CPUMUX_H
> +
> +#include <linux/regmap.h>
Looks unnecessary. Just forward declare the type you need, struct
regmap.
> +
> +struct mtk_clk_cpumux {
> + struct clk_hw hw;
> + struct regmap *regmap;
> + u32 reg;
> + u32 mask;
> + u8 shift;
> +};
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data);
> +#endif /* __DRV_CLK_CPUMUX_H */
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-15 19:00 ` Stephen Boyd
0 siblings, 0 replies; 13+ messages in thread
From: Stephen Boyd @ 2015-05-15 19:00 UTC (permalink / raw)
To: linux-arm-kernel
On 04/20, pi-cheng.chen wrote:
> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
> new file mode 100644
> index 0000000..dc14074
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
Do you need this include for some reason?
> +#include <linux/clk-provider.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/slab.h>
> +
> +#include "clk-mtk.h"
> +#include "clk-cpumux.h"
> +
[...]
> +
> +static struct clk_ops clk_cpumux_ops = {
const?
> + .get_parent = clk_cpumux_get_parent,
> + .set_parent = clk_cpumux_set_parent,
> +};
> +
> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
> + struct regmap *regmap)
> +{
> + struct mtk_clk_cpumux *cpumux;
> + struct clk *clk;
> + struct clk_init_data init;
> +
> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
> + if (!cpumux)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = mux->name;
> + init.ops = &clk_cpumux_ops;
> + init.parent_names = mux->parent_names;
> + init.num_parents = mux->num_parents;
> +
> + cpumux->reg = mux->mux_reg;
> + cpumux->shift = mux->mux_shift;
> + cpumux->mask = (BIT(mux->mux_width) - 1);
Unnecessary parenthesis.
> + cpumux->regmap = regmap;
> + cpumux->hw.init = &init;
> +
> + clk = clk_register(NULL, &cpumux->hw);
> + if (IS_ERR(clk))
> + kfree(cpumux);
> +
> + return clk;
> +}
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data)
> +{
> + int i;
> + struct clk *clk;
> + struct regmap *regmap;
> +
> + if (!clk_data)
> + return -ENOMEM;
Why would we call the function with NULL clk_data? Please remove
this check.
> +
> + regmap = syscon_node_to_regmap(node);
> + if (IS_ERR(regmap)) {
> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
> + PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
> new file mode 100644
> index 0000000..b82ad20
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-cpumux.h
> @@ -0,0 +1,31 @@
> +/*
> + * Copyright (c) 2015 Linaro Ltd.
> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __DRV_CLK_CPUMUX_H
> +#define __DRV_CLK_CPUMUX_H
> +
> +#include <linux/regmap.h>
Looks unnecessary. Just forward declare the type you need, struct
regmap.
> +
> +struct mtk_clk_cpumux {
> + struct clk_hw hw;
> + struct regmap *regmap;
> + u32 reg;
> + u32 mask;
> + u8 shift;
> +};
> +
> +int mtk_clk_register_cpumuxes(struct device_node *node,
> + const struct mtk_composite *clks, int num,
> + struct clk_onecell_data *clk_data);
> +#endif /* __DRV_CLK_CPUMUX_H */
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-18 13:05 ` Pi-Cheng Chen
0 siblings, 0 replies; 13+ messages in thread
From: Pi-Cheng Chen @ 2015-05-18 13:05 UTC (permalink / raw)
To: Ricky Liang
Cc: Mike Turquette, Stephen Boyd, Matthias Brugger, Sascha Hauer,
James Liao, Linaro Kernel Mailman List,
open list:OPEN FIRMWARE AND...,
open list, Henry Chen, Chen Fan, linux-mediatek, Joe.C,
Eddie Huang, linux-arm-kernel
Hi Ricky,
On Fri, May 15, 2015 at 2:16 PM, Ricky Liang <jcliang@chromium.org> wrote:
> On Mon, Apr 20, 2015 at 5:25 PM, pi-cheng.chen <pi-cheng.chen@linaro.org> wrote:
>> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
>> intermediate clock source switching. It is based on v11 of common clock support
>> for Mediatek MT8135 and MT8173[1]
>>
>> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
>>
>> Changes in v2:
>> - Remove use of .determine_rate callback
>>
>> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
>> ---
>> drivers/clk/mediatek/Makefile | 2 +-
>> drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
>> drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
>> drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
>> include/dt-bindings/clock/mt8173-clk.h | 4 +-
>> 5 files changed, 180 insertions(+), 2 deletions(-)
>> create mode 100644 drivers/clk/mediatek/clk-cpumux.c
>> create mode 100644 drivers/clk/mediatek/clk-cpumux.h
>>
>> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
>> index 8e4b2a4..299917a 100644
>> --- a/drivers/clk/mediatek/Makefile
>> +++ b/drivers/clk/mediatek/Makefile
>> @@ -1,4 +1,4 @@
>> -obj-y += clk-mtk.o clk-pll.o clk-gate.o
>> +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
>> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>> obj-y += clk-mt8135.o
>> obj-y += clk-mt8173.o
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 0000000..dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/slab.h>
>> +
>> +#include "clk-mtk.h"
>> +#include "clk-cpumux.h"
>> +
>> +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
>> +{
>> + return container_of(_hw, struct mtk_clk_cpumux, hw);
>> +}
>> +
>> +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
>> +{
>> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
>> + int num_parents = __clk_get_num_parents(hw->clk);
>> + u32 val;
>> +
>> + regmap_read(mux->regmap, mux->reg, &val);
>> +
>> + val >>= mux->shift;
>> + val &= mux->mask;
>> +
>> + if (val >= num_parents)
>> + return -EINVAL;
>> +
>> + return val;
>> +}
>> +
>> +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
>> +{
>> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
>> + u32 mask, val;
>> +
>> + val = index << mux->shift;
>> + mask = mux->mask << mux->shift;
>> +
>> + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
>> +}
>> +
>> +static struct clk_ops clk_cpumux_ops = {
>> + .get_parent = clk_cpumux_get_parent,
>> + .set_parent = clk_cpumux_set_parent,
>> +};
>> +
>> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
>> + struct regmap *regmap)
>> +{
>> + struct mtk_clk_cpumux *cpumux;
>> + struct clk *clk;
>> + struct clk_init_data init;
>> +
>> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
>> + if (!cpumux)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + init.name = mux->name;
>> + init.ops = &clk_cpumux_ops;
>> + init.parent_names = mux->parent_names;
>> + init.num_parents = mux->num_parents;
>
> To be safe, please set
>
> init.flags = mux->flags;
>
> here
Will fix it.
Thanks for reviewing.
Best Regards,
Pi-Cheng
>
>> +
>> + cpumux->reg = mux->mux_reg;
>> + cpumux->shift = mux->mux_shift;
>> + cpumux->mask = (BIT(mux->mux_width) - 1);
>> + cpumux->regmap = regmap;
>> + cpumux->hw.init = &init;
>> +
>> + clk = clk_register(NULL, &cpumux->hw);
>> + if (IS_ERR(clk))
>> + kfree(cpumux);
>> +
>> + return clk;
>> +}
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data)
>> +{
>> + int i;
>> + struct clk *clk;
>> + struct regmap *regmap;
>> +
>> + if (!clk_data)
>> + return -ENOMEM;
>> +
>> + regmap = syscon_node_to_regmap(node);
>> + if (IS_ERR(regmap)) {
>> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
>> + PTR_ERR(regmap));
>> + return PTR_ERR(regmap);
>> + }
>> +
>> + for (i = 0; i < num; i++) {
>> + const struct mtk_composite *mux = &clks[i];
>> +
>> + clk = mtk_clk_register_cpumux(mux, regmap);
>> + if (IS_ERR(clk)) {
>> + pr_err("Failed to register clk %s: %ld\n",
>> + mux->name, PTR_ERR(clk));
>> + continue;
>> + }
>> +
>> + clk_data->clks[mux->id] = clk;
>> + }
>> +
>> + return 0;
>> +}
>> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
>> new file mode 100644
>> index 0000000..b82ad20
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.h
>> @@ -0,0 +1,31 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef __DRV_CLK_CPUMUX_H
>> +#define __DRV_CLK_CPUMUX_H
>> +
>> +#include <linux/regmap.h>
>> +
>> +struct mtk_clk_cpumux {
>> + struct clk_hw hw;
>> + struct regmap *regmap;
>> + u32 reg;
>> + u32 mask;
>> + u8 shift;
>> +};
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data);
>> +#endif /* __DRV_CLK_CPUMUX_H */
>> diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
>> index 0584554..745f9d9 100644
>> --- a/drivers/clk/mediatek/clk-mt8173.c
>> +++ b/drivers/clk/mediatek/clk-mt8173.c
>> @@ -19,6 +19,7 @@
>>
>> #include "clk-mtk.h"
>> #include "clk-gate.h"
>> +#include "clk-cpumux.h"
>>
>> #include <dt-bindings/clock/mt8173-clk.h>
>>
>> @@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
>> "apll2_div5"
>> };
>>
>> +static const char * const ca53_parents[] __initconst = {
>> + "clk26m",
>> + "armca7pll",
>> + "mainpll",
>> + "univpll"
>> +};
>> +
>> +static const char * const ca57_parents[] __initconst = {
>> + "clk26m",
>> + "armca15pll",
>> + "mainpll",
>> + "univpll"
>> +};
>> +
>> static const struct mtk_composite top_muxes[] __initconst = {
>> /* CLK_CFG_0 */
>> MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
>> @@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
>> MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
>> };
>>
>> +static const struct mtk_composite cpu_muxes[] __initconst = {
>> + MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
>> + MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
>> +};
>> +
>> static void __init mtk_init_clk_topckgen(void __iomem *top_base,
>> struct clk_onecell_data *clk_data)
>> {
>> @@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
>> mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
>> clk_data);
>>
>> + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
>> + clk_data);
>> +
>> r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
>> if (r)
>> pr_err("%s(): could not register clock provider: %d\n",
>> diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
>> index e648b28..2503b03 100644
>> --- a/include/dt-bindings/clock/mt8173-clk.h
>> +++ b/include/dt-bindings/clock/mt8173-clk.h
>> @@ -187,7 +187,9 @@
>> #define INFRA_CEC 9
>> #define INFRA_PMICSPI 10
>> #define INFRA_PMICWRAP 11
>> -#define INFRA_NR_CLK 12
>> +#define INFRA_CA53SEL 12
>> +#define INFRA_CA57SEL 13
>> +#define INFRA_NR_CLK 14
>>
>> /* PERI_SYS */
>>
>> --
>> 1.9.1
>>
>>
>> _______________________________________________
>> Linux-mediatek mailing list
>> Linux-mediatek@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-18 13:05 ` Pi-Cheng Chen
0 siblings, 0 replies; 13+ messages in thread
From: Pi-Cheng Chen @ 2015-05-18 13:05 UTC (permalink / raw)
To: Ricky Liang
Cc: Mike Turquette, Stephen Boyd, Matthias Brugger, Sascha Hauer,
James Liao, Linaro Kernel Mailman List,
open list:OPEN FIRMWARE AND...,
open list, Henry Chen, Chen Fan,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Joe.C,
Eddie Huang, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi Ricky,
On Fri, May 15, 2015 at 2:16 PM, Ricky Liang <jcliang-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> wrote:
> On Mon, Apr 20, 2015 at 5:25 PM, pi-cheng.chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
>> intermediate clock source switching. It is based on v11 of common clock support
>> for Mediatek MT8135 and MT8173[1]
>>
>> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
>>
>> Changes in v2:
>> - Remove use of .determine_rate callback
>>
>> Signed-off-by: pi-cheng.chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> ---
>> drivers/clk/mediatek/Makefile | 2 +-
>> drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
>> drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
>> drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
>> include/dt-bindings/clock/mt8173-clk.h | 4 +-
>> 5 files changed, 180 insertions(+), 2 deletions(-)
>> create mode 100644 drivers/clk/mediatek/clk-cpumux.c
>> create mode 100644 drivers/clk/mediatek/clk-cpumux.h
>>
>> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
>> index 8e4b2a4..299917a 100644
>> --- a/drivers/clk/mediatek/Makefile
>> +++ b/drivers/clk/mediatek/Makefile
>> @@ -1,4 +1,4 @@
>> -obj-y += clk-mtk.o clk-pll.o clk-gate.o
>> +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
>> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>> obj-y += clk-mt8135.o
>> obj-y += clk-mt8173.o
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 0000000..dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/slab.h>
>> +
>> +#include "clk-mtk.h"
>> +#include "clk-cpumux.h"
>> +
>> +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
>> +{
>> + return container_of(_hw, struct mtk_clk_cpumux, hw);
>> +}
>> +
>> +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
>> +{
>> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
>> + int num_parents = __clk_get_num_parents(hw->clk);
>> + u32 val;
>> +
>> + regmap_read(mux->regmap, mux->reg, &val);
>> +
>> + val >>= mux->shift;
>> + val &= mux->mask;
>> +
>> + if (val >= num_parents)
>> + return -EINVAL;
>> +
>> + return val;
>> +}
>> +
>> +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
>> +{
>> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
>> + u32 mask, val;
>> +
>> + val = index << mux->shift;
>> + mask = mux->mask << mux->shift;
>> +
>> + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
>> +}
>> +
>> +static struct clk_ops clk_cpumux_ops = {
>> + .get_parent = clk_cpumux_get_parent,
>> + .set_parent = clk_cpumux_set_parent,
>> +};
>> +
>> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
>> + struct regmap *regmap)
>> +{
>> + struct mtk_clk_cpumux *cpumux;
>> + struct clk *clk;
>> + struct clk_init_data init;
>> +
>> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
>> + if (!cpumux)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + init.name = mux->name;
>> + init.ops = &clk_cpumux_ops;
>> + init.parent_names = mux->parent_names;
>> + init.num_parents = mux->num_parents;
>
> To be safe, please set
>
> init.flags = mux->flags;
>
> here
Will fix it.
Thanks for reviewing.
Best Regards,
Pi-Cheng
>
>> +
>> + cpumux->reg = mux->mux_reg;
>> + cpumux->shift = mux->mux_shift;
>> + cpumux->mask = (BIT(mux->mux_width) - 1);
>> + cpumux->regmap = regmap;
>> + cpumux->hw.init = &init;
>> +
>> + clk = clk_register(NULL, &cpumux->hw);
>> + if (IS_ERR(clk))
>> + kfree(cpumux);
>> +
>> + return clk;
>> +}
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data)
>> +{
>> + int i;
>> + struct clk *clk;
>> + struct regmap *regmap;
>> +
>> + if (!clk_data)
>> + return -ENOMEM;
>> +
>> + regmap = syscon_node_to_regmap(node);
>> + if (IS_ERR(regmap)) {
>> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
>> + PTR_ERR(regmap));
>> + return PTR_ERR(regmap);
>> + }
>> +
>> + for (i = 0; i < num; i++) {
>> + const struct mtk_composite *mux = &clks[i];
>> +
>> + clk = mtk_clk_register_cpumux(mux, regmap);
>> + if (IS_ERR(clk)) {
>> + pr_err("Failed to register clk %s: %ld\n",
>> + mux->name, PTR_ERR(clk));
>> + continue;
>> + }
>> +
>> + clk_data->clks[mux->id] = clk;
>> + }
>> +
>> + return 0;
>> +}
>> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
>> new file mode 100644
>> index 0000000..b82ad20
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.h
>> @@ -0,0 +1,31 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef __DRV_CLK_CPUMUX_H
>> +#define __DRV_CLK_CPUMUX_H
>> +
>> +#include <linux/regmap.h>
>> +
>> +struct mtk_clk_cpumux {
>> + struct clk_hw hw;
>> + struct regmap *regmap;
>> + u32 reg;
>> + u32 mask;
>> + u8 shift;
>> +};
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data);
>> +#endif /* __DRV_CLK_CPUMUX_H */
>> diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
>> index 0584554..745f9d9 100644
>> --- a/drivers/clk/mediatek/clk-mt8173.c
>> +++ b/drivers/clk/mediatek/clk-mt8173.c
>> @@ -19,6 +19,7 @@
>>
>> #include "clk-mtk.h"
>> #include "clk-gate.h"
>> +#include "clk-cpumux.h"
>>
>> #include <dt-bindings/clock/mt8173-clk.h>
>>
>> @@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
>> "apll2_div5"
>> };
>>
>> +static const char * const ca53_parents[] __initconst = {
>> + "clk26m",
>> + "armca7pll",
>> + "mainpll",
>> + "univpll"
>> +};
>> +
>> +static const char * const ca57_parents[] __initconst = {
>> + "clk26m",
>> + "armca15pll",
>> + "mainpll",
>> + "univpll"
>> +};
>> +
>> static const struct mtk_composite top_muxes[] __initconst = {
>> /* CLK_CFG_0 */
>> MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
>> @@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
>> MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
>> };
>>
>> +static const struct mtk_composite cpu_muxes[] __initconst = {
>> + MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
>> + MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
>> +};
>> +
>> static void __init mtk_init_clk_topckgen(void __iomem *top_base,
>> struct clk_onecell_data *clk_data)
>> {
>> @@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
>> mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
>> clk_data);
>>
>> + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
>> + clk_data);
>> +
>> r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
>> if (r)
>> pr_err("%s(): could not register clock provider: %d\n",
>> diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
>> index e648b28..2503b03 100644
>> --- a/include/dt-bindings/clock/mt8173-clk.h
>> +++ b/include/dt-bindings/clock/mt8173-clk.h
>> @@ -187,7 +187,9 @@
>> #define INFRA_CEC 9
>> #define INFRA_PMICSPI 10
>> #define INFRA_PMICWRAP 11
>> -#define INFRA_NR_CLK 12
>> +#define INFRA_CA53SEL 12
>> +#define INFRA_CA57SEL 13
>> +#define INFRA_NR_CLK 14
>>
>> /* PERI_SYS */
>>
>> --
>> 1.9.1
>>
>>
>> _______________________________________________
>> Linux-mediatek mailing list
>> Linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> http://lists.infradead.org/mailman/listinfo/linux-mediatek
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-18 13:05 ` Pi-Cheng Chen
0 siblings, 0 replies; 13+ messages in thread
From: Pi-Cheng Chen @ 2015-05-18 13:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi Ricky,
On Fri, May 15, 2015 at 2:16 PM, Ricky Liang <jcliang@chromium.org> wrote:
> On Mon, Apr 20, 2015 at 5:25 PM, pi-cheng.chen <pi-cheng.chen@linaro.org> wrote:
>> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for
>> intermediate clock source switching. It is based on v11 of common clock support
>> for Mediatek MT8135 and MT8173[1]
>>
>> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-April/335967.html
>>
>> Changes in v2:
>> - Remove use of .determine_rate callback
>>
>> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
>> ---
>> drivers/clk/mediatek/Makefile | 2 +-
>> drivers/clk/mediatek/clk-cpumux.c | 122 +++++++++++++++++++++++++++++++++
>> drivers/clk/mediatek/clk-cpumux.h | 31 +++++++++
>> drivers/clk/mediatek/clk-mt8173.c | 23 +++++++
>> include/dt-bindings/clock/mt8173-clk.h | 4 +-
>> 5 files changed, 180 insertions(+), 2 deletions(-)
>> create mode 100644 drivers/clk/mediatek/clk-cpumux.c
>> create mode 100644 drivers/clk/mediatek/clk-cpumux.h
>>
>> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
>> index 8e4b2a4..299917a 100644
>> --- a/drivers/clk/mediatek/Makefile
>> +++ b/drivers/clk/mediatek/Makefile
>> @@ -1,4 +1,4 @@
>> -obj-y += clk-mtk.o clk-pll.o clk-gate.o
>> +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
>> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>> obj-y += clk-mt8135.o
>> obj-y += clk-mt8173.o
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 0000000..dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/slab.h>
>> +
>> +#include "clk-mtk.h"
>> +#include "clk-cpumux.h"
>> +
>> +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
>> +{
>> + return container_of(_hw, struct mtk_clk_cpumux, hw);
>> +}
>> +
>> +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
>> +{
>> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
>> + int num_parents = __clk_get_num_parents(hw->clk);
>> + u32 val;
>> +
>> + regmap_read(mux->regmap, mux->reg, &val);
>> +
>> + val >>= mux->shift;
>> + val &= mux->mask;
>> +
>> + if (val >= num_parents)
>> + return -EINVAL;
>> +
>> + return val;
>> +}
>> +
>> +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
>> +{
>> + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
>> + u32 mask, val;
>> +
>> + val = index << mux->shift;
>> + mask = mux->mask << mux->shift;
>> +
>> + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
>> +}
>> +
>> +static struct clk_ops clk_cpumux_ops = {
>> + .get_parent = clk_cpumux_get_parent,
>> + .set_parent = clk_cpumux_set_parent,
>> +};
>> +
>> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
>> + struct regmap *regmap)
>> +{
>> + struct mtk_clk_cpumux *cpumux;
>> + struct clk *clk;
>> + struct clk_init_data init;
>> +
>> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
>> + if (!cpumux)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + init.name = mux->name;
>> + init.ops = &clk_cpumux_ops;
>> + init.parent_names = mux->parent_names;
>> + init.num_parents = mux->num_parents;
>
> To be safe, please set
>
> init.flags = mux->flags;
>
> here
Will fix it.
Thanks for reviewing.
Best Regards,
Pi-Cheng
>
>> +
>> + cpumux->reg = mux->mux_reg;
>> + cpumux->shift = mux->mux_shift;
>> + cpumux->mask = (BIT(mux->mux_width) - 1);
>> + cpumux->regmap = regmap;
>> + cpumux->hw.init = &init;
>> +
>> + clk = clk_register(NULL, &cpumux->hw);
>> + if (IS_ERR(clk))
>> + kfree(cpumux);
>> +
>> + return clk;
>> +}
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data)
>> +{
>> + int i;
>> + struct clk *clk;
>> + struct regmap *regmap;
>> +
>> + if (!clk_data)
>> + return -ENOMEM;
>> +
>> + regmap = syscon_node_to_regmap(node);
>> + if (IS_ERR(regmap)) {
>> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
>> + PTR_ERR(regmap));
>> + return PTR_ERR(regmap);
>> + }
>> +
>> + for (i = 0; i < num; i++) {
>> + const struct mtk_composite *mux = &clks[i];
>> +
>> + clk = mtk_clk_register_cpumux(mux, regmap);
>> + if (IS_ERR(clk)) {
>> + pr_err("Failed to register clk %s: %ld\n",
>> + mux->name, PTR_ERR(clk));
>> + continue;
>> + }
>> +
>> + clk_data->clks[mux->id] = clk;
>> + }
>> +
>> + return 0;
>> +}
>> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
>> new file mode 100644
>> index 0000000..b82ad20
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.h
>> @@ -0,0 +1,31 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef __DRV_CLK_CPUMUX_H
>> +#define __DRV_CLK_CPUMUX_H
>> +
>> +#include <linux/regmap.h>
>> +
>> +struct mtk_clk_cpumux {
>> + struct clk_hw hw;
>> + struct regmap *regmap;
>> + u32 reg;
>> + u32 mask;
>> + u8 shift;
>> +};
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data);
>> +#endif /* __DRV_CLK_CPUMUX_H */
>> diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
>> index 0584554..745f9d9 100644
>> --- a/drivers/clk/mediatek/clk-mt8173.c
>> +++ b/drivers/clk/mediatek/clk-mt8173.c
>> @@ -19,6 +19,7 @@
>>
>> #include "clk-mtk.h"
>> #include "clk-gate.h"
>> +#include "clk-cpumux.h"
>>
>> #include <dt-bindings/clock/mt8173-clk.h>
>>
>> @@ -517,6 +518,20 @@ static const char * const i2s3_b_ck_parents[] __initconst = {
>> "apll2_div5"
>> };
>>
>> +static const char * const ca53_parents[] __initconst = {
>> + "clk26m",
>> + "armca7pll",
>> + "mainpll",
>> + "univpll"
>> +};
>> +
>> +static const char * const ca57_parents[] __initconst = {
>> + "clk26m",
>> + "armca15pll",
>> + "mainpll",
>> + "univpll"
>> +};
>> +
>> static const struct mtk_composite top_muxes[] __initconst = {
>> /* CLK_CFG_0 */
>> MUX(TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
>> @@ -589,6 +604,11 @@ static const struct mtk_composite top_muxes[] __initconst = {
>> MUX(TOP_I2S3_B_CK_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
>> };
>>
>> +static const struct mtk_composite cpu_muxes[] __initconst = {
>> + MUX(INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
>> + MUX(INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
>> +};
>> +
>> static void __init mtk_init_clk_topckgen(void __iomem *top_base,
>> struct clk_onecell_data *clk_data)
>> {
>> @@ -745,6 +765,9 @@ static void __init mtk_infrasys_init(struct device_node *node)
>> mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
>> clk_data);
>>
>> + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
>> + clk_data);
>> +
>> r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
>> if (r)
>> pr_err("%s(): could not register clock provider: %d\n",
>> diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
>> index e648b28..2503b03 100644
>> --- a/include/dt-bindings/clock/mt8173-clk.h
>> +++ b/include/dt-bindings/clock/mt8173-clk.h
>> @@ -187,7 +187,9 @@
>> #define INFRA_CEC 9
>> #define INFRA_PMICSPI 10
>> #define INFRA_PMICWRAP 11
>> -#define INFRA_NR_CLK 12
>> +#define INFRA_CA53SEL 12
>> +#define INFRA_CA57SEL 13
>> +#define INFRA_NR_CLK 14
>>
>> /* PERI_SYS */
>>
>> --
>> 1.9.1
>>
>>
>> _______________________________________________
>> Linux-mediatek mailing list
>> Linux-mediatek at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
2015-05-15 19:00 ` Stephen Boyd
(?)
@ 2015-05-18 13:07 ` Pi-Cheng Chen
-1 siblings, 0 replies; 13+ messages in thread
From: Pi-Cheng Chen @ 2015-05-18 13:07 UTC (permalink / raw)
To: Stephen Boyd
Cc: Mike Turquette, Matthias Brugger, Sascha Hauer, Henry Chen,
James Liao, Chen Fan, Eddie Huang, Joe.C,
Linux Kernel Mailing List, linux-arm-kernel, devicetree,
Linaro Kernel Mailman List, linux-mediatek
Hi Stephen,
On Sat, May 16, 2015 at 3:00 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 04/20, pi-cheng.chen wrote:
>> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 0000000..dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/clk.h>
>
> Do you need this include for some reason?
No. I think I forgot to remove it after adding it for some debugging purpose.
Will remove it.
>
>> +#include <linux/clk-provider.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/slab.h>
>> +
>> +#include "clk-mtk.h"
>> +#include "clk-cpumux.h"
>> +
> [...]
>> +
>> +static struct clk_ops clk_cpumux_ops = {
>
> const?
Yes. Will add it.
>
>> + .get_parent = clk_cpumux_get_parent,
>> + .set_parent = clk_cpumux_set_parent,
>> +};
>> +
>> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
>> + struct regmap *regmap)
>> +{
>> + struct mtk_clk_cpumux *cpumux;
>> + struct clk *clk;
>> + struct clk_init_data init;
>> +
>> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
>> + if (!cpumux)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + init.name = mux->name;
>> + init.ops = &clk_cpumux_ops;
>> + init.parent_names = mux->parent_names;
>> + init.num_parents = mux->num_parents;
>> +
>> + cpumux->reg = mux->mux_reg;
>> + cpumux->shift = mux->mux_shift;
>> + cpumux->mask = (BIT(mux->mux_width) - 1);
>
> Unnecessary parenthesis.
Will fix it.
>
>> + cpumux->regmap = regmap;
>> + cpumux->hw.init = &init;
>> +
>> + clk = clk_register(NULL, &cpumux->hw);
>> + if (IS_ERR(clk))
>> + kfree(cpumux);
>> +
>> + return clk;
>> +}
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data)
>> +{
>> + int i;
>> + struct clk *clk;
>> + struct regmap *regmap;
>> +
>> + if (!clk_data)
>> + return -ENOMEM;
>
> Why would we call the function with NULL clk_data? Please remove
> this check.
Will remove it.
>
>> +
>> + regmap = syscon_node_to_regmap(node);
>> + if (IS_ERR(regmap)) {
>> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
>> + PTR_ERR(regmap));
>> + return PTR_ERR(regmap);
>> + }
>> +
>> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
>> new file mode 100644
>> index 0000000..b82ad20
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.h
>> @@ -0,0 +1,31 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef __DRV_CLK_CPUMUX_H
>> +#define __DRV_CLK_CPUMUX_H
>> +
>> +#include <linux/regmap.h>
>
> Looks unnecessary. Just forward declare the type you need, struct
> regmap.
Yes. Will fix.
Thanks for reviewing.
Best Regards,
Pi-Cheng
>
>> +
>> +struct mtk_clk_cpumux {
>> + struct clk_hw hw;
>> + struct regmap *regmap;
>> + u32 reg;
>> + u32 mask;
>> + u8 shift;
>> +};
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data);
>> +#endif /* __DRV_CLK_CPUMUX_H */
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-18 13:07 ` Pi-Cheng Chen
0 siblings, 0 replies; 13+ messages in thread
From: Pi-Cheng Chen @ 2015-05-18 13:07 UTC (permalink / raw)
To: Stephen Boyd
Cc: Mike Turquette, Matthias Brugger, Sascha Hauer, Henry Chen,
James Liao, Chen Fan, Eddie Huang, Joe.C,
Linux Kernel Mailing List, linux-arm-kernel, devicetree,
Linaro Kernel Mailman List, linux-mediatek
Hi Stephen,
On Sat, May 16, 2015 at 3:00 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 04/20, pi-cheng.chen wrote:
>> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 0000000..dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/clk.h>
>
> Do you need this include for some reason?
No. I think I forgot to remove it after adding it for some debugging purpose.
Will remove it.
>
>> +#include <linux/clk-provider.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/slab.h>
>> +
>> +#include "clk-mtk.h"
>> +#include "clk-cpumux.h"
>> +
> [...]
>> +
>> +static struct clk_ops clk_cpumux_ops = {
>
> const?
Yes. Will add it.
>
>> + .get_parent = clk_cpumux_get_parent,
>> + .set_parent = clk_cpumux_set_parent,
>> +};
>> +
>> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
>> + struct regmap *regmap)
>> +{
>> + struct mtk_clk_cpumux *cpumux;
>> + struct clk *clk;
>> + struct clk_init_data init;
>> +
>> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
>> + if (!cpumux)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + init.name = mux->name;
>> + init.ops = &clk_cpumux_ops;
>> + init.parent_names = mux->parent_names;
>> + init.num_parents = mux->num_parents;
>> +
>> + cpumux->reg = mux->mux_reg;
>> + cpumux->shift = mux->mux_shift;
>> + cpumux->mask = (BIT(mux->mux_width) - 1);
>
> Unnecessary parenthesis.
Will fix it.
>
>> + cpumux->regmap = regmap;
>> + cpumux->hw.init = &init;
>> +
>> + clk = clk_register(NULL, &cpumux->hw);
>> + if (IS_ERR(clk))
>> + kfree(cpumux);
>> +
>> + return clk;
>> +}
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data)
>> +{
>> + int i;
>> + struct clk *clk;
>> + struct regmap *regmap;
>> +
>> + if (!clk_data)
>> + return -ENOMEM;
>
> Why would we call the function with NULL clk_data? Please remove
> this check.
Will remove it.
>
>> +
>> + regmap = syscon_node_to_regmap(node);
>> + if (IS_ERR(regmap)) {
>> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
>> + PTR_ERR(regmap));
>> + return PTR_ERR(regmap);
>> + }
>> +
>> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
>> new file mode 100644
>> index 0000000..b82ad20
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.h
>> @@ -0,0 +1,31 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef __DRV_CLK_CPUMUX_H
>> +#define __DRV_CLK_CPUMUX_H
>> +
>> +#include <linux/regmap.h>
>
> Looks unnecessary. Just forward declare the type you need, struct
> regmap.
Yes. Will fix.
Thanks for reviewing.
Best Regards,
Pi-Cheng
>
>> +
>> +struct mtk_clk_cpumux {
>> + struct clk_hw hw;
>> + struct regmap *regmap;
>> + u32 reg;
>> + u32 mask;
>> + u8 shift;
>> +};
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data);
>> +#endif /* __DRV_CLK_CPUMUX_H */
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control
@ 2015-05-18 13:07 ` Pi-Cheng Chen
0 siblings, 0 replies; 13+ messages in thread
From: Pi-Cheng Chen @ 2015-05-18 13:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Stephen,
On Sat, May 16, 2015 at 3:00 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 04/20, pi-cheng.chen wrote:
>> Signed-off-by: pi-cheng.chen <pi-cheng.chen@linaro.org>
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 0000000..dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/clk.h>
>
> Do you need this include for some reason?
No. I think I forgot to remove it after adding it for some debugging purpose.
Will remove it.
>
>> +#include <linux/clk-provider.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/slab.h>
>> +
>> +#include "clk-mtk.h"
>> +#include "clk-cpumux.h"
>> +
> [...]
>> +
>> +static struct clk_ops clk_cpumux_ops = {
>
> const?
Yes. Will add it.
>
>> + .get_parent = clk_cpumux_get_parent,
>> + .set_parent = clk_cpumux_set_parent,
>> +};
>> +
>> +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
>> + struct regmap *regmap)
>> +{
>> + struct mtk_clk_cpumux *cpumux;
>> + struct clk *clk;
>> + struct clk_init_data init;
>> +
>> + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
>> + if (!cpumux)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + init.name = mux->name;
>> + init.ops = &clk_cpumux_ops;
>> + init.parent_names = mux->parent_names;
>> + init.num_parents = mux->num_parents;
>> +
>> + cpumux->reg = mux->mux_reg;
>> + cpumux->shift = mux->mux_shift;
>> + cpumux->mask = (BIT(mux->mux_width) - 1);
>
> Unnecessary parenthesis.
Will fix it.
>
>> + cpumux->regmap = regmap;
>> + cpumux->hw.init = &init;
>> +
>> + clk = clk_register(NULL, &cpumux->hw);
>> + if (IS_ERR(clk))
>> + kfree(cpumux);
>> +
>> + return clk;
>> +}
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data)
>> +{
>> + int i;
>> + struct clk *clk;
>> + struct regmap *regmap;
>> +
>> + if (!clk_data)
>> + return -ENOMEM;
>
> Why would we call the function with NULL clk_data? Please remove
> this check.
Will remove it.
>
>> +
>> + regmap = syscon_node_to_regmap(node);
>> + if (IS_ERR(regmap)) {
>> + pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
>> + PTR_ERR(regmap));
>> + return PTR_ERR(regmap);
>> + }
>> +
>> diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
>> new file mode 100644
>> index 0000000..b82ad20
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.h
>> @@ -0,0 +1,31 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef __DRV_CLK_CPUMUX_H
>> +#define __DRV_CLK_CPUMUX_H
>> +
>> +#include <linux/regmap.h>
>
> Looks unnecessary. Just forward declare the type you need, struct
> regmap.
Yes. Will fix.
Thanks for reviewing.
Best Regards,
Pi-Cheng
>
>> +
>> +struct mtk_clk_cpumux {
>> + struct clk_hw hw;
>> + struct regmap *regmap;
>> + u32 reg;
>> + u32 mask;
>> + u8 shift;
>> +};
>> +
>> +int mtk_clk_register_cpumuxes(struct device_node *node,
>> + const struct mtk_composite *clks, int num,
>> + struct clk_onecell_data *clk_data);
>> +#endif /* __DRV_CLK_CPUMUX_H */
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2015-05-18 13:08 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-04-20 9:25 [PATCH v2] clk: mediatek: Export CPU mux clocks for CPU frequency control pi-cheng.chen
2015-04-20 9:25 ` pi-cheng.chen
2015-04-20 9:25 ` pi-cheng.chen
2015-05-15 6:16 ` Ricky Liang
2015-05-15 6:16 ` Ricky Liang
2015-05-18 13:05 ` Pi-Cheng Chen
2015-05-18 13:05 ` Pi-Cheng Chen
2015-05-18 13:05 ` Pi-Cheng Chen
2015-05-15 19:00 ` Stephen Boyd
2015-05-15 19:00 ` Stephen Boyd
2015-05-18 13:07 ` Pi-Cheng Chen
2015-05-18 13:07 ` Pi-Cheng Chen
2015-05-18 13:07 ` Pi-Cheng Chen
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