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From: Song Shuai <suagrfillet@gmail.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu,  conor.dooley@microchip.com,
	linux-riscv@lists.infradead.org,  linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH] riscv: export cpu/freq invariant to scheduler
Date: Wed, 22 Mar 2023 10:51:38 +0000	[thread overview]
Message-ID: <CAAYs2=hg_h=dotuY2XE2ncXYg3FuiDkQmfCJ0NYfOn278HOdbQ@mail.gmail.com> (raw)
In-Reply-To: <20230322080345.j4oi7nz2nz4rk6ib@orel>

Andrew Jones <ajones@ventanamicro.com> 于2023年3月22日周三 08:03写道:
>
> On Wed, Mar 22, 2023 at 02:18:56PM +0800, Song Shuai wrote:
> > RISC-V now manages CPU topology using arch_topology which provides
> > CPU capacity and frequency related interfaces to access the cpu/freq
> > invariant in possible heterogeneous or DVFS-enabled platforms.
> >
> > Here adds topology.h file to export the arch_topology interfaces for
> > replacing the scheduler's constant-based cpu/freq invariant accounting.
> >
> > Signed-off-by: Song Shuai <suagrfillet@gmail.com>
> > ---
> >  arch/riscv/include/asm/topology.h | 19 +++++++++++++++++++
> >  1 file changed, 19 insertions(+)
> >  create mode 100644 arch/riscv/include/asm/topology.h
> >
> > diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h
> > new file mode 100644
> > index 000000000000..14bbd2472af6
> > --- /dev/null
> > +++ b/arch/riscv/include/asm/topology.h
> > @@ -0,0 +1,19 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +#ifndef __ASM_RISCV_TOPOLOGY_H
> > +#define __ASM_RISCV_TOPOLOGY_H
>
> riscv uses a single leading underscore.
ok.
>
> > +
> > +#include <linux/arch_topology.h>
> > +
> > +/* Replace task scheduler's default frequency-invariant accounting */
> > +#define arch_scale_freq_tick topology_scale_freq_tick
> > +#define arch_set_freq_scale topology_set_freq_scale
> > +#define arch_scale_freq_capacity topology_get_freq_scale
> > +#define arch_scale_freq_invariant topology_scale_freq_invariant
> > +
> > +/* Replace task scheduler's default cpu-invariant accounting */
> > +#define arch_scale_cpu_capacity topology_get_cpu_scale
> > +#define arch_update_cpu_topology topology_update_cpu_topology
> > +
> > +
> > +#include <asm-generic/topology.h>
> > +#endif /* __ASM_RISCV_TOPOLOGY_H */
> > --
> > 2.20.1
> >
>
> This looks reasonable, at least from a "do what arm64 does" type of
> perspective. Why the RFC? Is it not tested?
I only tested it in the qemu sifive_u machine with a customed dtb
not sure if it works in real hardware, so I posted it with RFC.
>
> Also, if you repost, could please neaten it up a bit? Aligning all
> the defines would help and removing the extra blank line. Finally,
> why wasn't the "/* Enable topology flag updates */" comment also
> lifted from arm64 like the others?
I'll add the comment back and tidy it up in the next post.
>
> Thanks,
> drew



-- 
Thanks,
Song

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Song Shuai <suagrfillet@gmail.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, conor.dooley@microchip.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH] riscv: export cpu/freq invariant to scheduler
Date: Wed, 22 Mar 2023 10:51:38 +0000	[thread overview]
Message-ID: <CAAYs2=hg_h=dotuY2XE2ncXYg3FuiDkQmfCJ0NYfOn278HOdbQ@mail.gmail.com> (raw)
In-Reply-To: <20230322080345.j4oi7nz2nz4rk6ib@orel>

Andrew Jones <ajones@ventanamicro.com> 于2023年3月22日周三 08:03写道:
>
> On Wed, Mar 22, 2023 at 02:18:56PM +0800, Song Shuai wrote:
> > RISC-V now manages CPU topology using arch_topology which provides
> > CPU capacity and frequency related interfaces to access the cpu/freq
> > invariant in possible heterogeneous or DVFS-enabled platforms.
> >
> > Here adds topology.h file to export the arch_topology interfaces for
> > replacing the scheduler's constant-based cpu/freq invariant accounting.
> >
> > Signed-off-by: Song Shuai <suagrfillet@gmail.com>
> > ---
> >  arch/riscv/include/asm/topology.h | 19 +++++++++++++++++++
> >  1 file changed, 19 insertions(+)
> >  create mode 100644 arch/riscv/include/asm/topology.h
> >
> > diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h
> > new file mode 100644
> > index 000000000000..14bbd2472af6
> > --- /dev/null
> > +++ b/arch/riscv/include/asm/topology.h
> > @@ -0,0 +1,19 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +#ifndef __ASM_RISCV_TOPOLOGY_H
> > +#define __ASM_RISCV_TOPOLOGY_H
>
> riscv uses a single leading underscore.
ok.
>
> > +
> > +#include <linux/arch_topology.h>
> > +
> > +/* Replace task scheduler's default frequency-invariant accounting */
> > +#define arch_scale_freq_tick topology_scale_freq_tick
> > +#define arch_set_freq_scale topology_set_freq_scale
> > +#define arch_scale_freq_capacity topology_get_freq_scale
> > +#define arch_scale_freq_invariant topology_scale_freq_invariant
> > +
> > +/* Replace task scheduler's default cpu-invariant accounting */
> > +#define arch_scale_cpu_capacity topology_get_cpu_scale
> > +#define arch_update_cpu_topology topology_update_cpu_topology
> > +
> > +
> > +#include <asm-generic/topology.h>
> > +#endif /* __ASM_RISCV_TOPOLOGY_H */
> > --
> > 2.20.1
> >
>
> This looks reasonable, at least from a "do what arm64 does" type of
> perspective. Why the RFC? Is it not tested?
I only tested it in the qemu sifive_u machine with a customed dtb
not sure if it works in real hardware, so I posted it with RFC.
>
> Also, if you repost, could please neaten it up a bit? Aligning all
> the defines would help and removing the extra blank line. Finally,
> why wasn't the "/* Enable topology flag updates */" comment also
> lifted from arm64 like the others?
I'll add the comment back and tidy it up in the next post.
>
> Thanks,
> drew



-- 
Thanks,
Song

  reply	other threads:[~2023-03-22 10:51 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-22  6:18 [RFC PATCH] riscv: export cpu/freq invariant to scheduler Song Shuai
2023-03-22  6:18 ` Song Shuai
2023-03-22  8:03 ` Andrew Jones
2023-03-22  8:03   ` Andrew Jones
2023-03-22 10:51   ` Song Shuai [this message]
2023-03-22 10:51     ` Song Shuai

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