From: Reiji Watanabe <reijiw@google.com>
To: Oliver Upton <oupton@google.com>
Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Peter Shier <pshier@google.com>,
Ricardo Koller <ricarkol@google.com>
Subject: Re: [PATCH v2 1/3] KVM: arm64: Wire up CP15 feature registers to their AArch64 equivalents
Date: Sun, 3 Apr 2022 18:51:16 -0700 [thread overview]
Message-ID: <CAAeT=Fy=aUNHq7zWYxYOLWvR-nOZr5Gdvu1yNiOisgtJ3SF1pw@mail.gmail.com> (raw)
In-Reply-To: <20220401010832.3425787-2-oupton@google.com>
On Thu, Mar 31, 2022 at 6:08 PM Oliver Upton <oupton@google.com> wrote:
>
> KVM currently does not trap ID register accesses from an AArch32 EL1.
> This is painful for a couple of reasons. Certain unimplemented features
> are visible to AArch32 EL1, as we limit PMU to version 3 and the debug
> architecture to v8.0. Additionally, we attempt to paper over
> heterogeneous systems by using register values that are safe
> system-wide. All this hard work is completely sidestepped because KVM
> does not set TID3 for AArch32 guests.
>
> Fix up handling of CP15 feature registers by simply rerouting to their
> AArch64 aliases. Punt setting HCR_EL2.TID3 to a later change, as we need
> to fix up the oddball CP10 feature registers still.
>
> Signed-off-by: Oliver Upton <oupton@google.com>
Reviewed-by: Reiji Watanabe <reijiw@google.com>
WARNING: multiple messages have this Message-ID (diff)
From: Reiji Watanabe <reijiw@google.com>
To: Oliver Upton <oupton@google.com>
Cc: kvm@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
Peter Shier <pshier@google.com>,
kvmarm@lists.cs.columbia.edu,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 1/3] KVM: arm64: Wire up CP15 feature registers to their AArch64 equivalents
Date: Sun, 3 Apr 2022 18:51:16 -0700 [thread overview]
Message-ID: <CAAeT=Fy=aUNHq7zWYxYOLWvR-nOZr5Gdvu1yNiOisgtJ3SF1pw@mail.gmail.com> (raw)
In-Reply-To: <20220401010832.3425787-2-oupton@google.com>
On Thu, Mar 31, 2022 at 6:08 PM Oliver Upton <oupton@google.com> wrote:
>
> KVM currently does not trap ID register accesses from an AArch32 EL1.
> This is painful for a couple of reasons. Certain unimplemented features
> are visible to AArch32 EL1, as we limit PMU to version 3 and the debug
> architecture to v8.0. Additionally, we attempt to paper over
> heterogeneous systems by using register values that are safe
> system-wide. All this hard work is completely sidestepped because KVM
> does not set TID3 for AArch32 guests.
>
> Fix up handling of CP15 feature registers by simply rerouting to their
> AArch64 aliases. Punt setting HCR_EL2.TID3 to a later change, as we need
> to fix up the oddball CP10 feature registers still.
>
> Signed-off-by: Oliver Upton <oupton@google.com>
Reviewed-by: Reiji Watanabe <reijiw@google.com>
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Reiji Watanabe <reijiw@google.com>
To: Oliver Upton <oupton@google.com>
Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Peter Shier <pshier@google.com>,
Ricardo Koller <ricarkol@google.com>
Subject: Re: [PATCH v2 1/3] KVM: arm64: Wire up CP15 feature registers to their AArch64 equivalents
Date: Sun, 3 Apr 2022 18:51:16 -0700 [thread overview]
Message-ID: <CAAeT=Fy=aUNHq7zWYxYOLWvR-nOZr5Gdvu1yNiOisgtJ3SF1pw@mail.gmail.com> (raw)
In-Reply-To: <20220401010832.3425787-2-oupton@google.com>
On Thu, Mar 31, 2022 at 6:08 PM Oliver Upton <oupton@google.com> wrote:
>
> KVM currently does not trap ID register accesses from an AArch32 EL1.
> This is painful for a couple of reasons. Certain unimplemented features
> are visible to AArch32 EL1, as we limit PMU to version 3 and the debug
> architecture to v8.0. Additionally, we attempt to paper over
> heterogeneous systems by using register values that are safe
> system-wide. All this hard work is completely sidestepped because KVM
> does not set TID3 for AArch32 guests.
>
> Fix up handling of CP15 feature registers by simply rerouting to their
> AArch64 aliases. Punt setting HCR_EL2.TID3 to a later change, as we need
> to fix up the oddball CP10 feature registers still.
>
> Signed-off-by: Oliver Upton <oupton@google.com>
Reviewed-by: Reiji Watanabe <reijiw@google.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-04-04 1:51 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-01 1:08 [PATCH v2 0/3] KVM: arm64: Limit feature register reads from AArch32 Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-01 1:08 ` [PATCH v2 1/3] KVM: arm64: Wire up CP15 feature registers to their AArch64 equivalents Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-04 1:51 ` Reiji Watanabe [this message]
2022-04-04 1:51 ` Reiji Watanabe
2022-04-04 1:51 ` Reiji Watanabe
2022-04-06 15:07 ` Marc Zyngier
2022-04-06 15:07 ` Marc Zyngier
2022-04-06 15:07 ` Marc Zyngier
2022-04-07 20:12 ` Oliver Upton
2022-04-07 20:12 ` Oliver Upton
2022-04-07 20:12 ` Oliver Upton
2022-04-01 1:08 ` [PATCH v2 2/3] KVM: arm64: Plumb cp10 ID traps through the AArch64 sysreg handler Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-04 3:57 ` Reiji Watanabe
2022-04-04 3:57 ` Reiji Watanabe
2022-04-04 3:57 ` Reiji Watanabe
2022-04-04 5:28 ` Oliver Upton
2022-04-04 5:28 ` Oliver Upton
2022-04-04 5:28 ` Oliver Upton
2022-04-04 23:19 ` Oliver Upton
2022-04-04 23:19 ` Oliver Upton
2022-04-04 23:19 ` Oliver Upton
2022-04-05 1:46 ` Reiji Watanabe
2022-04-05 1:46 ` Reiji Watanabe
2022-04-05 1:46 ` Reiji Watanabe
2022-04-01 1:08 ` [PATCH v2 3/3] KVM: arm64: Start trapping ID registers for 32 bit guests Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-01 1:08 ` Oliver Upton
2022-04-04 4:45 ` Reiji Watanabe
2022-04-04 4:45 ` Reiji Watanabe
2022-04-04 4:45 ` Reiji Watanabe
2022-04-04 5:46 ` Oliver Upton
2022-04-04 5:46 ` Oliver Upton
2022-04-04 5:46 ` Oliver Upton
2022-04-05 1:53 ` Reiji Watanabe
2022-04-05 1:53 ` Reiji Watanabe
2022-04-05 1:53 ` Reiji Watanabe
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