Intel I350 mini-PCIe card (igb) on Mirabox (mvebu / Armada 370)

[neil@fatboyfat.co.uk (Neil Greatorex)]

Thomas,

On Sun, Apr 6, 2014 at 11:16 PM, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:
> Dear Neil Greatorex,
>
> On Sun, 6 Apr 2014 22:57:40 +0100 (BST), Neil Greatorex wrote:
>
>> Second port:
>> [ 1809.459445] igb 0000:01:00.1: enabling bus mastering
>> [ 1809.459563] igb 0000:01:00.1 (unregistered net_device): hw_addr is
>> f1100000, start=e0100000, len=80000, flags=40200
>> [ 1809.459573] igb 0000:01:00.1 (unregistered net_device): About to read
>> from offset 18
>> [ 1809.459581] Unhandled fault: external abort on non-linefetch (0x1008)
>> at 0xf1100018
>
> This address is a virtual address, so there's not much we can do with
> it, as it is.
>

The address in the fault message is, but the physical address can be
worked out from the 2 lines above. "start=e0100000" and "offset 18".
Adding those together we get the physical address 0xe100018.

>> The physical addresses match those given in the lspci -vvv output (see
>> https://gist.github.com/ngreatorex/9772195). I don't know enough about
>> PCIe, the SoC *or* the Intel card to know if these addresses look correct
>> or even sane! I did wonder if there was some issue due to the fact that
>> the resources for 01:00.0 and 01:00.1 overlap, but I would guess(!?) that
>> it's common in hardware that presents multiple devices.
>>
>> It is perhaps noteworthy that this is the first access to the hardware for
>> the 2nd port - i.e. there are no successful accesses, other than to enable
>> the hardware, which AFAICT is simply accessing registers on the PCIe
>> controller.
>
> It really looks like the MBus window has not been sized correctly, or
> there is a missing MBus window. Probably a deficiency in the PCI bridge
> emulation layer in pci-mvebu.
>

OK well that gives me another direction to point my debugging
attempts. If I discover anything interesting I'll let you know.

> Tomorrow, I have a bit of work on AHCI on Armada 38x, but I'm hoping to
> get to this after that.

Excellent news.

>
> Thanks again for all the investigation. All your research is clearly
> going to make the debugging a *lot* easier.

No problem. I'm always interested in trying to learn more about the
hardware I have and how it all works. Of course it would be much
easier if Marvell would publicly release the datasheet but we can't
have everything!

Cheers,
Neil