* [PATCH v2] riscv: force __cpu_up_ variables to put in data section
@ 2020-05-04 3:54 ` Zong Li
0 siblings, 0 replies; 10+ messages in thread
From: Zong Li @ 2020-05-04 3:54 UTC (permalink / raw)
To: palmer, paul.walmsley, atishp, anup, linux-riscv, linux-kernel
Cc: Zong Li, Greentime Hu
Put __cpu_up_stack_pointer and __cpu_up_task_pointer in data section.
Currently, these two variables are put in bss section, there is a
potential risk that secondary harts get the uninitialized value before
main hart finishing the bss clearing. In this case, all secondary
harts would pass the waiting loop and enable the MMU before main hart
set up the page table.
This issue happened on random booting of multiple harts, which means
it will manifest for BBL and OpenSBI which older than v0.6. In OpenSBI
v0.7, it had included HSM extension, all the secondary harts are
waiting in firmware, so it could work fine without this change.
Changes in v2:
- Add commit description about random booting.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
---
arch/riscv/kernel/cpu_ops.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/cpu_ops.c b/arch/riscv/kernel/cpu_ops.c
index c4c33bf02369..0ec22354018c 100644
--- a/arch/riscv/kernel/cpu_ops.c
+++ b/arch/riscv/kernel/cpu_ops.c
@@ -15,8 +15,8 @@
const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
-void *__cpu_up_stack_pointer[NR_CPUS];
-void *__cpu_up_task_pointer[NR_CPUS];
+void *__cpu_up_stack_pointer[NR_CPUS] __section(.data);
+void *__cpu_up_task_pointer[NR_CPUS] __section(.data);
extern const struct cpu_operations cpu_ops_sbi;
extern const struct cpu_operations cpu_ops_spinwait;
--
2.26.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2] riscv: force __cpu_up_ variables to put in data section
@ 2020-05-04 3:54 ` Zong Li
0 siblings, 0 replies; 10+ messages in thread
From: Zong Li @ 2020-05-04 3:54 UTC (permalink / raw)
To: palmer, paul.walmsley, atishp, anup, linux-riscv, linux-kernel
Cc: Greentime Hu, Zong Li
Put __cpu_up_stack_pointer and __cpu_up_task_pointer in data section.
Currently, these two variables are put in bss section, there is a
potential risk that secondary harts get the uninitialized value before
main hart finishing the bss clearing. In this case, all secondary
harts would pass the waiting loop and enable the MMU before main hart
set up the page table.
This issue happened on random booting of multiple harts, which means
it will manifest for BBL and OpenSBI which older than v0.6. In OpenSBI
v0.7, it had included HSM extension, all the secondary harts are
waiting in firmware, so it could work fine without this change.
Changes in v2:
- Add commit description about random booting.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
---
arch/riscv/kernel/cpu_ops.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/cpu_ops.c b/arch/riscv/kernel/cpu_ops.c
index c4c33bf02369..0ec22354018c 100644
--- a/arch/riscv/kernel/cpu_ops.c
+++ b/arch/riscv/kernel/cpu_ops.c
@@ -15,8 +15,8 @@
const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
-void *__cpu_up_stack_pointer[NR_CPUS];
-void *__cpu_up_task_pointer[NR_CPUS];
+void *__cpu_up_stack_pointer[NR_CPUS] __section(.data);
+void *__cpu_up_task_pointer[NR_CPUS] __section(.data);
extern const struct cpu_operations cpu_ops_sbi;
extern const struct cpu_operations cpu_ops_spinwait;
--
2.26.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
2020-05-04 3:54 ` Zong Li
@ 2020-05-04 6:25 ` Anup Patel
-1 siblings, 0 replies; 10+ messages in thread
From: Anup Patel @ 2020-05-04 6:25 UTC (permalink / raw)
To: Zong Li
Cc: Palmer Dabbelt, Paul Walmsley, Atish Patra, linux-riscv,
linux-kernel@vger.kernel.org List, Greentime Hu
On Mon, May 4, 2020 at 9:24 AM Zong Li <zong.li@sifive.com> wrote:
>
> Put __cpu_up_stack_pointer and __cpu_up_task_pointer in data section.
> Currently, these two variables are put in bss section, there is a
> potential risk that secondary harts get the uninitialized value before
> main hart finishing the bss clearing. In this case, all secondary
> harts would pass the waiting loop and enable the MMU before main hart
> set up the page table.
>
> This issue happened on random booting of multiple harts, which means
> it will manifest for BBL and OpenSBI which older than v0.6. In OpenSBI
> v0.7, it had included HSM extension, all the secondary harts are
> waiting in firmware, so it could work fine without this change.
Slightly improved text:
This issue happens on random booting of multiple harts, which means
it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
v0.7 (or higher version), we have HSM extension so all the secondary harts
are brought-up by Linux kernel in an orderly fashion. This means we don't
this change for OpenSBI v0.7 (or higher version).
>
> Changes in v2:
> - Add commit description about random booting.
>
> Signed-off-by: Zong Li <zong.li@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> ---
> arch/riscv/kernel/cpu_ops.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu_ops.c b/arch/riscv/kernel/cpu_ops.c
> index c4c33bf02369..0ec22354018c 100644
> --- a/arch/riscv/kernel/cpu_ops.c
> +++ b/arch/riscv/kernel/cpu_ops.c
> @@ -15,8 +15,8 @@
>
> const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
>
> -void *__cpu_up_stack_pointer[NR_CPUS];
> -void *__cpu_up_task_pointer[NR_CPUS];
> +void *__cpu_up_stack_pointer[NR_CPUS] __section(.data);
> +void *__cpu_up_task_pointer[NR_CPUS] __section(.data);
>
> extern const struct cpu_operations cpu_ops_sbi;
> extern const struct cpu_operations cpu_ops_spinwait;
> --
> 2.26.1
>
Apart from above, looks good to me.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
@ 2020-05-04 6:25 ` Anup Patel
0 siblings, 0 replies; 10+ messages in thread
From: Anup Patel @ 2020-05-04 6:25 UTC (permalink / raw)
To: Zong Li
Cc: Paul Walmsley, linux-kernel@vger.kernel.org List, Palmer Dabbelt,
Atish Patra, Greentime Hu, linux-riscv
On Mon, May 4, 2020 at 9:24 AM Zong Li <zong.li@sifive.com> wrote:
>
> Put __cpu_up_stack_pointer and __cpu_up_task_pointer in data section.
> Currently, these two variables are put in bss section, there is a
> potential risk that secondary harts get the uninitialized value before
> main hart finishing the bss clearing. In this case, all secondary
> harts would pass the waiting loop and enable the MMU before main hart
> set up the page table.
>
> This issue happened on random booting of multiple harts, which means
> it will manifest for BBL and OpenSBI which older than v0.6. In OpenSBI
> v0.7, it had included HSM extension, all the secondary harts are
> waiting in firmware, so it could work fine without this change.
Slightly improved text:
This issue happens on random booting of multiple harts, which means
it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
v0.7 (or higher version), we have HSM extension so all the secondary harts
are brought-up by Linux kernel in an orderly fashion. This means we don't
this change for OpenSBI v0.7 (or higher version).
>
> Changes in v2:
> - Add commit description about random booting.
>
> Signed-off-by: Zong Li <zong.li@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> ---
> arch/riscv/kernel/cpu_ops.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu_ops.c b/arch/riscv/kernel/cpu_ops.c
> index c4c33bf02369..0ec22354018c 100644
> --- a/arch/riscv/kernel/cpu_ops.c
> +++ b/arch/riscv/kernel/cpu_ops.c
> @@ -15,8 +15,8 @@
>
> const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
>
> -void *__cpu_up_stack_pointer[NR_CPUS];
> -void *__cpu_up_task_pointer[NR_CPUS];
> +void *__cpu_up_stack_pointer[NR_CPUS] __section(.data);
> +void *__cpu_up_task_pointer[NR_CPUS] __section(.data);
>
> extern const struct cpu_operations cpu_ops_sbi;
> extern const struct cpu_operations cpu_ops_spinwait;
> --
> 2.26.1
>
Apart from above, looks good to me.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
2020-05-04 6:25 ` Anup Patel
@ 2020-05-04 7:50 ` Andreas Schwab
-1 siblings, 0 replies; 10+ messages in thread
From: Andreas Schwab @ 2020-05-04 7:50 UTC (permalink / raw)
To: Anup Patel
Cc: Zong Li, Palmer Dabbelt, Paul Walmsley, Atish Patra, linux-riscv,
linux-kernel@vger.kernel.org List, Greentime Hu
On Mai 04 2020, Anup Patel wrote:
> Slightly improved text:
>
> This issue happens on random booting of multiple harts, which means
> it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
> v0.7 (or higher version), we have HSM extension so all the secondary harts
> are brought-up by Linux kernel in an orderly fashion. This means we don't
> this change for OpenSBI v0.7 (or higher version).
+need
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
@ 2020-05-04 7:50 ` Andreas Schwab
0 siblings, 0 replies; 10+ messages in thread
From: Andreas Schwab @ 2020-05-04 7:50 UTC (permalink / raw)
To: Anup Patel
Cc: Paul Walmsley, linux-kernel@vger.kernel.org List, Palmer Dabbelt,
Zong Li, Atish Patra, Greentime Hu, linux-riscv
On Mai 04 2020, Anup Patel wrote:
> Slightly improved text:
>
> This issue happens on random booting of multiple harts, which means
> it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
> v0.7 (or higher version), we have HSM extension so all the secondary harts
> are brought-up by Linux kernel in an orderly fashion. This means we don't
> this change for OpenSBI v0.7 (or higher version).
+need
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
2020-05-04 7:50 ` Andreas Schwab
@ 2020-05-04 17:37 ` Atish Patra
-1 siblings, 0 replies; 10+ messages in thread
From: Atish Patra @ 2020-05-04 17:37 UTC (permalink / raw)
To: Andreas Schwab
Cc: Anup Patel, Zong Li, Palmer Dabbelt, Paul Walmsley, linux-riscv,
linux-kernel@vger.kernel.org List, Greentime Hu
On Mon, May 4, 2020 at 12:50 AM Andreas Schwab <schwab@linux-m68k.org> wrote:
>
> On Mai 04 2020, Anup Patel wrote:
>
> > Slightly improved text:
> >
> > This issue happens on random booting of multiple harts, which means
> > it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
> > v0.7 (or higher version), we have HSM extension so all the secondary harts
> > are brought-up by Linux kernel in an orderly fashion. This means we don't
> > this change for OpenSBI v0.7 (or higher version).
>
> +need
>
> Andreas.
>
> --
> Andreas Schwab, schwab@linux-m68k.org
> GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
> "And now for something completely different."
With Andreas & Anup's nitpick addressed,
Reviewed-by: Atish Patra <atish.patra@wdc.com>
--
Regards,
Atish
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
@ 2020-05-04 17:37 ` Atish Patra
0 siblings, 0 replies; 10+ messages in thread
From: Atish Patra @ 2020-05-04 17:37 UTC (permalink / raw)
To: Andreas Schwab
Cc: Anup Patel, linux-kernel@vger.kernel.org List, Palmer Dabbelt,
Zong Li, Paul Walmsley, Greentime Hu, linux-riscv
On Mon, May 4, 2020 at 12:50 AM Andreas Schwab <schwab@linux-m68k.org> wrote:
>
> On Mai 04 2020, Anup Patel wrote:
>
> > Slightly improved text:
> >
> > This issue happens on random booting of multiple harts, which means
> > it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
> > v0.7 (or higher version), we have HSM extension so all the secondary harts
> > are brought-up by Linux kernel in an orderly fashion. This means we don't
> > this change for OpenSBI v0.7 (or higher version).
>
> +need
>
> Andreas.
>
> --
> Andreas Schwab, schwab@linux-m68k.org
> GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
> "And now for something completely different."
With Andreas & Anup's nitpick addressed,
Reviewed-by: Atish Patra <atish.patra@wdc.com>
--
Regards,
Atish
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
2020-05-04 17:37 ` Atish Patra
@ 2020-05-04 22:10 ` Palmer Dabbelt
-1 siblings, 0 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2020-05-04 22:10 UTC (permalink / raw)
To: atishp
Cc: schwab, anup, zong.li, Paul Walmsley, linux-riscv, linux-kernel,
greentime.hu
On Mon, 04 May 2020 10:37:40 PDT (-0700), atishp@atishpatra.org wrote:
> On Mon, May 4, 2020 at 12:50 AM Andreas Schwab <schwab@linux-m68k.org> wrote:
>>
>> On Mai 04 2020, Anup Patel wrote:
>>
>> > Slightly improved text:
>> >
>> > This issue happens on random booting of multiple harts, which means
>> > it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
>> > v0.7 (or higher version), we have HSM extension so all the secondary harts
>> > are brought-up by Linux kernel in an orderly fashion. This means we don't
>> > this change for OpenSBI v0.7 (or higher version).
>>
>> +need
>>
>> Andreas.
>>
>> --
>> Andreas Schwab, schwab@linux-m68k.org
>> GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
>> "And now for something completely different."
>
> With Andreas & Anup's nitpick addressed,
>
> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Thanks! It should be on fixes, with the new commit text.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] riscv: force __cpu_up_ variables to put in data section
@ 2020-05-04 22:10 ` Palmer Dabbelt
0 siblings, 0 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2020-05-04 22:10 UTC (permalink / raw)
To: atishp
Cc: anup, linux-kernel, schwab, zong.li, Paul Walmsley, greentime.hu,
linux-riscv
On Mon, 04 May 2020 10:37:40 PDT (-0700), atishp@atishpatra.org wrote:
> On Mon, May 4, 2020 at 12:50 AM Andreas Schwab <schwab@linux-m68k.org> wrote:
>>
>> On Mai 04 2020, Anup Patel wrote:
>>
>> > Slightly improved text:
>> >
>> > This issue happens on random booting of multiple harts, which means
>> > it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
>> > v0.7 (or higher version), we have HSM extension so all the secondary harts
>> > are brought-up by Linux kernel in an orderly fashion. This means we don't
>> > this change for OpenSBI v0.7 (or higher version).
>>
>> +need
>>
>> Andreas.
>>
>> --
>> Andreas Schwab, schwab@linux-m68k.org
>> GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
>> "And now for something completely different."
>
> With Andreas & Anup's nitpick addressed,
>
> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Thanks! It should be on fixes, with the new commit text.
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-05-04 22:10 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-04 3:54 [PATCH v2] riscv: force __cpu_up_ variables to put in data section Zong Li
2020-05-04 3:54 ` Zong Li
2020-05-04 6:25 ` Anup Patel
2020-05-04 6:25 ` Anup Patel
2020-05-04 7:50 ` Andreas Schwab
2020-05-04 7:50 ` Andreas Schwab
2020-05-04 17:37 ` Atish Patra
2020-05-04 17:37 ` Atish Patra
2020-05-04 22:10 ` Palmer Dabbelt
2020-05-04 22:10 ` Palmer Dabbelt
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