Xilinx clock wizard driver

Xilinx clock wizard driver

[Elias Kouskoumvekakis]

>From a quick look the driver reads / writes the clock wizard IP core's
registers and uses device tree bindings to access that part of AXI4 mapped
memory. All this implies that you need an hard/soft cpu core inside the
FPGA that will run Linux and this driver. The clock wizard IP core will
need to be properly instantiated and mapped on the hard / soft cpu's AXI4
interconnect so that the driver can access its registers.

To test the driver I suggest that you buy the cheapest Zynq board that you
can find and just build a simple block design in Vivado. The cpu on the
FPGA that will run Linux will be the Zynq PS hard cpu core and thus you
just need to create a simple block design with the Zynq PS and the clocking
wizard IP core. Of-course actually running this involves the preparation of
ROM that will contain your FPGA bitsteam with your design and the bootable
image of the kernel, i.e you must be familiar with the whole Vivado/SDK
flow for embedded designs.

Xilinx provides a lot of documentation material on these, it's just a
matter of time to read through them and follow the relative simple steps.
An alternative is the Zynq Book which covers all these in a very simple
fashion that I don't really like but it could be of use by someone
inexperienced with FPGAs and particularly the Zynq FPGA devices.
http://www.zynqbook.com

And for Zynq development boards I recommend the Parallella board which can
be bought for ~$125-$250 or the SnickerDoodle board for ~$145-$195. The
former is a bit old and besides the FPGA it contains a parallel chip called
Epiphany to experiment with parallel programming alongside the Zynq FPGA.
The latter is more recent and has a lot of I/O pins if you need them.
https://www.parallella.org/buy/
https://www.crowdsupply.com/krtkl/snickerdoodle

Elias
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Xilinx clock wizard driver

[Greg KH]

A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?

A: No.
Q: Should I include quotations after my reply?

http://daringfireball.net/2007/07/on_top

On Mon, Oct 09, 2017 at 08:42:34PM -0400, Merin Santhosh wrote:
> Xilinx fpga kits are pretty pricey, doubt if I can buy one.
> Is there any other way these codes can be tested? Can anyone who is an expert
> in the field comment?

For lots of drivers you do not need the hardware to make basic code
changes like cleanups and such.  But to make logical changes, then
having the hardware is almost essencial to ensure your changes actually
work.

If you can't get one of these kits, then try working on a different
driver.  Or ask the company if they can send you one.  Or look to get a
student discount.  Or something else.

best of luck!

greg k-h

Xilinx clock wizard driver

[Merin Santhosh]

> Just to let you know. You will get boo'ed loudly on kernel mailing lists
> if you top post (reply to
> email above the original email). The preferred method is inline (as this
> comment is). Some people
> leave the rest of the email trailing (as I will do on this occasion) and
> some remove everything
> after their last comment (as I usually do).
>
> thanks,
> Tobin.
>

Sure, will keep that in mind.
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Xilinx clock wizard driver

[Tobin C. Harding]

On Mon, Oct 09, 2017 at 08:42:34PM -0400, Merin Santhosh wrote:
> Xilinx fpga kits are pretty pricey, doubt if I can buy one.
> Is there any other way these codes can be tested? Can anyone who is an
> expert in the field comment?

Just to let you know. You will get boo'ed loudly on kernel mailing lists if you top post (reply to
email above the original email). The preferred method is inline (as this comment is). Some people
leave the rest of the email trailing (as I will do on this occasion) and some remove everything
after their last comment (as I usually do).

thanks,
Tobin.

> Merin
> 
> Merin Santhosh
> +1 (352) 214-3796
> 
> On Mon, Oct 9, 2017 at 5:46 PM, Tobin C. Harding <me@tobin.cc> wrote:
> 
> > On Mon, Oct 09, 2017 at 01:16:41PM -0400, Merin Santhosh wrote:
> > > Hi All,
> > >
> > > I'm Merin, I'm a masters student at the University of Florida.
> >
> > Hi Merin, welcome.
> >
> > > I was doing
> > > through the Linux Kernel, hoping to contribute to something of relevance.
> > > Since I have a background in systems, I was hoping to get started with
> > the
> > > Xilinx clocking wizard(link)
> > > <https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/
> > staging.git/tree/drivers/staging/clocking-wizard/TODO>
> >
> > Cool, go for it.
> >
> > > I wanted to know how is it that the modified driver is tested once coded.
> > > Can someone explain to me how this is done?
> >
> > I am by no means an expert. One sure method (for any of the drivers in
> > staging) is to buy some
> > hardware to test the driver. I know nothing about the Xilinx clocking
> > wizard but a quick search
> > shows that you can set up an FPGA board of some sort to use with the
> > clocking wizard. Here is a link
> > you may find useful
> >
> > http://gadgetfactory.net/learn/2017/02/22/fpga-
> > clocking-clocking-wizard-in-xilinx-ise/
> >
> > If you are borking at paying for hardware just look at it as an investment
> > in your education. Any
> > hardware you buy will be cheap compared with your other tuition fees.
> >
> > Happy hacking,
> > Tobin.
> >

Xilinx clock wizard driver

[Merin Santhosh]

Xilinx fpga kits are pretty pricey, doubt if I can buy one.
Is there any other way these codes can be tested? Can anyone who is an
expert in the field comment?

Merin

Merin Santhosh
+1 (352) 214-3796

On Mon, Oct 9, 2017 at 5:46 PM, Tobin C. Harding <me@tobin.cc> wrote:

> On Mon, Oct 09, 2017 at 01:16:41PM -0400, Merin Santhosh wrote:
> > Hi All,
> >
> > I'm Merin, I'm a masters student at the University of Florida.
>
> Hi Merin, welcome.
>
> > I was doing
> > through the Linux Kernel, hoping to contribute to something of relevance.
> > Since I have a background in systems, I was hoping to get started with
> the
> > Xilinx clocking wizard(link)
> > <https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/
> staging.git/tree/drivers/staging/clocking-wizard/TODO>
>
> Cool, go for it.
>
> > I wanted to know how is it that the modified driver is tested once coded.
> > Can someone explain to me how this is done?
>
> I am by no means an expert. One sure method (for any of the drivers in
> staging) is to buy some
> hardware to test the driver. I know nothing about the Xilinx clocking
> wizard but a quick search
> shows that you can set up an FPGA board of some sort to use with the
> clocking wizard. Here is a link
> you may find useful
>
> http://gadgetfactory.net/learn/2017/02/22/fpga-
> clocking-clocking-wizard-in-xilinx-ise/
>
> If you are borking at paying for hardware just look at it as an investment
> in your education. Any
> hardware you buy will be cheap compared with your other tuition fees.
>
> Happy hacking,
> Tobin.
>
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Xilinx clock wizard driver

[Tobin C. Harding]

On Mon, Oct 09, 2017 at 01:16:41PM -0400, Merin Santhosh wrote:
> Hi All,
> 
> I'm Merin, I'm a masters student at the University of Florida.

Hi Merin, welcome.

> I was doing
> through the Linux Kernel, hoping to contribute to something of relevance.
> Since I have a background in systems, I was hoping to get started with the
> Xilinx clocking wizard(link)
> <https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git/tree/drivers/staging/clocking-wizard/TODO>

Cool, go for it.

> I wanted to know how is it that the modified driver is tested once coded.
> Can someone explain to me how this is done?

I am by no means an expert. One sure method (for any of the drivers in staging) is to buy some
hardware to test the driver. I know nothing about the Xilinx clocking wizard but a quick search
shows that you can set up an FPGA board of some sort to use with the clocking wizard. Here is a link
you may find useful

http://gadgetfactory.net/learn/2017/02/22/fpga-clocking-clocking-wizard-in-xilinx-ise/

If you are borking at paying for hardware just look at it as an investment in your education. Any
hardware you buy will be cheap compared with your other tuition fees.

Happy hacking,
Tobin.

Xilinx clock wizard driver

[Merin Santhosh]

Hi All,

I'm Merin, I'm a masters student at the University of Florida. I was doing
through the Linux Kernel, hoping to contribute to something of relevance.
Since I have a background in systems, I was hoping to get started with the
Xilinx clocking wizard(link)
<https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git/tree/drivers/staging/clocking-wizard/TODO>
.

I wanted to know how is it that the modified driver is tested once coded.
Can someone explain to me how this is done?

Thanks,
Merin
Merin Santhosh
+1 (352) 214-3796
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