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* [PATCH] drm/amdgpu: Add DCC flags for GFX9 amdgpu_bo
@ 2018-10-23 14:04 Nicholas Kazlauskas
       [not found] ` <20181023140454.23097-1-nicholas.kazlauskas-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 2+ messages in thread
From: Nicholas Kazlauskas @ 2018-10-23 14:04 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Marek.Olsak-5C7GfCeVMHo, Harry.Wentland-5C7GfCeVMHo, Nicholas Kazlauskas

[Why]
Hardware support for Delta Color Compression (DCC) decompression is
available in DC for GFX9 but there's no way for userspace to enable
the feature.

Enabling the feature can provide improved GFX performance and
power savings in many situations.

[How]
Extend the GFX9 tiling flags to include DCC parameters. These are
logically grouped together with tiling flags even if they are
technically distinct.

This trivially maintains backwards compatibility with existing
users of amdgpu_gem_metadata. No new IOCTls or data structures are
needed to support DCC.

This patch helps expose DCC attributes to both libdrm and amdgpu_dm.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
---
 include/uapi/drm/amdgpu_drm.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 6a0d77dcfc47..faaad04814e4 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -329,6 +329,12 @@ struct drm_amdgpu_gem_userptr {
 /* GFX9 and later: */
 #define AMDGPU_TILING_SWIZZLE_MODE_SHIFT		0
 #define AMDGPU_TILING_SWIZZLE_MODE_MASK			0x1f
+#define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT		5
+#define AMDGPU_TILING_DCC_OFFSET_256B_MASK		0xFFFFFF
+#define AMDGPU_TILING_DCC_PITCH_MAX_SHIFT		29
+#define AMDGPU_TILING_DCC_PITCH_MAX_MASK		0x3FFF
+#define AMDGPU_TILING_DCC_INDEPENDENT_64B_SHIFT		43
+#define AMDGPU_TILING_DCC_INDEPENDENT_64B_MASK		0x1
 
 /* Set/Get helpers for tiling flags. */
 #define AMDGPU_TILING_SET(field, value) \
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] drm/amdgpu: Add DCC flags for GFX9 amdgpu_bo
       [not found] ` <20181023140454.23097-1-nicholas.kazlauskas-5C7GfCeVMHo@public.gmane.org>
@ 2018-10-23 18:28   ` Marek Olšák
  0 siblings, 0 replies; 2+ messages in thread
From: Marek Olšák @ 2018-10-23 18:28 UTC (permalink / raw)
  To: nicholas.kazlauskas-5C7GfCeVMHo; +Cc: Harry Wentland, amd-gfx mailing list


[-- Attachment #1.1: Type: text/plain, Size: 2177 bytes --]

Reviewed-by: Marek Olšák <marek.olsak-5C7GfCeVMHo@public.gmane.org>

Marek

On Tue, Oct 23, 2018 at 10:05 AM Nicholas Kazlauskas <
nicholas.kazlauskas-5C7GfCeVMHo@public.gmane.org> wrote:

> [Why]
> Hardware support for Delta Color Compression (DCC) decompression is
> available in DC for GFX9 but there's no way for userspace to enable
> the feature.
>
> Enabling the feature can provide improved GFX performance and
> power savings in many situations.
>
> [How]
> Extend the GFX9 tiling flags to include DCC parameters. These are
> logically grouped together with tiling flags even if they are
> technically distinct.
>
> This trivially maintains backwards compatibility with existing
> users of amdgpu_gem_metadata. No new IOCTls or data structures are
> needed to support DCC.
>
> This patch helps expose DCC attributes to both libdrm and amdgpu_dm.
>
> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas-5C7GfCeVMHo@public.gmane.org>
> ---
>  include/uapi/drm/amdgpu_drm.h | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 6a0d77dcfc47..faaad04814e4 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -329,6 +329,12 @@ struct drm_amdgpu_gem_userptr {
>  /* GFX9 and later: */
>  #define AMDGPU_TILING_SWIZZLE_MODE_SHIFT               0
>  #define AMDGPU_TILING_SWIZZLE_MODE_MASK                        0x1f
> +#define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT            5
> +#define AMDGPU_TILING_DCC_OFFSET_256B_MASK             0xFFFFFF
> +#define AMDGPU_TILING_DCC_PITCH_MAX_SHIFT              29
> +#define AMDGPU_TILING_DCC_PITCH_MAX_MASK               0x3FFF
> +#define AMDGPU_TILING_DCC_INDEPENDENT_64B_SHIFT                43
> +#define AMDGPU_TILING_DCC_INDEPENDENT_64B_MASK         0x1
>
>  /* Set/Get helpers for tiling flags. */
>  #define AMDGPU_TILING_SET(field, value) \
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>

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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2018-10-23 18:28 UTC | newest]

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2018-10-23 14:04 [PATCH] drm/amdgpu: Add DCC flags for GFX9 amdgpu_bo Nicholas Kazlauskas
     [not found] ` <20181023140454.23097-1-nicholas.kazlauskas-5C7GfCeVMHo@public.gmane.org>
2018-10-23 18:28   ` Marek Olšák

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