All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event
@ 2022-02-03  1:48 Jim Mattson
  2022-02-03  1:48 ` [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW Jim Mattson
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Jim Mattson @ 2022-02-03  1:48 UTC (permalink / raw)
  To: kvm, pbonzini; +Cc: Jim Mattson, Stephane Eranian

AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of
a PerfEvtSeln MSR. Don't drop the high nybble when setting up the
config field of a perf_event_attr structure for a call to
perf_event_create_kernel_counter().

Fixes: ca724305a2b0 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM")
Reported-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Jim Mattson <jmattson@google.com>
---
 arch/x86/kvm/pmu.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index 2c98f3ee8df4..80f7e5bb6867 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -95,7 +95,7 @@ static void kvm_perf_overflow(struct perf_event *perf_event,
 }
 
 static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
-				  unsigned config, bool exclude_user,
+				  u64 config, bool exclude_user,
 				  bool exclude_kernel, bool intr,
 				  bool in_tx, bool in_tx_cp)
 {
@@ -181,7 +181,8 @@ static int cmp_u64(const void *a, const void *b)
 
 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
 {
-	unsigned config, type = PERF_TYPE_RAW;
+	u64 config;
+	u32 type = PERF_TYPE_RAW;
 	struct kvm *kvm = pmc->vcpu->kvm;
 	struct kvm_pmu_event_filter *filter;
 	bool allow_event = true;
-- 
2.35.0.263.gb82422642f-goog


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW
  2022-02-03  1:48 [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event Jim Mattson
@ 2022-02-03  1:48 ` Jim Mattson
  2022-02-13  1:45   ` David Dunn
  2022-02-13  1:41 ` [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event David Dunn
  2022-02-14 12:45 ` Paolo Bonzini
  2 siblings, 1 reply; 5+ messages in thread
From: Jim Mattson @ 2022-02-03  1:48 UTC (permalink / raw)
  To: kvm, pbonzini; +Cc: Jim Mattson

AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of
a PerfEvtSeln MSR. Don't mask off the high nybble when configuring a
RAW perf event.

Fixes: ca724305a2b0 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM")
Signed-off-by: Jim Mattson <jmattson@google.com>
---
 arch/x86/kvm/pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index 80f7e5bb6867..06715a4f08ec 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -221,7 +221,7 @@ void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
 	}
 
 	if (type == PERF_TYPE_RAW)
-		config = eventsel & X86_RAW_EVENT_MASK;
+		config = eventsel & AMD64_RAW_EVENT_MASK;
 
 	if (pmc->current_config == eventsel && pmc_resume_counter(pmc))
 		return;
-- 
2.35.0.263.gb82422642f-goog


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event
  2022-02-03  1:48 [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event Jim Mattson
  2022-02-03  1:48 ` [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW Jim Mattson
@ 2022-02-13  1:41 ` David Dunn
  2022-02-14 12:45 ` Paolo Bonzini
  2 siblings, 0 replies; 5+ messages in thread
From: David Dunn @ 2022-02-13  1:41 UTC (permalink / raw)
  To: Jim Mattson; +Cc: kvm, Paolo Bonzini, Stephane Eranian

Reviewed-by: David Dunn <daviddunn@google.com>


On Wed, Feb 2, 2022 at 5:52 PM Jim Mattson <jmattson@google.com> wrote:
>
> AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of
> a PerfEvtSeln MSR. Don't drop the high nybble when setting up the
> config field of a perf_event_attr structure for a call to
> perf_event_create_kernel_counter().

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW
  2022-02-03  1:48 ` [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW Jim Mattson
@ 2022-02-13  1:45   ` David Dunn
  0 siblings, 0 replies; 5+ messages in thread
From: David Dunn @ 2022-02-13  1:45 UTC (permalink / raw)
  To: Jim Mattson; +Cc: kvm, Paolo Bonzini

Reviewed-by: David Dunn <daviddunn@google.com>

On Wed, Feb 2, 2022 at 5:52 PM Jim Mattson <jmattson@google.com> wrote:
>
> AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of
> a PerfEvtSeln MSR. Don't mask off the high nybble when configuring a
> RAW perf event.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event
  2022-02-03  1:48 [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event Jim Mattson
  2022-02-03  1:48 ` [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW Jim Mattson
  2022-02-13  1:41 ` [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event David Dunn
@ 2022-02-14 12:45 ` Paolo Bonzini
  2 siblings, 0 replies; 5+ messages in thread
From: Paolo Bonzini @ 2022-02-14 12:45 UTC (permalink / raw)
  To: Jim Mattson, kvm; +Cc: Stephane Eranian

On 2/3/22 02:48, Jim Mattson wrote:
> AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of
> a PerfEvtSeln MSR. Don't drop the high nybble when setting up the
> config field of a perf_event_attr structure for a call to
> perf_event_create_kernel_counter().
> 
> Fixes: ca724305a2b0 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM")
> Reported-by: Stephane Eranian <eranian@google.com>
> Signed-off-by: Jim Mattson <jmattson@google.com>
> ---
>   arch/x86/kvm/pmu.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
> index 2c98f3ee8df4..80f7e5bb6867 100644
> --- a/arch/x86/kvm/pmu.c
> +++ b/arch/x86/kvm/pmu.c
> @@ -95,7 +95,7 @@ static void kvm_perf_overflow(struct perf_event *perf_event,
>   }
>   
>   static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
> -				  unsigned config, bool exclude_user,
> +				  u64 config, bool exclude_user,
>   				  bool exclude_kernel, bool intr,
>   				  bool in_tx, bool in_tx_cp)
>   {
> @@ -181,7 +181,8 @@ static int cmp_u64(const void *a, const void *b)
>   
>   void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
>   {
> -	unsigned config, type = PERF_TYPE_RAW;
> +	u64 config;
> +	u32 type = PERF_TYPE_RAW;
>   	struct kvm *kvm = pmc->vcpu->kvm;
>   	struct kvm_pmu_event_filter *filter;
>   	bool allow_event = true;

Queued both, thanks.

Paolo


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-02-14 12:45 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-03  1:48 [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event Jim Mattson
2022-02-03  1:48 ` [PATCH 2/2] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW Jim Mattson
2022-02-13  1:45   ` David Dunn
2022-02-13  1:41 ` [PATCH 1/2] KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event David Dunn
2022-02-14 12:45 ` Paolo Bonzini

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.