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From: Stephane Eranian <eranian@google.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@kernel.org>, Jiri Olsa <jolsa@redhat.com>,
	LKML <linux-kernel@vger.kernel.org>,
	tonyj@suse.com, nelson.dsouza@intel.com
Subject: Re: [RFC][PATCH 7/8] perf/x86: Optimize x86_schedule_events()
Date: Wed, 20 Mar 2019 12:30:25 -0700	[thread overview]
Message-ID: <CABPqkBQ+1zCJmYCH_cHrs3Z3t3iVyWLeiWD_nUy1niu4qFhvpg@mail.gmail.com> (raw)
In-Reply-To: <20190320131108.GG6058@hirez.programming.kicks-ass.net>

On Wed, Mar 20, 2019 at 6:11 AM Peter Zijlstra <peterz@infradead.org> wrote:
>
> On Tue, Mar 19, 2019 at 04:55:16PM -0700, Stephane Eranian wrote:
> > On Thu, Mar 14, 2019 at 6:11 AM Peter Zijlstra <peterz@infradead.org> wrote:
> > > @@ -858,8 +864,20 @@ int x86_schedule_events(struct cpu_hw_ev
> > >                 x86_pmu.start_scheduling(cpuc);
> > >
> > >         for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
> > > -               c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
> > > -               cpuc->event_constraint[i] = c;
> > > +               c = cpuc->event_constraint[i];
> > > +
> > > +               /*
> > > +                * Request constraints for new events; or for those events that
> > > +                * have a dynamic constraint due to the HT workaround -- for
> > > +                * those the constraint can change due to scheduling activity
> > > +                * on the other sibling.
> > > +                */
> > > +               if (!c || ((c->flags & PERF_X86_EVENT_DYNAMIC) &&
> > > +                          is_ht_workaround_active(cpuc))) {
> > > +
> > > +                       c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
> > > +                       cpuc->event_constraint[i] = c;
> > > +               }
>
> > On this one, I think there may be a problem with events with
> > shared_regs constraints.
>
> Hmm...
>
> > Constraint is dynamic as it depends on other events which share the
> > same MSR, yet it is not marked as DYNAMIC.
>
> it returns &emptyconstraint or a table constraint, depending on register
> state.
>
> > But this may be okay because these other events are all on the same
> > CPU and thus scheduled during the same ctx_sched_in(). Yet with the
> > swapping in intel_alt_er(), we need to double-check that we cannot
> > reuse a constraint which could be stale.
>
> > I believe this is okay, just double-check.
>
> I'm not sure I see a problem.
>
> So if we're the first event on a shared register, we claim the register
> and scheduling succeeds (barring other constraints).
>
> If we're the second event on a shared register (and have conflicting
> register state), we get the empty constraint. This _will_ cause
> scheduling to fail. We'll not cache the state and punt it back to the
> core code.
>
> So no future scheduling pass will come to see a shared reg constraint
> that could've changed.
>
> Now, there is indeed the intel_alt_er() thing, which slightly
> complicates this; then suppose we schedule an event on RSP0, another on
> RSP1, then remove the RSP0 one. Even in that case, the remaining RSP1
> event will not change its constraint, since intel_fixup_er() rewrites
> the event to be a native RSP1 event.
>
> So that too reduces to the prior case.
>
I came the same conclusion later yesterday. I think this is okay.

>
> That said; I have simplified the above condition to:
>
> @@ -858,8 +858,17 @@ int x86_schedule_events(struct cpu_hw_ev
>                 x86_pmu.start_scheduling(cpuc);
>
>         for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
> -               c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
> -               cpuc->event_constraint[i] = c;
> +               c = cpuc->event_constraint[i];
> +
> +               /*
> +                * Request constraints for new events; or for those events that
> +                * have a dynamic constraint -- for those the constraint can
> +                * change due to external factors (sibling state, allow_tfa).
> +                */
> +               if (!c || (c->flags & PERF_X86_EVENT_DYNAMIC)) {
> +                       c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
> +                       cpuc->event_constraint[i] = c;
> +               }
>
Right now DYNAMIC is only casued by the HT bug, but it could change later on but
the logic here would remain. If HT workaround is disabled, then no
evnt is tagged with
DYNAMIC.

>                 wmin = min(wmin, c->weight);
>                 wmax = max(wmax, c->weight);
>
> Because any dynamic event can change from one moment to the next.
I agree.

  reply	other threads:[~2019-03-20 19:30 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-14 13:01 [RFC][PATCH 0/8] perf/x86: event scheduling cleanups Peter Zijlstra
2019-03-14 13:01 ` [PATCH 1/8] perf/x86/intel: Fix memory corruption Peter Zijlstra
2019-03-15 11:29   ` [tip:perf/urgent] " tip-bot for Peter Zijlstra
2019-03-19  6:29   ` [PATCH 1/8] " Stephane Eranian
2019-03-19 11:05     ` Peter Zijlstra
2019-03-19 17:52       ` Stephane Eranian
2019-03-19 18:20         ` Peter Zijlstra
2019-03-20 20:47           ` Stephane Eranian
2019-03-20 20:52             ` Stephane Eranian
2019-03-20 22:22             ` Peter Zijlstra
2019-03-21 12:38               ` Peter Zijlstra
2019-03-21 16:45                 ` Thomas Gleixner
2019-03-21 17:10                   ` Peter Zijlstra
2019-03-21 17:17                     ` Thomas Gleixner
2019-03-21 18:20                       ` Peter Zijlstra
2019-03-21 19:42                         ` Tony Jones
2019-03-21 19:47                           ` DSouza, Nelson
2019-03-21 20:07                             ` Peter Zijlstra
2019-03-21 23:16                               ` DSouza, Nelson
2019-03-22 22:14                                 ` DSouza, Nelson
2019-03-21 17:23                   ` Stephane Eranian
2019-03-21 17:51                     ` Thomas Gleixner
2019-03-22 19:04                       ` Stephane Eranian
2019-04-03  7:32                         ` Peter Zijlstra
2019-04-03 10:40                 ` [tip:perf/urgent] perf/x86/intel: Initialize TFA MSR tip-bot for Peter Zijlstra
2019-04-03 11:30                   ` Thomas Gleixner
2019-04-03 12:23                     ` Vince Weaver
2019-03-14 13:01 ` [RFC][PATCH 2/8] perf/x86/intel: Simplify intel_tfa_commit_scheduling() Peter Zijlstra
2019-03-14 13:01 ` [RFC][PATCH 3/8] perf/x86: Simplify x86_pmu.get_constraints() interface Peter Zijlstra
2019-03-19 21:21   ` Stephane Eranian
2019-03-14 13:01 ` [RFC][PATCH 4/8] perf/x86: Remove PERF_X86_EVENT_COMMITTED Peter Zijlstra
2019-03-19 20:48   ` Stephane Eranian
2019-03-19 21:00     ` Peter Zijlstra
2019-03-20 13:14       ` Peter Zijlstra
2019-03-20 12:23     ` Peter Zijlstra
2019-03-14 13:01 ` [RFC][PATCH 5/8] perf/x86/intel: Optimize intel_get_excl_constraints() Peter Zijlstra
2019-03-19 23:43   ` Stephane Eranian
2019-03-14 13:01 ` [RFC][PATCH 6/8] perf/x86: Clear ->event_constraint[] on put Peter Zijlstra
2019-03-19 21:50   ` Stephane Eranian
2019-03-20 12:25     ` Peter Zijlstra
2019-03-14 13:01 ` [RFC][PATCH 7/8] perf/x86: Optimize x86_schedule_events() Peter Zijlstra
2019-03-19 23:55   ` Stephane Eranian
2019-03-20 13:11     ` Peter Zijlstra
2019-03-20 19:30       ` Stephane Eranian [this message]
2019-03-14 13:01 ` [RFC][PATCH 8/8] perf/x86: Add sanity checks to x86_schedule_events() Peter Zijlstra
2019-03-15  7:15 ` [RFC][PATCH 0/8] perf/x86: event scheduling cleanups Stephane Eranian
2019-03-15  7:15   ` Stephane Eranian
2019-03-15  8:01     ` Peter Zijlstra

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