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From: Stephane Eranian <eranian@google.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@kernel.org>, Jiri Olsa <jolsa@redhat.com>,
	LKML <linux-kernel@vger.kernel.org>,
	tonyj@suse.com, nelson.dsouza@intel.com
Subject: Re: [RFC][PATCH 5/8] perf/x86/intel: Optimize intel_get_excl_constraints()
Date: Tue, 19 Mar 2019 16:43:04 -0700	[thread overview]
Message-ID: <CABPqkBTdPh9yHYyu3nVkTNMi-CG2Z6euAomuNCCSJExC6mg6eA@mail.gmail.com> (raw)
In-Reply-To: <20190314130705.852659665@infradead.org>

On Thu, Mar 14, 2019 at 6:11 AM Peter Zijlstra <peterz@infradead.org> wrote:
>
> Avoid the POPCNT by noting we can decrement the weight for each
> cleared bit.
>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Looks good to me.
Reviewed-by: Stephane Eranian <eranian@google.com>

> ---
>  arch/x86/events/intel/core.c |   22 +++++++++++++---------
>  1 file changed, 13 insertions(+), 9 deletions(-)
>
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -2838,7 +2838,7 @@ intel_get_excl_constraints(struct cpu_hw
>         struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
>         struct intel_excl_states *xlo;
>         int tid = cpuc->excl_thread_id;
> -       int is_excl, i;
> +       int is_excl, i, w;
>
>         /*
>          * validating a group does not require
> @@ -2894,36 +2894,40 @@ intel_get_excl_constraints(struct cpu_hw
>          * SHARED   : sibling counter measuring non-exclusive event
>          * UNUSED   : sibling counter unused
>          */
> +       w = c->weight;
>         for_each_set_bit(i, c->idxmsk, X86_PMC_IDX_MAX) {
>                 /*
>                  * exclusive event in sibling counter
>                  * our corresponding counter cannot be used
>                  * regardless of our event
>                  */
> -               if (xlo->state[i] == INTEL_EXCL_EXCLUSIVE)
> +               if (xlo->state[i] == INTEL_EXCL_EXCLUSIVE) {
>                         __clear_bit(i, c->idxmsk);
> +                       w--;
> +                       continue;
> +               }
>                 /*
>                  * if measuring an exclusive event, sibling
>                  * measuring non-exclusive, then counter cannot
>                  * be used
>                  */
> -               if (is_excl && xlo->state[i] == INTEL_EXCL_SHARED)
> +               if (is_excl && xlo->state[i] == INTEL_EXCL_SHARED) {
>                         __clear_bit(i, c->idxmsk);
> +                       w--;
> +                       continue;
> +               }
>         }
>
>         /*
> -        * recompute actual bit weight for scheduling algorithm
> -        */
> -       c->weight = hweight64(c->idxmsk64);
> -
> -       /*
>          * if we return an empty mask, then switch
>          * back to static empty constraint to avoid
>          * the cost of freeing later on
>          */
> -       if (c->weight == 0)
> +       if (!w)
>                 c = &emptyconstraint;
>
> +       c->weight = w;
> +
>         return c;
>  }
>
>
>

  reply	other threads:[~2019-03-19 23:43 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-14 13:01 [RFC][PATCH 0/8] perf/x86: event scheduling cleanups Peter Zijlstra
2019-03-14 13:01 ` [PATCH 1/8] perf/x86/intel: Fix memory corruption Peter Zijlstra
2019-03-15 11:29   ` [tip:perf/urgent] " tip-bot for Peter Zijlstra
2019-03-19  6:29   ` [PATCH 1/8] " Stephane Eranian
2019-03-19 11:05     ` Peter Zijlstra
2019-03-19 17:52       ` Stephane Eranian
2019-03-19 18:20         ` Peter Zijlstra
2019-03-20 20:47           ` Stephane Eranian
2019-03-20 20:52             ` Stephane Eranian
2019-03-20 22:22             ` Peter Zijlstra
2019-03-21 12:38               ` Peter Zijlstra
2019-03-21 16:45                 ` Thomas Gleixner
2019-03-21 17:10                   ` Peter Zijlstra
2019-03-21 17:17                     ` Thomas Gleixner
2019-03-21 18:20                       ` Peter Zijlstra
2019-03-21 19:42                         ` Tony Jones
2019-03-21 19:47                           ` DSouza, Nelson
2019-03-21 20:07                             ` Peter Zijlstra
2019-03-21 23:16                               ` DSouza, Nelson
2019-03-22 22:14                                 ` DSouza, Nelson
2019-03-21 17:23                   ` Stephane Eranian
2019-03-21 17:51                     ` Thomas Gleixner
2019-03-22 19:04                       ` Stephane Eranian
2019-04-03  7:32                         ` Peter Zijlstra
2019-04-03 10:40                 ` [tip:perf/urgent] perf/x86/intel: Initialize TFA MSR tip-bot for Peter Zijlstra
2019-04-03 11:30                   ` Thomas Gleixner
2019-04-03 12:23                     ` Vince Weaver
2019-03-14 13:01 ` [RFC][PATCH 2/8] perf/x86/intel: Simplify intel_tfa_commit_scheduling() Peter Zijlstra
2019-03-14 13:01 ` [RFC][PATCH 3/8] perf/x86: Simplify x86_pmu.get_constraints() interface Peter Zijlstra
2019-03-19 21:21   ` Stephane Eranian
2019-03-14 13:01 ` [RFC][PATCH 4/8] perf/x86: Remove PERF_X86_EVENT_COMMITTED Peter Zijlstra
2019-03-19 20:48   ` Stephane Eranian
2019-03-19 21:00     ` Peter Zijlstra
2019-03-20 13:14       ` Peter Zijlstra
2019-03-20 12:23     ` Peter Zijlstra
2019-03-14 13:01 ` [RFC][PATCH 5/8] perf/x86/intel: Optimize intel_get_excl_constraints() Peter Zijlstra
2019-03-19 23:43   ` Stephane Eranian [this message]
2019-03-14 13:01 ` [RFC][PATCH 6/8] perf/x86: Clear ->event_constraint[] on put Peter Zijlstra
2019-03-19 21:50   ` Stephane Eranian
2019-03-20 12:25     ` Peter Zijlstra
2019-03-14 13:01 ` [RFC][PATCH 7/8] perf/x86: Optimize x86_schedule_events() Peter Zijlstra
2019-03-19 23:55   ` Stephane Eranian
2019-03-20 13:11     ` Peter Zijlstra
2019-03-20 19:30       ` Stephane Eranian
2019-03-14 13:01 ` [RFC][PATCH 8/8] perf/x86: Add sanity checks to x86_schedule_events() Peter Zijlstra
2019-03-15  7:15 ` [RFC][PATCH 0/8] perf/x86: event scheduling cleanups Stephane Eranian
2019-03-15  7:15   ` Stephane Eranian
2019-03-15  8:01     ` Peter Zijlstra

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