* [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform @ 2019-12-18 9:05 Ani Sinha 2019-12-18 11:53 ` Paolo Bonzini 0 siblings, 1 reply; 18+ messages in thread From: Ani Sinha @ 2019-12-18 9:05 UTC (permalink / raw) To: pbonzini, rth, ehabkost; +Cc: ani.sinha, qemu-devel CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU model when the AMD ZEN based host supports it. This change makes it recognize this CPUID for guests which use EPYC or EPYC-IBPB CPU model. Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> --- target/i386/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 69f518a..55f0691 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_TOPOEXT, + .features[FEAT_8000_0008_EBX] = + CPUID_8000_0008_EBX_CLZERO, .features[FEAT_7_0_EBX] = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | -- 1.9.4 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-18 9:05 [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform Ani Sinha @ 2019-12-18 11:53 ` Paolo Bonzini 2019-12-18 15:11 ` Eduardo Habkost 2019-12-22 7:32 ` Ani Sinha 0 siblings, 2 replies; 18+ messages in thread From: Paolo Bonzini @ 2019-12-18 11:53 UTC (permalink / raw) To: Ani Sinha, rth, ehabkost; +Cc: qemu-devel On 18/12/19 10:05, Ani Sinha wrote: > CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU > model when the AMD ZEN based host supports it. This change makes it recognize > this CPUID for guests which use EPYC or EPYC-IBPB CPU model. > > Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> > --- > target/i386/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 69f518a..55f0691 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { > CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | > CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | > CPUID_EXT3_TOPOEXT, > + .features[FEAT_8000_0008_EBX] = > + CPUID_8000_0008_EBX_CLZERO, > .features[FEAT_7_0_EBX] = > CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | > CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | > This needs to be done only for newer machine type (or is it CPU model versions now? need Eduardo to respond). Paolo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-18 11:53 ` Paolo Bonzini @ 2019-12-18 15:11 ` Eduardo Habkost 2020-01-20 10:56 ` Ani Sinha 2019-12-22 7:32 ` Ani Sinha 1 sibling, 1 reply; 18+ messages in thread From: Eduardo Habkost @ 2019-12-18 15:11 UTC (permalink / raw) To: Paolo Bonzini; +Cc: Ani Sinha, qemu-devel, rth On Wed, Dec 18, 2019 at 12:53:45PM +0100, Paolo Bonzini wrote: > On 18/12/19 10:05, Ani Sinha wrote: > > CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU > > model when the AMD ZEN based host supports it. This change makes it recognize > > this CPUID for guests which use EPYC or EPYC-IBPB CPU model. Can you clarify what's the intended use case here? Why the "if host supports it" conditional? If you need host-dependent CPU configuration, "-cpu host" (or the libvirt "host-model" mode) is the most appropriate solution. > > > > Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> > > --- > > target/i386/cpu.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > > index 69f518a..55f0691 100644 > > --- a/target/i386/cpu.c > > +++ b/target/i386/cpu.c > > @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { > > CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | > > CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | > > CPUID_EXT3_TOPOEXT, > > + .features[FEAT_8000_0008_EBX] = > > + CPUID_8000_0008_EBX_CLZERO, > > .features[FEAT_7_0_EBX] = > > CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | > > CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | > > > > This needs to be done only for newer machine type (or is it CPU model > versions now? need Eduardo to respond). If we want to add it, it has to be done as a new CPU model version. But I don't know yet if we want to add it. Do all EPYC CPUs have CLZERO available? If not, it's probably not advisable to add it to EPYC (even if it's just on EPYC-v3). -- Eduardo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-18 15:11 ` Eduardo Habkost @ 2020-01-20 10:56 ` Ani Sinha 2020-02-05 22:37 ` Eduardo Habkost 0 siblings, 1 reply; 18+ messages in thread From: Ani Sinha @ 2020-01-20 10:56 UTC (permalink / raw) To: Eduardo Habkost; +Cc: Paolo Bonzini, qemu-devel, rth Sorry Eduardo, it took a little while for me to get to this thread again. > On Dec 18, 2019, at 8:41 PM, Eduardo Habkost <ehabkost@redhat.com> wrote: > > On Wed, Dec 18, 2019 at 12:53:45PM +0100, Paolo Bonzini wrote: >> On 18/12/19 10:05, Ani Sinha wrote: >>> CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU >>> model when the AMD ZEN based host supports it. This change makes it recognize >>> this CPUID for guests which use EPYC or EPYC-IBPB CPU model. > > Can you clarify what's the intended use case here? Why the > "if host supports it" conditional? Looking at https://www.amd.com/system/files/TechDocs/24594.pdf , it says : "The CLZERO instruction is supported if the feature flag CPUID Fn8000_0008_EBX[CLZERO] is set.” This I interpreted to mean that not all AMD Zen architectures supports it. So when the host does support it, this CPUID should be passed on to the guest as well. > > If you need host-dependent CPU configuration, "-cpu host" (or the > libvirt "host-model" mode) is the most appropriate solution. Yes that is an option but we are going to use EPYC-IBPB model for now. > >>> >>> Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> >>> --- >>> target/i386/cpu.c | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >>> index 69f518a..55f0691 100644 >>> --- a/target/i386/cpu.c >>> +++ b/target/i386/cpu.c >>> @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { >>> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | >>> CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | >>> CPUID_EXT3_TOPOEXT, >>> + .features[FEAT_8000_0008_EBX] = >>> + CPUID_8000_0008_EBX_CLZERO, >>> .features[FEAT_7_0_EBX] = >>> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | >>> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | >>> >> >> This needs to be done only for newer machine type (or is it CPU model >> versions now? need Eduardo to respond). > > If we want to add it, it has to be done as a new CPU model version. I see what you mean. > > But I don't know yet if we want to add it. Do all EPYC CPUs have > CLZERO available? If not, it's probably not advisable to add it > to EPYC (even if it's just on EPYC-v3). Ok so I think we need to get this clarified from AMD if all their EPYC platforms supports this CPUID or not. Is there any contact point within AMD where we can get this information? For our use case, I just verified that even without this patch, if we pass CLZERO through libvirt CPU definition xml, like " <feature policy='require' name='clzero’/>”, it gets passed on to the guest. So this patch is not super critical for us. Thanks, Ani > > -- > Eduardo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-01-20 10:56 ` Ani Sinha @ 2020-02-05 22:37 ` Eduardo Habkost 2020-02-06 0:00 ` Moger, Babu 0 siblings, 1 reply; 18+ messages in thread From: Eduardo Habkost @ 2020-02-05 22:37 UTC (permalink / raw) To: Ani Sinha; +Cc: Paolo Bonzini, Brijesh Singh, qemu-devel, Babu Moger, rth Hi, Sorry for the delayed reply. I was away from work for the whole month of January. On Mon, Jan 20, 2020 at 10:56:43AM +0000, Ani Sinha wrote: > Sorry Eduardo, it took a little while for me to get to this thread again. > > > On Dec 18, 2019, at 8:41 PM, Eduardo Habkost <ehabkost@redhat.com> wrote: > > > > On Wed, Dec 18, 2019 at 12:53:45PM +0100, Paolo Bonzini wrote: > >> On 18/12/19 10:05, Ani Sinha wrote: > >>> CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU > >>> model when the AMD ZEN based host supports it. This change makes it recognize > >>> this CPUID for guests which use EPYC or EPYC-IBPB CPU model. > > > > Can you clarify what's the intended use case here? Why the > > "if host supports it" conditional? > > Looking at https://www.amd.com/system/files/TechDocs/24594.pdf , it says : > > "The CLZERO instruction is supported if the feature flag CPUID Fn8000_0008_EBX[CLZERO] is set.” > > This I interpreted to mean that not all AMD Zen architectures > supports it. So when the host does support it, this CPUID > should be passed on to the guest as well. This is not a supported use case of named CPU models. Named CPU models should expose the same guest ABI on all hosts. This means CPUID should be the same on all hosts if using the same CPU model (and same machine type). If you need features to be automatically enabled/disabled depending on host capabilities, I advise you to use "-cpu host" or libvirt's mode=host-model. > > > > > > If you need host-dependent CPU configuration, "-cpu host" (or the > > libvirt "host-model" mode) is the most appropriate solution. > > Yes that is an option but we are going to use EPYC-IBPB model for now. > > > > > >>> > >>> Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> > >>> --- > >>> target/i386/cpu.c | 2 ++ > >>> 1 file changed, 2 insertions(+) > >>> > >>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c > >>> index 69f518a..55f0691 100644 > >>> --- a/target/i386/cpu.c > >>> +++ b/target/i386/cpu.c > >>> @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { > >>> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | > >>> CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | > >>> CPUID_EXT3_TOPOEXT, > >>> + .features[FEAT_8000_0008_EBX] = > >>> + CPUID_8000_0008_EBX_CLZERO, > >>> .features[FEAT_7_0_EBX] = > >>> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | > >>> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | > >>> > >> > >> This needs to be done only for newer machine type (or is it CPU model > >> versions now? need Eduardo to respond). > > > > If we want to add it, it has to be done as a new CPU model version. > > I see what you mean. > > > > > But I don't know yet if we want to add it. Do all EPYC CPUs have > > CLZERO available? If not, it's probably not advisable to add it > > to EPYC (even if it's just on EPYC-v3). > > Ok so I think we need to get this clarified from AMD if all > their EPYC platforms supports this CPUID or not. Is there any > contact point within AMD where we can get this information? I'm CCing Brijesh Singh and Babu Moger, who works on the EPYC CPU model recently. > > For our use case, I just verified that even without this patch, > if we pass CLZERO through libvirt CPU definition xml, like " > <feature policy='require' name='clzero’/>”, it gets passed on > to the guest. So this patch is not super critical for us. Note that this is done automatically by libvirt if using mode=host-model. -- Eduardo ^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-05 22:37 ` Eduardo Habkost @ 2020-02-06 0:00 ` Moger, Babu 2020-02-06 5:46 ` Ani Sinha 2020-02-06 15:52 ` Eduardo Habkost 0 siblings, 2 replies; 18+ messages in thread From: Moger, Babu @ 2020-02-06 0:00 UTC (permalink / raw) To: Eduardo Habkost, Ani Sinha; +Cc: Paolo Bonzini, Singh, Brijesh, qemu-devel, rth [AMD Official Use Only - Internal Distribution Only] > -----Original Message----- > From: Eduardo Habkost <ehabkost@redhat.com> > Sent: Wednesday, February 5, 2020 4:38 PM > To: Ani Sinha <ani.sinha@nutanix.com> > Cc: Paolo Bonzini <pbonzini@redhat.com>; rth@twiddle.net; qemu- > devel@nongnu.org; Singh, Brijesh <brijesh.singh@amd.com>; Moger, Babu > <Babu.Moger@amd.com> > Subject: Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on > AMD ZEN platform > > Hi, > > Sorry for the delayed reply. I was away from work for the whole > month of January. > > On Mon, Jan 20, 2020 at 10:56:43AM +0000, Ani Sinha wrote: > > Sorry Eduardo, it took a little while for me to get to this thread again. > > > > > On Dec 18, 2019, at 8:41 PM, Eduardo Habkost <ehabkost@redhat.com> > wrote: > > > > > > On Wed, Dec 18, 2019 at 12:53:45PM +0100, Paolo Bonzini wrote: > > >> On 18/12/19 10:05, Ani Sinha wrote: > > >>> CLZERO CPUID should be passed on to the guests that use EPYC or > EPYC-IBPB CPU > > >>> model when the AMD ZEN based host supports it. This change makes it > recognize > > >>> this CPUID for guests which use EPYC or EPYC-IBPB CPU model. > > > > > > Can you clarify what's the intended use case here? Why the > > > "if host supports it" conditional? > > > > Looking at > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww > w.amd.com%2Fsystem%2Ffiles%2FTechDocs%2F24594.pdf&data=02%7 > C01%7Cbabu.moger%40amd.com%7C4d00819020cb4892d50608d7aa8c016b% > 7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637165391335697450 > &sdata=3%2FFGZeeZoz387eeayAbjQJj9qGhemgw0xC0byr%2F0YJk%3D > &reserved=0 , it says : > > > > "The CLZERO instruction is supported if the feature flag CPUID > Fn8000_0008_EBX[CLZERO] is set.” > > > > This I interpreted to mean that not all AMD Zen architectures > > supports it. So when the host does support it, this CPUID > > should be passed on to the guest as well. > > This is not a supported use case of named CPU models. Named CPU > models should expose the same guest ABI on all hosts. This means > CPUID should be the same on all hosts if using the same CPU > model (and same machine type). > > If you need features to be automatically enabled/disabled > depending on host capabilities, I advise you to use "-cpu host" > or libvirt's mode=host-model. > > > > > > > > > > > If you need host-dependent CPU configuration, "-cpu host" (or the > > > libvirt "host-model" mode) is the most appropriate solution. > > > > Yes that is an option but we are going to use EPYC-IBPB model for now. > > > > > > > > > >>> > > >>> Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> > > >>> --- > > >>> target/i386/cpu.c | 2 ++ > > >>> 1 file changed, 2 insertions(+) > > >>> > > >>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c > > >>> index 69f518a..55f0691 100644 > > >>> --- a/target/i386/cpu.c > > >>> +++ b/target/i386/cpu.c > > >>> @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { > > >>> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | > CPUID_EXT3_ABM | > > >>> CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | > CPUID_EXT3_LAHF_LM | > > >>> CPUID_EXT3_TOPOEXT, > > >>> + .features[FEAT_8000_0008_EBX] = > > >>> + CPUID_8000_0008_EBX_CLZERO, > > >>> .features[FEAT_7_0_EBX] = > > >>> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | > CPUID_7_0_EBX_AVX2 | > > >>> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | > CPUID_7_0_EBX_RDSEED | > > >>> > > >> > > >> This needs to be done only for newer machine type (or is it CPU model > > >> versions now? need Eduardo to respond). > > > > > > If we want to add it, it has to be done as a new CPU model version. > > > > I see what you mean. > > > > > > > > But I don't know yet if we want to add it. Do all EPYC CPUs have > > > CLZERO available? If not, it's probably not advisable to add it > > > to EPYC (even if it's just on EPYC-v3). > > > > Ok so I think we need to get this clarified from AMD if all > > their EPYC platforms supports this CPUID or not. Is there any > > contact point within AMD where we can get this information? > > I'm CCing Brijesh Singh and Babu Moger, who works on the EPYC CPU > model recently. Ani, I am already working on it. Eduardo, I am still waiting for your feedback on this series. https://lore.kernel.org/qemu-devel/abd39b75-0a12-5198-5815-dd51a3d5c901@amd.com/ I have added all the missing feature bits for EPYC models(as EPYC-v3) and also added EPYC-Rome model. > > > > > For our use case, I just verified that even without this patch, > > if we pass CLZERO through libvirt CPU definition xml, like " > > <feature policy='require' name='clzero’/>”, it gets passed on > > to the guest. So this patch is not super critical for us. > > Note that this is done automatically by libvirt if using > mode=host-model. > > -- > Eduardo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-06 0:00 ` Moger, Babu @ 2020-02-06 5:46 ` Ani Sinha 2020-02-06 5:53 ` Ani Sinha 2020-02-06 15:52 ` Eduardo Habkost 1 sibling, 1 reply; 18+ messages in thread From: Ani Sinha @ 2020-02-06 5:46 UTC (permalink / raw) To: Moger, Babu Cc: qemu-devel, Paolo Bonzini, Singh, Brijesh, Eduardo Habkost, rth > On Feb 6, 2020, at 5:30 AM, Moger, Babu <Babu.Moger@amd.com> wrote: > > Ani, I am already working on it. Wow, I see a whole new AMD-Rome CPU model with it’s own cache info data : https://lore.kernel.org/qemu-devel/157314966312.23828.17684821666338093910.stgit@naples-babu.amd.com/ Thanks! ani ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-06 5:46 ` Ani Sinha @ 2020-02-06 5:53 ` Ani Sinha 2020-02-06 15:30 ` Babu Moger 0 siblings, 1 reply; 18+ messages in thread From: Ani Sinha @ 2020-02-06 5:53 UTC (permalink / raw) To: Moger, Babu Cc: qemu-devel, Paolo Bonzini, Singh, Brijesh, Eduardo Habkost, rth > On Feb 6, 2020, at 11:16 AM, Ani Sinha <ani.sinha@nutanix.com> wrote: > > > >> On Feb 6, 2020, at 5:30 AM, Moger, Babu <Babu.Moger@amd.com> wrote: >> >> Ani, I am already working on it. > > Wow, I see a whole new AMD-Rome CPU model with it’s own cache info data : > > https://lore.kernel.org/qemu-devel/157314966312.23828.17684821666338093910.stgit@naples-babu.amd.com/ Do you think the ROME specific guest cpu cache data will have significant impact on performance? > > Thanks! > > ani > ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-06 5:53 ` Ani Sinha @ 2020-02-06 15:30 ` Babu Moger 2020-02-06 16:03 ` Eduardo Habkost 0 siblings, 1 reply; 18+ messages in thread From: Babu Moger @ 2020-02-06 15:30 UTC (permalink / raw) To: Ani Sinha; +Cc: qemu-devel, Paolo Bonzini, Singh, Brijesh, Eduardo Habkost, rth On 2/5/20 11:53 PM, Ani Sinha wrote: > > >> On Feb 6, 2020, at 11:16 AM, Ani Sinha <ani.sinha@nutanix.com> wrote: >> >> >> >>> On Feb 6, 2020, at 5:30 AM, Moger, Babu <Babu.Moger@amd.com> wrote: >>> >>> Ani, I am already working on it. >> >> Wow, I see a whole new AMD-Rome CPU model with it’s own cache info data : >> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fqemu-devel%2F157314966312.23828.17684821666338093910.stgit%40naples-babu.amd.com%2F&data=02%7C01%7CBabu.Moger%40amd.com%7Cc566dc5cf3cc407b5ee608d7aac8d9bc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637165651955089264&sdata=tlafWD6m5%2BZ12cqd4vqJcWh0%2FIgly%2FPVMgAbjxK5Mog%3D&reserved=0 > > Do you think the ROME specific guest cpu cache data will have significant impact on performance? I have not done performance benchmarks myself. Yes. Rome is expected to perform better than its previous generations. ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-06 15:30 ` Babu Moger @ 2020-02-06 16:03 ` Eduardo Habkost 0 siblings, 0 replies; 18+ messages in thread From: Eduardo Habkost @ 2020-02-06 16:03 UTC (permalink / raw) To: Babu Moger; +Cc: Paolo Bonzini, Ani Sinha, qemu-devel, Singh, Brijesh, rth On Thu, Feb 06, 2020 at 09:30:11AM -0600, Babu Moger wrote: > > > On 2/5/20 11:53 PM, Ani Sinha wrote: > > > > > >> On Feb 6, 2020, at 11:16 AM, Ani Sinha <ani.sinha@nutanix.com> wrote: > >> > >> > >> > >>> On Feb 6, 2020, at 5:30 AM, Moger, Babu <Babu.Moger@amd.com> wrote: > >>> > >>> Ani, I am already working on it. > >> > >> Wow, I see a whole new AMD-Rome CPU model with it’s own cache info data : > >> > >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fqemu-devel%2F157314966312.23828.17684821666338093910.stgit%40naples-babu.amd.com%2F&data=02%7C01%7CBabu.Moger%40amd.com%7Cc566dc5cf3cc407b5ee608d7aac8d9bc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637165651955089264&sdata=tlafWD6m5%2BZ12cqd4vqJcWh0%2FIgly%2FPVMgAbjxK5Mog%3D&reserved=0 > > > > Do you think the ROME specific guest cpu cache data will have significant impact on performance? > > I have not done performance benchmarks myself. Yes. Rome is expected to > perform better than its previous generations. Note that virtual cache information on CPUID doesn't affect host software or hardware behavior in any way. In the exceptional cases it affects performance, it's solely because guest software behavior changed depending on the cache information it sees. -- Eduardo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-06 0:00 ` Moger, Babu 2020-02-06 5:46 ` Ani Sinha @ 2020-02-06 15:52 ` Eduardo Habkost 2020-02-06 15:55 ` Babu Moger 1 sibling, 1 reply; 18+ messages in thread From: Eduardo Habkost @ 2020-02-06 15:52 UTC (permalink / raw) To: Moger, Babu; +Cc: Paolo Bonzini, Ani Sinha, qemu-devel, Singh, Brijesh, rth On Thu, Feb 06, 2020 at 12:00:04AM +0000, Moger, Babu wrote: > [AMD Official Use Only - Internal Distribution Only] Considering that this was posted to qemu-devel, I'm assuming this notice was added by accident. > [...] > Eduardo, I am still waiting for your feedback on this series. > https://lore.kernel.org/qemu-devel/abd39b75-0a12-5198-5815-dd51a3d5c901@amd.com/ > > I have added all the missing feature bits for EPYC models(as > EPYC-v3) and also added EPYC-Rome model. I'm still catching up on email and my review queue, but this is on my list. Sorry for the long delay! -- Eduardo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2020-02-06 15:52 ` Eduardo Habkost @ 2020-02-06 15:55 ` Babu Moger 0 siblings, 0 replies; 18+ messages in thread From: Babu Moger @ 2020-02-06 15:55 UTC (permalink / raw) To: Eduardo Habkost; +Cc: Paolo Bonzini, Ani Sinha, qemu-devel, Singh, Brijesh, rth On 2/6/20 9:52 AM, Eduardo Habkost wrote: > On Thu, Feb 06, 2020 at 12:00:04AM +0000, Moger, Babu wrote: >> [AMD Official Use Only - Internal Distribution Only] > > Considering that this was posted to qemu-devel, I'm assuming this > notice was added by accident. Yes. I noticed that after sending out the email. Please ignore that line. ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-18 11:53 ` Paolo Bonzini 2019-12-18 15:11 ` Eduardo Habkost @ 2019-12-22 7:32 ` Ani Sinha 2019-12-22 8:15 ` Paolo Bonzini 1 sibling, 1 reply; 18+ messages in thread From: Ani Sinha @ 2019-12-22 7:32 UTC (permalink / raw) To: Paolo Bonzini; +Cc: qemu-devel, ehabkost, rth Ping … > On Dec 18, 2019, at 5:23 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > On 18/12/19 10:05, Ani Sinha wrote: >> CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU >> model when the AMD ZEN based host supports it. This change makes it recognize >> this CPUID for guests which use EPYC or EPYC-IBPB CPU model. >> >> Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> >> --- >> target/i386/cpu.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >> index 69f518a..55f0691 100644 >> --- a/target/i386/cpu.c >> +++ b/target/i386/cpu.c >> @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { >> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | >> CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | >> CPUID_EXT3_TOPOEXT, >> + .features[FEAT_8000_0008_EBX] = >> + CPUID_8000_0008_EBX_CLZERO, >> .features[FEAT_7_0_EBX] = >> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | >> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | >> > > This needs to be done only for newer machine type (or is it CPU model > versions now? need Eduardo to respond). > > Paolo ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-22 7:32 ` Ani Sinha @ 2019-12-22 8:15 ` Paolo Bonzini 2019-12-23 8:14 ` Ani Sinha 0 siblings, 1 reply; 18+ messages in thread From: Paolo Bonzini @ 2019-12-22 8:15 UTC (permalink / raw) To: Ani Sinha; +Cc: qemu-devel, Habkost, Eduardo, rth [-- Attachment #1: Type: text/plain, Size: 1624 bytes --] Il dom 22 dic 2019, 08:49 Ani Sinha <ani.sinha@nutanix.com> ha scritto: > > Ping … > Why ping? You got questions from Eduardo, so you need to answer them and/or send a fixed version of the patch. Thanks, Paolo > > On Dec 18, 2019, at 5:23 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > > > On 18/12/19 10:05, Ani Sinha wrote: > >> CLZERO CPUID should be passed on to the guests that use EPYC or > EPYC-IBPB CPU > >> model when the AMD ZEN based host supports it. This change makes it > recognize > >> this CPUID for guests which use EPYC or EPYC-IBPB CPU model. > >> > >> Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> > >> --- > >> target/i386/cpu.c | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/target/i386/cpu.c b/target/i386/cpu.c > >> index 69f518a..55f0691 100644 > >> --- a/target/i386/cpu.c > >> +++ b/target/i386/cpu.c > >> @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { > >> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | > >> CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | > >> CPUID_EXT3_TOPOEXT, > >> + .features[FEAT_8000_0008_EBX] = > >> + CPUID_8000_0008_EBX_CLZERO, > >> .features[FEAT_7_0_EBX] = > >> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | > CPUID_7_0_EBX_AVX2 | > >> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | > CPUID_7_0_EBX_RDSEED | > >> > > > > This needs to be done only for newer machine type (or is it CPU model > > versions now? need Eduardo to respond). > > > > Paolo > > [-- Attachment #2: Type: text/html, Size: 2661 bytes --] ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-22 8:15 ` Paolo Bonzini @ 2019-12-23 8:14 ` Ani Sinha 2019-12-23 8:50 ` Ani Sinha 0 siblings, 1 reply; 18+ messages in thread From: Ani Sinha @ 2019-12-23 8:14 UTC (permalink / raw) To: Paolo Bonzini; +Cc: qemu-devel, Habkost, Eduardo, rth > On Dec 22, 2019, at 1:45 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > > > Il dom 22 dic 2019, 08:49 Ani Sinha <ani.sinha@nutanix.com> ha scritto: > > Ping … > > Why ping? You got questions from Eduardo, so you need to answer them and/or send a fixed version of the patch. > Maybe he responded privately but I did not get any questions from Eduardo. Ani > Thanks, > > Paolo > > > > On Dec 18, 2019, at 5:23 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > > > On 18/12/19 10:05, Ani Sinha wrote: > >> CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU > >> model when the AMD ZEN based host supports it. This change makes it recognize > >> this CPUID for guests which use EPYC or EPYC-IBPB CPU model. > >> > >> Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> > >> --- > >> target/i386/cpu.c | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/target/i386/cpu.c b/target/i386/cpu.c > >> index 69f518a..55f0691 100644 > >> --- a/target/i386/cpu.c > >> +++ b/target/i386/cpu.c > >> @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { > >> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | > >> CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | > >> CPUID_EXT3_TOPOEXT, > >> + .features[FEAT_8000_0008_EBX] = > >> + CPUID_8000_0008_EBX_CLZERO, > >> .features[FEAT_7_0_EBX] = > >> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | > >> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | > >> > > > > This needs to be done only for newer machine type (or is it CPU model > > versions now? need Eduardo to respond). > > > > Paolo > ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-23 8:14 ` Ani Sinha @ 2019-12-23 8:50 ` Ani Sinha 0 siblings, 0 replies; 18+ messages in thread From: Ani Sinha @ 2019-12-23 8:50 UTC (permalink / raw) To: Paolo Bonzini; +Cc: qemu-devel, Habkost, Eduardo, rth > On Dec 23, 2019, at 1:44 PM, Ani Sinha <ani.sinha@nutanix.com> wrote: > > > >> On Dec 22, 2019, at 1:45 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: >> >> >> >> Il dom 22 dic 2019, 08:49 Ani Sinha <ani.sinha@nutanix.com> ha scritto: >> >> Ping … >> >> Why ping? You got questions from Eduardo, so you need to answer them and/or send a fixed version of the patch. >> > > > Maybe he responded privately but I did not get any questions from Eduardo. > Ok I see his response in the mailing list archives: https://lists.gnu.org/archive/html/qemu-devel/2019-12/msg03927.html I generally do not pay attention to emails sent to @qemu-dev and they arrive as a digest and get filtered out. So please do send the responses with me in the CC or To list. That way, I won’t miss them. thanks ani ^ permalink raw reply [flat|nested] 18+ messages in thread
[parent not found: <yes>]
* [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform [not found] <yes> @ 2019-12-04 9:36 ` Ani Sinha 2019-12-16 9:31 ` Ani Sinha 0 siblings, 1 reply; 18+ messages in thread From: Ani Sinha @ 2019-12-04 9:36 UTC (permalink / raw) To: qemu-devel; +Cc: Ani Sinha CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU model when the AMD ZEN based host supports it. This change makes it recognize this CPUID for guests which use EPYC or EPYC-IBPB CPU model. Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> --- target/i386/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 69f518a..55f0691 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_TOPOEXT, + .features[FEAT_8000_0008_EBX] = + CPUID_8000_0008_EBX_CLZERO, .features[FEAT_7_0_EBX] = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | -- 1.9.4 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform 2019-12-04 9:36 ` Ani Sinha @ 2019-12-16 9:31 ` Ani Sinha 0 siblings, 0 replies; 18+ messages in thread From: Ani Sinha @ 2019-12-16 9:31 UTC (permalink / raw) To: qemu-devel [-- Attachment #1: Type: text/plain, Size: 1059 bytes --] Hi : Can I get some love for this patch? thanks ani On Dec 4, 2019, 3:06 PM +0530, Ani Sinha <ani.sinha@nutanix.com>, wrote: CLZERO CPUID should be passed on to the guests that use EPYC or EPYC-IBPB CPU model when the AMD ZEN based host supports it. This change makes it recognize this CPUID for guests which use EPYC or EPYC-IBPB CPU model. Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> --- target/i386/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 69f518a..55f0691 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3813,6 +3813,8 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_TOPOEXT, + .features[FEAT_8000_0008_EBX] = + CPUID_8000_0008_EBX_CLZERO, .features[FEAT_7_0_EBX] = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | -- 1.9.4 [-- Attachment #2: Type: text/html, Size: 1858 bytes --] ^ permalink raw reply related [flat|nested] 18+ messages in thread
end of thread, other threads:[~2020-02-06 16:04 UTC | newest] Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-12-18 9:05 [PATCH] i386: pass CLZERO to guests with EPYC CPU model on AMD ZEN platform Ani Sinha 2019-12-18 11:53 ` Paolo Bonzini 2019-12-18 15:11 ` Eduardo Habkost 2020-01-20 10:56 ` Ani Sinha 2020-02-05 22:37 ` Eduardo Habkost 2020-02-06 0:00 ` Moger, Babu 2020-02-06 5:46 ` Ani Sinha 2020-02-06 5:53 ` Ani Sinha 2020-02-06 15:30 ` Babu Moger 2020-02-06 16:03 ` Eduardo Habkost 2020-02-06 15:52 ` Eduardo Habkost 2020-02-06 15:55 ` Babu Moger 2019-12-22 7:32 ` Ani Sinha 2019-12-22 8:15 ` Paolo Bonzini 2019-12-23 8:14 ` Ani Sinha 2019-12-23 8:50 ` Ani Sinha [not found] <yes> 2019-12-04 9:36 ` Ani Sinha 2019-12-16 9:31 ` Ani Sinha
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