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From: Laurent Desnogues <laurent.desnogues@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Xiangyu Hu" <libhu.so@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"Patch Tracking" <patches@linaro.org>
Subject: Re: [Qemu-devel] [PATCH] target-arm: Squash input denormals in FRECPS and FRSQRTS
Date: Fri, 30 Jan 2015 10:41:10 +0100	[thread overview]
Message-ID: <CABoDooOEGKuB1+iVHGxpWuV7gSjd2ge5LW022vPHGqVApG1gqA@mail.gmail.com> (raw)
In-Reply-To: <1422559909-19377-1-git-send-email-peter.maydell@linaro.org>

On Thu, Jan 29, 2015 at 8:31 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> The helper functions for FRECPS and FRSQRTS have special case
> handling that includes checks for zero inputs, so squash input
> denormals if necessary before those checks. This fixes incorrect
> output when the FPCR DZ bit is set to enable squashing of input
> denormals.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>

Thanks,

Laurent

> ---
> A quick eyeball of helper-a64.c suggests that these are the only
> other insns we needed to fix, and a risu test of these insns
> confirms that (a) they're buggy and (b) this patch fixes them.
> I haven't done an exhaustive coverage test of the whole instruction
> set with the DZ bit set, though...
>
>  target-arm/helper-a64.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
> index ebd9247..8aa40e9 100644
> --- a/target-arm/helper-a64.c
> +++ b/target-arm/helper-a64.c
> @@ -229,6 +229,9 @@ float32 HELPER(recpsf_f32)(float32 a, float32 b, void *fpstp)
>  {
>      float_status *fpst = fpstp;
>
> +    a = float32_squash_input_denormal(a, fpst);
> +    b = float32_squash_input_denormal(b, fpst);
> +
>      a = float32_chs(a);
>      if ((float32_is_infinity(a) && float32_is_zero(b)) ||
>          (float32_is_infinity(b) && float32_is_zero(a))) {
> @@ -241,6 +244,9 @@ float64 HELPER(recpsf_f64)(float64 a, float64 b, void *fpstp)
>  {
>      float_status *fpst = fpstp;
>
> +    a = float64_squash_input_denormal(a, fpst);
> +    b = float64_squash_input_denormal(b, fpst);
> +
>      a = float64_chs(a);
>      if ((float64_is_infinity(a) && float64_is_zero(b)) ||
>          (float64_is_infinity(b) && float64_is_zero(a))) {
> @@ -253,6 +259,9 @@ float32 HELPER(rsqrtsf_f32)(float32 a, float32 b, void *fpstp)
>  {
>      float_status *fpst = fpstp;
>
> +    a = float32_squash_input_denormal(a, fpst);
> +    b = float32_squash_input_denormal(b, fpst);
> +
>      a = float32_chs(a);
>      if ((float32_is_infinity(a) && float32_is_zero(b)) ||
>          (float32_is_infinity(b) && float32_is_zero(a))) {
> @@ -265,6 +274,9 @@ float64 HELPER(rsqrtsf_f64)(float64 a, float64 b, void *fpstp)
>  {
>      float_status *fpst = fpstp;
>
> +    a = float64_squash_input_denormal(a, fpst);
> +    b = float64_squash_input_denormal(b, fpst);
> +
>      a = float64_chs(a);
>      if ((float64_is_infinity(a) && float64_is_zero(b)) ||
>          (float64_is_infinity(b) && float64_is_zero(a))) {
> --
> 1.9.1
>
>

  reply	other threads:[~2015-01-30  9:41 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-29 19:31 [Qemu-devel] [PATCH] target-arm: Squash input denormals in FRECPS and FRSQRTS Peter Maydell
2015-01-30  9:41 ` Laurent Desnogues [this message]
2015-01-30 14:21   ` Greg Bellows

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