From: Matthias Brugger <matthias.bgg@gmail.com> To: Sascha Hauer <s.hauer@pengutronix.de> Cc: Mike Turquette <mturquette@linaro.org>, Stephen Boyd <sboyd@codeaurora.org>, YH Chen <yh.chen@mediatek.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Henry Chen <henryc.chen@mediatek.com>, linux-mediatek@lists.infradead.org, "=Sascha Hauer" <kernel@pengutronix.de>, Yingjoe Chen <Yingjoe.Chen@mediatek.com>, Eddie Huang <eddie.huang@mediatek.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH 3/6] clk: mediatek: Add reset controller support Date: Mon, 30 Mar 2015 12:12:52 +0200 [thread overview] Message-ID: <CABuKBe+4mQ+gmEgBudpwMYLo7NLX1uJXx37nW1UtzOsY2x_WnQ@mail.gmail.com> (raw) In-Reply-To: <1427447925-18030-4-git-send-email-s.hauer@pengutronix.de> 2015-03-27 10:18 GMT+01:00 Sascha Hauer <s.hauer@pengutronix.de>: > The pericfg and infracfg units also provide reset lines to several > other SoC internal units. Add support for the reset controller. This messages is a bit confusing, could you explain better what the patch does and how this interacts with pericfg and infracfg? > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > drivers/clk/mediatek/Makefile | 1 + > drivers/clk/mediatek/clk-mtk.h | 10 +++++ > drivers/clk/mediatek/reset.c | 99 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 110 insertions(+) > create mode 100644 drivers/clk/mediatek/reset.c > > diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile > index c384e97..0b6f1c3 100644 > --- a/drivers/clk/mediatek/Makefile > +++ b/drivers/clk/mediatek/Makefile > @@ -1 +1,2 @@ > obj-y += clk-mtk.o clk-pll.o clk-gate.o > +obj-$(CONFIG_RESET_CONTROLLER) += reset.o > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index 5aaba81..5a6b5dd 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -152,4 +152,14 @@ void __init mtk_clk_register_plls(struct device_node *node, > const struct mtk_pll_data *plls, int num_plls, > struct clk_onecell_data *clk_data); > > +#ifdef CONFIG_RESET_CONTROLLER > +void mtk_register_reset_controller(struct device_node *np, > + unsigned int num_regs, int regofs); > +#else > +static inline void mtk_register_reset_controller(struct device_node *np, > + unsigned int num_regs, int regofs) > +{ > +} > +#endif > + > #endif /* __DRV_CLK_MTK_H */ > diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c > new file mode 100644 > index 0000000..3a85a53 > --- /dev/null > +++ b/drivers/clk/mediatek/reset.c > @@ -0,0 +1,99 @@ > +/* > + * Copyright (c) 2014 MediaTek Inc. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt Do we need this? Seems that it isn't used at all. Cheers, Matthias
WARNING: multiple messages have this Message-ID (diff)
From: matthias.bgg@gmail.com (Matthias Brugger) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/6] clk: mediatek: Add reset controller support Date: Mon, 30 Mar 2015 12:12:52 +0200 [thread overview] Message-ID: <CABuKBe+4mQ+gmEgBudpwMYLo7NLX1uJXx37nW1UtzOsY2x_WnQ@mail.gmail.com> (raw) In-Reply-To: <1427447925-18030-4-git-send-email-s.hauer@pengutronix.de> 2015-03-27 10:18 GMT+01:00 Sascha Hauer <s.hauer@pengutronix.de>: > The pericfg and infracfg units also provide reset lines to several > other SoC internal units. Add support for the reset controller. This messages is a bit confusing, could you explain better what the patch does and how this interacts with pericfg and infracfg? > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > drivers/clk/mediatek/Makefile | 1 + > drivers/clk/mediatek/clk-mtk.h | 10 +++++ > drivers/clk/mediatek/reset.c | 99 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 110 insertions(+) > create mode 100644 drivers/clk/mediatek/reset.c > > diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile > index c384e97..0b6f1c3 100644 > --- a/drivers/clk/mediatek/Makefile > +++ b/drivers/clk/mediatek/Makefile > @@ -1 +1,2 @@ > obj-y += clk-mtk.o clk-pll.o clk-gate.o > +obj-$(CONFIG_RESET_CONTROLLER) += reset.o > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index 5aaba81..5a6b5dd 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -152,4 +152,14 @@ void __init mtk_clk_register_plls(struct device_node *node, > const struct mtk_pll_data *plls, int num_plls, > struct clk_onecell_data *clk_data); > > +#ifdef CONFIG_RESET_CONTROLLER > +void mtk_register_reset_controller(struct device_node *np, > + unsigned int num_regs, int regofs); > +#else > +static inline void mtk_register_reset_controller(struct device_node *np, > + unsigned int num_regs, int regofs) > +{ > +} > +#endif > + > #endif /* __DRV_CLK_MTK_H */ > diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c > new file mode 100644 > index 0000000..3a85a53 > --- /dev/null > +++ b/drivers/clk/mediatek/reset.c > @@ -0,0 +1,99 @@ > +/* > + * Copyright (c) 2014 MediaTek Inc. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt Do we need this? Seems that it isn't used at all. Cheers, Matthias
next prev parent reply other threads:[~2015-03-30 10:12 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-03-27 9:18 [PATCH v9]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` [PATCH 1/6] clk: make strings in parent name arrays const Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` [PATCH 2/6] clk: mediatek: Add initial common clock support for Mediatek SoCs Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` [PATCH 3/6] clk: mediatek: Add reset controller support Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-30 10:12 ` Matthias Brugger [this message] 2015-03-30 10:12 ` Matthias Brugger 2015-03-30 10:12 ` Matthias Brugger 2015-03-27 9:18 ` [PATCH 4/6] clk: mediatek: Add basic clocks for Mediatek MT8135 Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` [PATCH 5/6] clk: mediatek: Add basic clocks for Mediatek MT8173 Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-27 9:18 ` [PATCH 6/6] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers Sascha Hauer 2015-03-27 9:18 ` Sascha Hauer 2015-03-30 10:13 ` Matthias Brugger 2015-03-30 10:13 ` Matthias Brugger 2015-03-30 10:13 ` Matthias Brugger 2015-03-27 9:20 ` [PATCH v9]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-03-27 9:20 ` Sascha Hauer -- strict thread matches above, loose matches on Subject: below -- 2015-04-23 8:35 [PATCH v12] " Sascha Hauer 2015-04-23 8:35 ` [PATCH 3/6] clk: mediatek: Add reset controller support Sascha Hauer 2015-04-23 8:35 ` Sascha Hauer 2015-03-31 18:16 [PATCH v11]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-03-31 18:16 ` [PATCH 3/6] clk: mediatek: Add reset controller support Sascha Hauer 2015-03-31 18:16 ` Sascha Hauer 2015-03-30 17:40 [PATCH v10]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-03-30 17:40 ` [PATCH 3/6] clk: mediatek: Add reset controller support Sascha Hauer 2015-03-30 17:40 ` Sascha Hauer 2015-03-31 8:00 ` Philipp Zabel 2015-03-31 8:00 ` Philipp Zabel 2015-03-19 8:42 [PATCH v8]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-03-19 8:42 ` [PATCH 3/6] clk: mediatek: Add reset controller support Sascha Hauer 2015-03-19 8:42 ` Sascha Hauer 2015-03-27 13:32 ` Matthias Brugger 2015-03-27 13:32 ` Matthias Brugger
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