From: Eugeni Dodonov <eugeni@dodonov.net>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView
Date: Fri, 23 Mar 2012 14:29:04 -0300 [thread overview]
Message-ID: <CAC7LmnuCWWDbKzD1OxBeSoOEa4Kvu1RFH56F7LWTiExm_uyVVw@mail.gmail.com> (raw)
In-Reply-To: <1332452348-8814-9-git-send-email-jbarnes@virtuousgeek.org>
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On Thu, Mar 22, 2012 at 18:38, Jesse Barnes <jbarnes@virtuousgeek.org>wrote:
> ValleyView and similar hardware (like CedarView) put some display
> related registers like the PLL controls and dividers on a DPIO bus. Add
> simple indirect register access routines to get to those registers.
>
> v2: move new wait_for macro to intel_drv.h (Ben)
> fix DPIO_PKT double write (Ben)
> add debugfs file
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>
(Also answering danvet's question on one of my patches).
Those dpio read/write routines are very similar to the SBI ones for LPT,
but some subtle registers changes make them different enough not to be
directly reused AFAIK. So I think we'll have to stick with a set of DPIO
and SBI ops for now.
So other that the other Ben's and Chris' comments about this:
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
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next prev parent reply other threads:[~2012-03-23 17:29 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-22 21:38 [RFCv2] ValleyView support Jesse Barnes
2012-03-22 21:38 ` [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c Jesse Barnes
2012-03-22 22:20 ` Ben Widawsky
2012-03-23 22:46 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 02/26] drm/i915: re-order GT IIR bit definitions Jesse Barnes
2012-03-22 22:25 ` Ben Widawsky
2012-03-23 22:46 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 03/26] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro Jesse Barnes
2012-03-22 22:31 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 04/26] drm/i915: ValleyView watermark support Jesse Barnes
2012-03-23 3:29 ` Ben Widawsky
2012-03-23 9:51 ` Daniel Vetter
2012-03-24 2:46 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 05/26] drm/i915: PLL defines for VLV Jesse Barnes
2012-03-23 3:35 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 06/26] drm/i915: interrupt bit definitions " Jesse Barnes
2012-03-22 21:38 ` [PATCH 07/26] drm/i915: add ValleyView clock gating init Jesse Barnes
2012-03-22 23:25 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView Jesse Barnes
2012-03-23 4:03 ` Ben Widawsky
2012-03-23 17:29 ` Eugeni Dodonov [this message]
2012-03-22 21:38 ` [PATCH 09/26] drm/i915: split PLL update code out of i9xx_crtc_mode_set Jesse Barnes
2012-03-23 4:16 ` Ben Widawsky
2012-03-23 23:00 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 10/26] drm/i915: split LVDS " Jesse Barnes
2012-03-23 23:04 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 11/26] drm/i915: ValleyView mode setting limits and PLL functions Jesse Barnes
2012-03-22 21:38 ` [PATCH 12/26] drm/i915: program drain latency regs on ValleyView Jesse Barnes
2012-03-26 1:50 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 13/26] drm/i915: Enable DP panel power sequencing for ValleyView Jesse Barnes
2012-03-22 21:38 ` [PATCH 14/26] drm/i915: Enable HDMI on ValleyView Jesse Barnes
2012-03-22 21:38 ` [PATCH 15/26] agp/intel: map more registers for use by the GTT code Jesse Barnes
2012-03-26 2:05 ` Ben Widawsky
2012-03-26 7:06 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 16/26] agp/intel: add ValleyView AGP driver Jesse Barnes
2012-03-26 2:16 ` Ben Widawsky
2012-03-26 7:08 ` Daniel Vetter
2012-03-26 18:17 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 17/26] agp/intel: bind " Jesse Barnes
2012-03-22 21:39 ` [PATCH 18/26] drm/i915: add ValleyView specific CRT detect function Jesse Barnes
2012-03-23 17:11 ` Eugeni Dodonov
2012-03-22 21:39 ` [PATCH 19/26] drm/i915: add ValleyView specific force wake get/put functions Jesse Barnes
2012-03-23 17:20 ` Eugeni Dodonov
2012-03-26 18:20 ` Ben Widawsky
2012-03-22 21:39 ` [PATCH 20/26] drm/i915: ValleyView has limited cacheability Jesse Barnes
2012-03-22 23:31 ` Jesse Barnes
2012-03-26 18:34 ` Ben Widawsky
2012-03-26 18:49 ` Daniel Vetter
2012-03-28 17:43 ` Jesse Barnes
2012-03-22 21:39 ` [PATCH 21/26] drm/i915: ValleyView IRQ support Jesse Barnes
2012-03-22 21:39 ` [PATCH 22/26] drm/i915: display regs are at 0x180000 on ValleyView Jesse Barnes
2012-03-22 21:39 ` [PATCH 23/26] drm/i915: check for disabled interrupts " Jesse Barnes
2012-03-22 21:39 ` [PATCH 24/26] drm/i915: add HDMI and DP port enumeration " Jesse Barnes
2012-03-22 21:39 ` [PATCH 25/26] drm/i915: disable turbo on ValleyView for now Jesse Barnes
2012-03-23 17:04 ` Eugeni Dodonov
2012-03-22 21:39 ` [PATCH 26/26] drm/i915: bind driver to ValleyView chipsets Jesse Barnes
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