* Linux dev-4.19
@ 2018-11-29 0:49 Joel Stanley
2018-12-03 6:15 ` Joel Stanley
0 siblings, 1 reply; 14+ messages in thread
From: Joel Stanley @ 2018-11-29 0:49 UTC (permalink / raw)
To: OpenBMC Maillist
I've had some off list questions about moving the openbmc tree to
4.19. Apologies for the delay responding, I was busy with another
project in recent weeks.
I will put together a 4.19 based tree next week. Once it's booting on
the hardware I have access to (ast2400 and ast2500 openpower
machines), I will push it to github and notify the list. Further
testing would be welcome.
If there are patches you would like to add to 4.19 please send them to
the list with the 'dev-4.19' subject. This is probably best done once
I've published the tree, so you can ensure they apply and are tested.
Note that 4.18 is now end of life, and today's update (4.18.20) will
be the last for security and stability updates:
https://lore.kernel.org/lkml/20181121103111.GA9112@kroah.com/
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-11-29 0:49 Linux dev-4.19 Joel Stanley
@ 2018-12-03 6:15 ` Joel Stanley
2018-12-03 19:11 ` Vijay Khemka
2019-01-16 22:20 ` Adriana Kobylak
0 siblings, 2 replies; 14+ messages in thread
From: Joel Stanley @ 2018-12-03 6:15 UTC (permalink / raw)
To: OpenBMC Maillist
On Thu, 29 Nov 2018 at 11:19, Joel Stanley <joel@jms.id.au> wrote:
>
> I've had some off list questions about moving the openbmc tree to
> 4.19. Apologies for the delay responding, I was busy with another
> project in recent weeks.
>
> I will put together a 4.19 based tree next week. Once it's booting on
> the hardware I have access to (ast2400 and ast2500 openpower
> machines), I will push it to github and notify the list. Further
> testing would be welcome.
This has been done. There is now a dev-4.19 branch:
https://github.com/openbmc/linux/commits/dev-4.19
The tree this time around was a simple rebase of the 4.18 tree on top
of 4.19. I didn't drop any patches (aside from those that went
upstream).
I've published a gerrit commit that bumps openbmc to use this version.
This has had some testing by our CI on Witherspoon and Romulus, and I
did some manual testing on Romulus and Palmetto (hardware and Qemu). I
intend to merge it tomorrow:
https://gerrit.openbmc-project.xyz/c/openbmc/meta-aspeed/+/16363
> If there are patches you would like to add to 4.19 please send them to
> the list with the 'dev-4.19' subject. This is probably best done once
> I've published the tree, so you can ensure they apply and are tested.
Please test on your platforms, submit the patch sets you would like to
see included.
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-03 6:15 ` Joel Stanley
@ 2018-12-03 19:11 ` Vijay Khemka
2018-12-03 20:55 ` Amithash Prasad
2019-01-16 22:20 ` Adriana Kobylak
1 sibling, 1 reply; 14+ messages in thread
From: Vijay Khemka @ 2018-12-03 19:11 UTC (permalink / raw)
To: Joel Stanley, OpenBMC Maillist
Hi Joel,
I have couple of NCSI patch which were up streamed last week in linux-next kernel. Will those be part of this 4.19 kernel in openbmc or what is procedure to pull those patches in openbmc build. As these are required for Meta-facebook build with networking working.
Regards
-Vijay
On 12/2/18, 10:17 PM, "openbmc on behalf of Joel Stanley" <openbmc-bounces+vijaykhemka=fb.com@lists.ozlabs.org on behalf of joel@jms.id.au> wrote:
On Thu, 29 Nov 2018 at 11:19, Joel Stanley <joel@jms.id.au> wrote:
>
> I've had some off list questions about moving the openbmc tree to
> 4.19. Apologies for the delay responding, I was busy with another
> project in recent weeks.
>
> I will put together a 4.19 based tree next week. Once it's booting on
> the hardware I have access to (ast2400 and ast2500 openpower
> machines), I will push it to github and notify the list. Further
> testing would be welcome.
This has been done. There is now a dev-4.19 branch:
https://github.com/openbmc/linux/commits/dev-4.19
The tree this time around was a simple rebase of the 4.18 tree on top
of 4.19. I didn't drop any patches (aside from those that went
upstream).
I've published a gerrit commit that bumps openbmc to use this version.
This has had some testing by our CI on Witherspoon and Romulus, and I
did some manual testing on Romulus and Palmetto (hardware and Qemu). I
intend to merge it tomorrow:
https://urldefense.proofpoint.com/v2/url?u=https-3A__gerrit.openbmc-2Dproject.xyz_c_openbmc_meta-2Daspeed_-2B_16363&d=DwIBaQ&c=5VD0RTtNlTh3ycd41b3MUw&r=v9MU0Ki9pWnTXCWwjHPVgpnCR80vXkkcrIaqU7USl5g&m=QiSefPtR61qLJlx64dCiQBVXzDEJfLrdwVONz2r-zQ4&s=madl4LJTZUxjq4IY1ofUn1uWktVbTjV8GJ0CCGMFj6M&e=
> If there are patches you would like to add to 4.19 please send them to
> the list with the 'dev-4.19' subject. This is probably best done once
> I've published the tree, so you can ensure they apply and are tested.
Please test on your platforms, submit the patch sets you would like to
see included.
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-03 19:11 ` Vijay Khemka
@ 2018-12-03 20:55 ` Amithash Prasad
2018-12-03 22:04 ` Joel Stanley
0 siblings, 1 reply; 14+ messages in thread
From: Amithash Prasad @ 2018-12-03 20:55 UTC (permalink / raw)
To: Vijay Khemka, Joel Stanley, OpenBMC Maillist
[-- Attachment #1: Type: text/plain, Size: 842 bytes --]
>> I have couple of NCSI patch which were up streamed last week in linux-next kernel. Will those be part of this 4.19 kernel in openbmc or what is procedure to pull those patches in openbmc build. As these are required for Meta-facebook build with networking working.
Joel,
Thanks for cherry-picking a few of the NCSI changes into dev-4.19! Along with these, can we get a couple more cherry-picked into dev-4.19?
One patch from linux-next:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/net/ncsi?h=next-20181203&id=16e8c4ca21a238cdf0355475bf15bd72e92feb8f
One merged patch to bring in the Tiogapass device tree:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts?id=3368e06e2a91a65cff59e520acc51b9adf4900bf
Thanks,
Amithash
[-- Attachment #2: Type: text/html, Size: 3500 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-03 20:55 ` Amithash Prasad
@ 2018-12-03 22:04 ` Joel Stanley
2018-12-04 3:13 ` David Thompson
0 siblings, 1 reply; 14+ messages in thread
From: Joel Stanley @ 2018-12-03 22:04 UTC (permalink / raw)
To: Amithash Prasad; +Cc: vijaykhemka, OpenBMC Maillist
On Tue, 4 Dec 2018 at 07:25, Amithash Prasad <amithash@fb.com> wrote:
>
> >> I have couple of NCSI patch which were up streamed last week in linux-next kernel. Will those be part of this 4.19 kernel in openbmc or what is procedure to pull those patches in openbmc build. As these are required for Meta-facebook build with networking working.
> Joel,
>
> Thanks for cherry-picking a few of the NCSI changes into dev-4.19! Along with these, can we get a couple more cherry-picked into dev-4.19?
>
> One patch from linux-next:
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/net/ncsi?h=next-20181203&id=16e8c4ca21a238cdf0355475bf15bd72e92feb8f
>
> One merged patch to bring in the Tiogapass device tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts?id=3368e06e2a91a65cff59e520acc51b9adf4900bf
Nice work. This is a great way to request the patches get merged. I'm
happy because they're already on their way upstream, and the URLs with
SHAs make it easy for me to cherry pick.
Merged!
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: Linux dev-4.19
2018-12-03 22:04 ` Joel Stanley
@ 2018-12-04 3:13 ` David Thompson
2018-12-04 3:19 ` Joel Stanley
0 siblings, 1 reply; 14+ messages in thread
From: David Thompson @ 2018-12-04 3:13 UTC (permalink / raw)
To: Joel Stanley, Amithash Prasad; +Cc: OpenBMC Maillist, vijaykhemka
Since 4.19 kernel is deemed "longterm" with a projected EOL of Dec 2020, is the plan to keep OpenBMC on this kernel version for a while?
I've yet to upstream any of my changes, my bad, and as a
result I've gone through four kernel upgrades this year
{4.13, 4.17, 4.18, and now 4.19}.
I'm curious about the OpenBMC kernel upgrade strategy,
esp. after 4.19.
Regards,
- Dave
-----Original Message-----
From: openbmc <openbmc-bounces+dthompson=mellanox.com@lists.ozlabs.org> On Behalf Of Joel Stanley
Sent: Monday, December 3, 2018 5:05 PM
To: Amithash Prasad <amithash@fb.com>
Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>; vijaykhemka@fb.com
Subject: Re: Linux dev-4.19
On Tue, 4 Dec 2018 at 07:25, Amithash Prasad <amithash@fb.com> wrote:
>
> >> I have couple of NCSI patch which were up streamed last week in linux-next kernel. Will those be part of this 4.19 kernel in openbmc or what is procedure to pull those patches in openbmc build. As these are required for Meta-facebook build with networking working.
> Joel,
>
> Thanks for cherry-picking a few of the NCSI changes into dev-4.19! Along with these, can we get a couple more cherry-picked into dev-4.19?
>
> One patch from linux-next:
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/co
> mmit/net/ncsi?h=next-20181203&id=16e8c4ca21a238cdf0355475bf15bd72e92fe
> b8f
>
> One merged patch to bring in the Tiogapass device tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commi
> t/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts?id=3368e06e2a91a
> 65cff59e520acc51b9adf4900bf
Nice work. This is a great way to request the patches get merged. I'm happy because they're already on their way upstream, and the URLs with SHAs make it easy for me to cherry pick.
Merged!
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-04 3:13 ` David Thompson
@ 2018-12-04 3:19 ` Joel Stanley
2018-12-12 12:05 ` Tomer Maimon
0 siblings, 1 reply; 14+ messages in thread
From: Joel Stanley @ 2018-12-04 3:19 UTC (permalink / raw)
To: David Thompson; +Cc: Amithash Prasad, OpenBMC Maillist, vijaykhemka
Hello Dave,
On Tue, 4 Dec 2018 at 13:43, David Thompson <dthompson@mellanox.com> wrote:
>
> Since 4.19 kernel is deemed "longterm" with a projected EOL of Dec 2020, is the plan to keep OpenBMC on this kernel version for a while?
I have no plans to stay on a given release once the next is out at
this stage. My goal is to get all of the code upstream, so that I
don't need to maintain any out of tree patches, and then system
integrator can pick whichever kernel they want for their system.
It would be straight forward to maintain a stable tree once the "dev"
tree has moved on past 4.19. I have some ideas on how this could work
if you are interested.
> I've yet to upstream any of my changes, my bad, and as a
> result I've gone through four kernel upgrades this year
> {4.13, 4.17, 4.18, and now 4.19}.
I encourage you to get your patches on the list! Do you have a run
down of what you keep out of tree?
Cheers,
Joel
> I'm curious about the OpenBMC kernel upgrade strategy,
> esp. after 4.19.
>
> Regards,
> - Dave
>
> -----Original Message-----
> From: openbmc <openbmc-bounces+dthompson=mellanox.com@lists.ozlabs.org> On Behalf Of Joel Stanley
> Sent: Monday, December 3, 2018 5:05 PM
> To: Amithash Prasad <amithash@fb.com>
> Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>; vijaykhemka@fb.com
> Subject: Re: Linux dev-4.19
>
> On Tue, 4 Dec 2018 at 07:25, Amithash Prasad <amithash@fb.com> wrote:
> >
> > >> I have couple of NCSI patch which were up streamed last week in linux-next kernel. Will those be part of this 4.19 kernel in openbmc or what is procedure to pull those patches in openbmc build. As these are required for Meta-facebook build with networking working.
> > Joel,
> >
> > Thanks for cherry-picking a few of the NCSI changes into dev-4.19! Along with these, can we get a couple more cherry-picked into dev-4.19?
> >
> > One patch from linux-next:
> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/co
> > mmit/net/ncsi?h=next-20181203&id=16e8c4ca21a238cdf0355475bf15bd72e92fe
> > b8f
> >
> > One merged patch to bring in the Tiogapass device tree:
> > https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commi
> > t/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts?id=3368e06e2a91a
> > 65cff59e520acc51b9adf4900bf
>
> Nice work. This is a great way to request the patches get merged. I'm happy because they're already on their way upstream, and the URLs with SHAs make it easy for me to cherry pick.
>
> Merged!
>
> Cheers,
>
> Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-04 3:19 ` Joel Stanley
@ 2018-12-12 12:05 ` Tomer Maimon
2018-12-12 23:22 ` Joel Stanley
0 siblings, 1 reply; 14+ messages in thread
From: Tomer Maimon @ 2018-12-12 12:05 UTC (permalink / raw)
To: Joel Stanley; +Cc: dthompson, OpenBMC Maillist, amithash, vijaykhemka
[-- Attachment #1.1: Type: text/plain, Size: 8066 bytes --]
Hi Joel,
First, I like to apologize that there is many patches of NPCM to add, so it
look quite messy...
After adding the below our customers could use (in most cases) OpenBMC
linux tree and not Nuvoton Linux tree.
We have the following patches to add:
· Patches already have accepted.
· Patches on upstream process.
· PCI Mailbox patches - The PCI mail box will not upstream, because
it not build with the mailbox driver interface,
but still OpenBMC have an application to use the miscellaneous mailbox but
still OpenBMC have an application
to use the miscellaneous mailbox.
· ETHERNET MAC CONTROLLER (EMC) patches – the patches is on final
stage of upstream work, but it is very important to us that the patches will
add now because costumer requests that are using the OpenBMC linux.
· Device tree and defconfig patches – in our github it is a bunch
of patches, so I prefer to send you one patch to each topic.
I will start to send device tree update to Rob soon.
*Commit upstream to kernel 4.20*
*hwmon: (npcm-750-pwm-fan) Change initial pwm target to 255 *
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f21c8e753b1dcb8f9e5b096db1f7f4e6fdfa7258
*Commits will upstream to kernel 4.21*
*dt-binding: spi: add NPCM PSPI controller documentation *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=4ad26864df53b265976c4a3ae61b1e6cad92fe40
*spi: npcm: add NPCM PSPI controller driver *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=2a22f1b30cee8d1e104a6c5062a609bedbfd5c39
*spi: npcm: fix u32 csgpio being checked for less than zero *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=757ec116c9bce4278fa4423039736c832cc63b6f
*spi: npcm: fix platform_no_drv_owner.cocci warnings *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=7986e2273c1ed987ff34f1c318d5a2b18e8c0fee
*spi: npcm: Fix an error code in the probe function *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=428f977a6a6b43154928571b01fa8415c11a9244
*spi: npcm: Fix uninitialized variable warning *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1d2319efb6a970d5f5740a60828244e6c309df2b
*spi: npcm: Modify pspi send function *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1fa33be36cfc8908be951ed56113906f422add50
*spi: Update NPCM PSPI controller documentation *
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=6ab4a3502923c20c5a6921868e787e5fd033409b
*pinctrl: nuvoton: modify NPCM7xx pin configuration function *
https://git.linaro.org/people/linus.walleij/linux-pinctrl.git/commit/?h=for-next&id=67b249aaa650a461c86484e6c365f33887f0968a
*watchdog: npcm: Modify npcm watchdog kconfig arch parameter *
https://kernel.googlesource.com/pub/scm/linux/kernel/git/groeck/linux-staging/+/4181f4a55838db15deaed315b11bfab395be0a17
*Commits on **upstream* *process*
*dt-binding: mtd: add NPCM FIU controller*
*https://github.com/Nuvoton-Israel/linux/commit/f13c82dca3ca21175eb71223156d5c525c18dd74
<https://github.com/Nuvoton-Israel/linux/commit/f13c82dca3ca21175eb71223156d5c525c18dd74>*
*mtd: spi-nor: add NPCM FIU controller driver*
https://github.com/Nuvoton-Israel/linux/commit/747809a0082dbeaaa6b786842c5c5eaffa519561
*dt-bindings: i2c: npcm7xx: add binding for i2c controller*
https://github.com/Nuvoton-Israel/linux/commit/07be53b47443fcab645f0e67c03e3912387ff9a7
*i2c: npcm: driver for Poleg i2c controller*
https://github.com/Nuvoton-Israel/linux/commit/3a7f3375024461d3db17a78cb7d83dafcc2dbc6c
*dt-binding: bmc: Add NPCM7xx LPC BPC documentation*
https://github.com/Nuvoton-Israel/linux/commit/e8b6cc1c31e744b3fd5630d790af65ac38b2c24d#diff-e7386aa740d12baf8cdc2a0ab8e5347c
*misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver*
https://github.com/Nuvoton-Israel/linux/commit/adee227ac24431cd033f1c44b63d5a244a0bdd3b#diff-7081e24727d8058bcc6ebf20230f5403
*misc: bpc: modify remove function in npcm7xx bpc driver*
https://github.com/Nuvoton-Israel/linux/commit/1c5268f9b17f9333ee2fb245f84729beebb66a9c#diff-7081e24727d8058bcc6ebf20230f5403
*PCI mail box commits*
*dt-binding: bmc: add npcm7xx pci mailbox document*
https://github.com/Nuvoton-Israel/linux/commit/7da4f41849aef11b1a9a6e05773545f181246496
*misc: mbox: add npcm7xx pci mailbox driver*
https://github.com/Nuvoton-Israel/linux/commit/c3d5d2bab5ad216e6c0debabf50ad8365f2301d1
*EMC net commits*
*net: npcm: add NPCM7xx Ethernet MAC controller*
https://github.com/Nuvoton-Israel/linux/commit/6a9407ed142ff2c205d732d4d3477a8e9f7d950b
*dt-binding: net: document NPCM7xx EMC DT bindings*
https://github.com/Nuvoton-Israel/linux/commit/66478b88409dba415a7bb008ce833afa3957fb2d
Waiting to your approval, Thanks a lot.
cheers,
Tomer
On Tue, 4 Dec 2018 at 05:20, Joel Stanley <joel@jms.id.au> wrote:
> Hello Dave,
>
> On Tue, 4 Dec 2018 at 13:43, David Thompson <dthompson@mellanox.com>
> wrote:
> >
> > Since 4.19 kernel is deemed "longterm" with a projected EOL of Dec 2020,
> is the plan to keep OpenBMC on this kernel version for a while?
>
> I have no plans to stay on a given release once the next is out at
> this stage. My goal is to get all of the code upstream, so that I
> don't need to maintain any out of tree patches, and then system
> integrator can pick whichever kernel they want for their system.
>
> It would be straight forward to maintain a stable tree once the "dev"
> tree has moved on past 4.19. I have some ideas on how this could work
> if you are interested.
>
> > I've yet to upstream any of my changes, my bad, and as a
> > result I've gone through four kernel upgrades this year
> > {4.13, 4.17, 4.18, and now 4.19}.
>
> I encourage you to get your patches on the list! Do you have a run
> down of what you keep out of tree?
>
> Cheers,
>
> Joel
>
> > I'm curious about the OpenBMC kernel upgrade strategy,
> > esp. after 4.19.
> >
> > Regards,
> > - Dave
> >
> > -----Original Message-----
> > From: openbmc <openbmc-bounces+dthompson=mellanox.com@lists.ozlabs.org>
> On Behalf Of Joel Stanley
> > Sent: Monday, December 3, 2018 5:05 PM
> > To: Amithash Prasad <amithash@fb.com>
> > Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>; vijaykhemka@fb.com
> > Subject: Re: Linux dev-4.19
> >
> > On Tue, 4 Dec 2018 at 07:25, Amithash Prasad <amithash@fb.com> wrote:
> > >
> > > >> I have couple of NCSI patch which were up streamed last week in
> linux-next kernel. Will those be part of this 4.19 kernel in openbmc or
> what is procedure to pull those patches in openbmc build. As these are
> required for Meta-facebook build with networking working.
> > > Joel,
> > >
> > > Thanks for cherry-picking a few of the NCSI changes into dev-4.19!
> Along with these, can we get a couple more cherry-picked into dev-4.19?
> > >
> > > One patch from linux-next:
> > > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/co
> > > mmit/net/ncsi?h=next-20181203&id=16e8c4ca21a238cdf0355475bf15bd72e92fe
> > > b8f
> > >
> > > One merged patch to bring in the Tiogapass device tree:
> > > https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commi
> > > t/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts?id=3368e06e2a91a
> > > 65cff59e520acc51b9adf4900bf
> >
> > Nice work. This is a great way to request the patches get merged. I'm
> happy because they're already on their way upstream, and the URLs with SHAs
> make it easy for me to cherry pick.
> >
> > Merged!
> >
> > Cheers,
> >
> > Joel
>
[-- Attachment #1.2: Type: text/html, Size: 50439 bytes --]
[-- Attachment #2: 0002-arm-npcm-add-configuration-for-EVB-based-NPCM7xx-BMC.patch --]
[-- Type: application/octet-stream, Size: 3526 bytes --]
From 58a0713bb709cbabe9b7c5d04e13bc0957245954 Mon Sep 17 00:00:00 2001
From: Tomer Maimon <tmaimon77@gmail.com>
Date: Sun, 9 Dec 2018 10:46:36 +0200
Subject: [PATCH 2/2] arm: npcm: add configuration for EVB based NPCM7xx BMC
add configuration definition for evaluation board based
NPCM7xx (Poleg) BMC.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
arch/arm/configs/PolegSVB_defconfig | 121 ++++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
create mode 100644 arch/arm/configs/PolegSVB_defconfig
diff --git a/arch/arm/configs/PolegSVB_defconfig b/arch/arm/configs/PolegSVB_defconfig
new file mode 100644
index 000000000000..4c866583b358
--- /dev/null
+++ b/arch/arm/configs/PolegSVB_defconfig
@@ -0,0 +1,121 @@
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_LOG_BUF_SHIFT=21
+CONFIG_CGROUPS=y
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KERNEL_XZ=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_DEFAULT_DEADLINE=y
+CONFIG_ARCH_NPCM=y
+CONFIG_ARCH_NPCM7XX=y
+CONFIG_SMP=y
+CONFIG_VMSPLIT_3G_OPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_BINFMT_MISC=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_M25P80=y
+CONFIG_SPI_NPCM_FIU=y
+CONFIG_SPI=y
+CONFIG_SPI_NPCM_PSPI=y
+CONFIG_OF_OVERLAY=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_NPCM7XX_EMC_ETH=y
+CONFIG_STMMAC_ETH=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_NPCM750_OTP=y
+CONFIG_NPCM750_OTP_WRITE_ENABLE=y
+CONFIG_NPCM7XX_KCS_IPMI_BMC=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_NPCM7XX=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_SENSORS_LM75=y
+CONFIG_SENSORS_TMP102=y
+CONFIG_SENSORS_NPCM7XX=y
+CONFIG_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_NPCMX50_USB2=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_EDM_KBD_MOUSE=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_NPCM750=y
+CONFIG_IIO=y
+CONFIG_NPCM7XX_ADC=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_ROMFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_CIFS=y
+CONFIG_CIFS_XATTR=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_REDUCED=y
+CONFIG_READABLE_ASM=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_DEV_NPCMX50=y
+CONFIG_ARM_CRYPTO=y
+CONFIG_NPCM7XX_LPC_BPC=y
+CONFIG_NPCM7XX_PCI_MBOX=y
--
2.14.1
[-- Attachment #3: 0001-dts-npcm7xx-Modify-NPCM7xx-device-tree.patch --]
[-- Type: application/octet-stream, Size: 87682 bytes --]
From 1465879df52c761e0d7a641fe275d67ea64bc2ce Mon Sep 17 00:00:00 2001
From: Tomer Maimon <tmaimon77@gmail.com>
Date: Sun, 9 Dec 2018 10:09:43 +0200
Subject: [PATCH 1/2] dts: npcm7xx: Modify NPCM7xx device tree
Modify NPCM7xx device tree to support all NPCM7xx
modules drivers.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1051 ++++++++++++-
arch/arm/boot/dts/nuvoton-npcm750-evb.dts | 512 ++++++-
arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi | 2031 +++++++++++++++++++++++++
arch/arm/boot/dts/nuvoton-npcm750.dtsi | 140 +-
4 files changed, 3701 insertions(+), 33 deletions(-)
create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index d2d0761295a4..afe0d3cb516d 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -2,7 +2,9 @@
// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
// Copyright 2018 Google, Inc.
+#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
/ {
#address-cells = <1>;
@@ -10,7 +12,7 @@
interrupt-parent = <&gic>;
/* external reference clock */
- clk_refclk: clk_refclk {
+ clk_refclk: clk-refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
@@ -18,7 +20,7 @@
};
/* external reference clock for cpu. float in normal operation */
- clk_sysbypck: clk_sysbypck {
+ clk_sysbypck: clk-sysbypck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <800000000>;
@@ -26,7 +28,7 @@
};
/* external reference clock for MC. float in normal operation */
- clk_mcbypck: clk_mcbypck {
+ clk_mcbypck: clk-mcbypck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <800000000>;
@@ -34,7 +36,7 @@
};
/* external clock signal rg1refck, supplied by the phy */
- clk_rg1refck: clk_rg1refck {
+ clk_rg1refck: clk-rg1refck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
@@ -42,14 +44,14 @@
};
/* external clock signal rg2refck, supplied by the phy */
- clk_rg2refck: clk_rg2refck {
+ clk_rg2refck: clk-rg2refck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
clock-output-names = "clk_rg2refck";
};
- clk_xin: clk_xin {
+ clk_xin: clk-xin {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
@@ -69,6 +71,12 @@
reg = <0x800000 0x1000>;
};
+ rst: rst@f0801000 {
+ compatible = "nuvoton,npcm750-rst", "syscon",
+ "simple-mfd";
+ reg = <0x801000 0x1000>;
+ };
+
scu: scu@3fe000 {
compatible = "arm,cortex-a9-scu";
reg = <0x3fe000 0x1000>;
@@ -80,7 +88,7 @@
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
cache-unified;
cache-level = <2>;
- clocks = <&clk 10>;
+ clocks = <&clk NPCM7XX_CLK_AXI>;
arm,shared-override;
};
@@ -109,6 +117,182 @@
clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>;
};
+ gmac0: eth@f0802000 {
+ device_type = "network";
+ compatible = "snps,dwmac";
+ reg = <0xf0802000 0x2000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ ethernet = <0>;
+ clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "stmmaceth", "clk_gmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rg1_pins
+ &rg1mdio_pins>;
+ status = "disabled";
+ };
+
+ emc0: eth@f0825000 {
+ device_type = "network";
+ compatible = "nuvoton,npcm750-emc";
+ reg = <0xf0825000 0x1000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_emc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&r1_pins
+ &r1err_pins
+ &r1md_pins>;
+ };
+
+ ehci1:usb@f0806000 {
+ compatible = "nuvoton,npcm750-ehci";
+ reg = <0xf0806000 0x1000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ ohci1: ohci@f0807000 {
+ compatible = "nuvoton,npcm750-ohci";
+ reg = <0xf0807000 0x1000>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sdhci0: sdhci@f0842000 {
+ compatible = "nuvoton,npcm750-sdhci";
+ status = "disabled";
+ reg = <0xf0842000 0x200>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>; /*, <&clk_xin>;*/
+ clock-names = "clk_mmc"; /* ,"clk_xin"; */
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc8_pins
+ &mmc_pins>;
+ };
+
+ sdhci1: sdhci@f0840000 {
+ compatible = "nuvoton,npcm750-sdhci";
+ status = "disabled";
+ reg = <0xf0840000 0x200>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>; /*, <&clk_xin>;*/
+ clock-names = "clk_sdhc"; /* ,"clk_xin"; */
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd1_pins>;
+ };
+
+ aes:aes@f0858000 {
+ compatible = "nuvoton,npcm750-aes";
+ reg = <0xf0858000 0x1000>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_ahb";
+ };
+
+ sha:sha@f085a000 {
+ compatible = "nuvoton,npcm750-sha";
+ reg = <0xf085a000 0x1000>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_ahb";
+ };
+
+ copr: copr@0 {
+ compatible = "nuvoton,npcm750-copr";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_ahb";
+ };
+
+ vdma: vdma@e0800000 {
+ compatible = "nuvoton,npcm750-vdm";
+ reg = <0xe0800000 0x1000
+ 0xf0822000 0x1000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ spi0: spi@fb000000 {
+ compatible = "nuvoton,npcm750-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>;
+ reg-names = "control", "memory";
+ chip-max-address-map = <0x8000000>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_ahb";
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ };
+ };
+ spi3: spi@c0000000 {
+ compatible = "nuvoton,npcm750-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xc0000000 0x1000>, <0xA0000000 0x20000000>;
+ reg-names = "control", "memory";
+ chip-max-address-map = <0x8000000>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_ahb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins &spi3quad_pins>;
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ };
+ };
+
+ pci_rc: axi-pcie@e1000000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ compatible = "nuvoton,npcm750-pcirc";
+ reg = <0xe1000000 0x1000>;
+ device_type = "pci";
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ bus-range = <0x00 0xff>;
+ ranges = <0x02000000 0 0xea000000
+ 0xea000000 0 0x02000000>;
+ status = "disabled";
+ };
+
+ dvc: dvc@f0808000 {
+ compatible = "nuvoton,npcm750-dvc";
+ reg = <0xf0808000 0x1000>;
+ interrupts = <0 23 4>;
+ };
+
+ vcd: vcd@f0810000 {
+ compatible = "nuvoton,npcm750-vcd";
+ reg = <0xf0810000 0x10000>;
+ phy-memory = <0x3e200000 0x600000>;
+ de-mode = /bits/ 8 <1>;
+ interrupts = <0 22 4>;
+ status = "disabled";
+ };
+
+ ece: ece@f0820000 {
+ compatible = "nuvoton,npcm750-ece";
+ reg = <0xf0820000 0x2000>;
+ phy-memory = <0x3e800000 0x600000>;
+ interrupts = <0 24 4>;
+ status = "disabled";
+ };
+
+ pcimbox: pcimbox@f0848000 {
+ compatible = "nuvoton,npcm750-pci-mbox",
+ "simple-mfd", "syscon";
+ reg = <0xf084C000 0x8
+ 0xf0848000 0x3F00>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
apb {
#address-cells = <1>;
#size-cells = <1>;
@@ -116,11 +300,72 @@
interrupt-parent = <&gic>;
ranges = <0x0 0xf0000000 0x00300000>;
+ lpc_kcs: lpc_kcs@7000 {
+ compatible = "nuvoton,npcm750-lpc-kcs",
+ "simple-mfd", "syscon";
+ reg = <0x7000 0x40>;
+ reg-io-width = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x7000 0x40>;
+
+ kcs1: kcs1@0 {
+ compatible = "nuvoton,npcm750-kcs-bmc";
+ reg = <0x0 0x40>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <1>;
+ status = "disabled";
+ };
+
+ kcs2: kcs2@0 {
+ compatible = "nuvoton,npcm750-kcs-bmc";
+ reg = <0x0 0x40>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <2>;
+ status = "disabled";
+ };
+
+ kcs3: kcs3@0 {
+ compatible = "nuvoton,npcm750-kcs-bmc";
+ reg = <0x0 0x40>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <3>;
+ status = "disabled";
+ };
+ };
+
+ lpc_host: lpc_host@7000 {
+ compatible = "nuvoton,npcm750-lpc-host",
+ "simple-mfd", "syscon";
+ reg = <0x7000 0x60>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x7000 0x60>;
+
+ lpc_bpc: lpc_bpc@40 {
+ compatible = "nuvoton,npcm750-lpc-bpc";
+ reg = <0x40 0x20>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+ };
+
+ pspi: pspi@0 {
+ compatible = "nuvoton,npcm750-pspi";
+ reg = <0x200000 0x2000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_APB5>;
+ clock-names = "clk_apb5";
+ };
+
timer0: timer@8000 {
compatible = "nuvoton,npcm750-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x8000 0x50>;
- clocks = <&clk 5>;
+ reg = <0x8000 0x1C>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog0: watchdog@801C {
@@ -128,7 +373,7 @@
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x801C 0x4>;
status = "disabled";
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog1: watchdog@901C {
@@ -136,7 +381,7 @@
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x901C 0x4>;
status = "disabled";
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog2: watchdog@a01C {
@@ -144,13 +389,13 @@
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xa01C 0x4>;
status = "disabled";
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
serial0: serial@1000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x1000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
@@ -159,7 +404,7 @@
serial1: serial@2000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x2000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
@@ -168,7 +413,7 @@
serial2: serial@3000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x3000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
@@ -177,11 +422,785 @@
serial3: serial@4000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x4000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
+
+ rng: rng@b000 {
+ compatible = "nuvoton,npcm750-rng";
+ reg = <0xb000 0x1000>;
+ clocks = <&clk NPCM7XX_CLK_APB1>;
+ clock-names = "clk_apb1";
+ status = "disabled";
+ };
+
+ adc: adc@c000 {
+ compatible = "nuvoton,npcm750-adc";
+ reg = <0xc000 0x1000>;
+ clocks = <&clk NPCM7XX_CLK_ADC>;
+ clock-names = "clk_adc";
+ vref = <2048>;
+ };
+
+ otp:otp@189000 {
+ compatible = "nuvoton,npcm750-otp";
+ reg = <0x189000 0x1000
+ 0x18a000 0x1000>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_APB4>;
+ clock-names = "clk_apb4";
+ };
+
+ pwm_fan:pwm-fan-controller@103000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nuvoton,npcm750-pwm-fan";
+ reg = <0x103000 0x2000>,
+ <0x180000 0x8000>;
+ reg-names = "pwm", "fan";
+ clocks = <&clk NPCM7XX_CLK_APB3>,
+ <&clk NPCM7XX_CLK_APB4>;
+ clock-names = "pwm","fan";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pins &pwm1_pins
+ &pwm2_pins &pwm3_pins
+ &pwm4_pins &pwm5_pins
+ &pwm6_pins &pwm7_pins
+ &fanin0_pins &fanin1_pins
+ &fanin2_pins &fanin3_pins
+ &fanin4_pins &fanin5_pins
+ &fanin6_pins &fanin7_pins
+ &fanin8_pins &fanin9_pins
+ &fanin10_pins &fanin11_pins
+ &fanin12_pins &fanin13_pins
+ &fanin14_pins &fanin15_pins>;
+ status = "disabled";
+ };
+
+ i2c0: i2c-bus@80000 {
+ reg = <0x80000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb0_pins>;
+ status = "disabled";
+ };
+
+ i2c1: i2c-bus@81000 {
+ reg = <0x81000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb1_pins>;
+ status = "disabled";
+ };
+
+ i2c2: i2c-bus@82000 {
+ reg = <0x82000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb2_pins>;
+ status = "disabled";
+ };
+
+ i2c3: i2c-bus@83000 {
+ reg = <0x83000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb3_pins>;
+ status = "disabled";
+ };
+
+ i2c4: i2c-bus@84000 {
+ reg = <0x84000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb4_pins>;
+ status = "disabled";
+ };
+
+ i2c5: i2c-bus@85000 {
+ reg = <0x85000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb5_pins>;
+ status = "disabled";
+ };
+
+ i2c6: i2c-bus@86000 {
+ reg = <0x86000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb6_pins>;
+ status = "disabled";
+ };
+
+ i2c7: i2c-bus@87000 {
+ reg = <0x87000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb7_pins>;
+ status = "disabled";
+ };
+
+ i2c8: i2c-bus@88000 {
+ reg = <0x88000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb8_pins>;
+ status = "disabled";
+ };
+
+ i2c9: i2c-bus@89000 {
+ reg = <0x89000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb9_pins>;
+ status = "disabled";
+ };
+
+ i2c10: i2c-bus@8a000 {
+ reg = <0x8a000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb10_pins>;
+ status = "disabled";
+ };
+
+ i2c11: i2c-bus@8b000 {
+ reg = <0x8b000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb11_pins>;
+ status = "disabled";
+ };
+
+ i2c12: i2c-bus@8c000 {
+ reg = <0x8c000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb12_pins>;
+ status = "disabled";
+ };
+
+ i2c13: i2c-bus@8d000 {
+ reg = <0x8d000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb13_pins>;
+ status = "disabled";
+ };
+
+ i2c14: i2c-bus@8e000 {
+ reg = <0x8e000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb14_pins>;
+ status = "disabled";
+ };
+
+ i2c15: i2c-bus@8f000 {
+ reg = <0x8f000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c-bus";
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ bus-frequency = <100000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb15_pins>;
+ status = "disabled";
+ };
+
+ gfxi: gfxi@f000e000 {
+ compatible = "nuvoton,npcm750-gfxi", "syscon", "simple-mfd";
+ reg = <0xf000e000 0x100>;
+ };
+
+ };
+ };
+
+ pinctrl: pinctrl@f0800000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
+ ranges = <0 0xf0010000 0x8000>;
+ status = "okay";
+ gpio0: gpio@f0010000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x0 0x80>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ };
+ gpio1: gpio@f0011000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x1000 0x80>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 32 32>;
+ };
+ gpio2: gpio@f0012000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x2000 0x80>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 64 32>;
+ };
+ gpio3: gpio@f0013000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x3000 0x80>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 96 32>;
+ };
+ gpio4: gpio@f0014000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x4000 0x80>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 128 32>;
+ };
+ gpio5: gpio@f0015000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x5000 0x80>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 160 32>;
+ };
+ gpio6: gpio@f0016000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x6000 0x80>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 192 32>;
+ };
+ gpio7: gpio@f0017000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x7000 0x80>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 224 32>;
+ };
+
+ iox1_pins: iox1-pins {
+ groups = "iox1";
+ function = "iox1";
+ };
+ iox2_pins: iox2-pins {
+ groups = "iox2";
+ function = "iox2";
+ };
+ smb1d_pins: smb1d-pins {
+ groups = "smb1d";
+ function = "smb1d";
+ };
+ smb2d_pins: smb2d-pins {
+ groups = "smb2d";
+ function = "smb2d";
+ };
+ lkgpo1_pins: lkgpo1-pins {
+ groups = "lkgpo1";
+ function = "lkgpo1";
+ };
+ lkgpo2_pins: lkgpo2-pins {
+ groups = "lkgpo2";
+ function = "lkgpo2";
+ };
+ ioxh_pins: ioxh-pins {
+ groups = "ioxh";
+ function = "ioxh";
+ };
+ gspi_pins: gspi-pins {
+ groups = "gspi";
+ function = "gspi";
+ };
+ smb5b_pins: smb5b-pins {
+ groups = "smb5b";
+ function = "smb5b";
+ };
+ smb5c_pins: smb5c-pins {
+ groups = "smb5c";
+ function = "smb5c";
+ };
+ lkgpo0_pins: lkgpo0-pins {
+ groups = "lkgpo0";
+ function = "lkgpo0";
+ };
+ pspi2_pins: pspi2-pins {
+ groups = "pspi2";
+ function = "pspi2";
+ };
+ smb4den_pins: smb4den-pins {
+ groups = "smb4den";
+ function = "smb4den";
+ };
+ smb4b_pins: smb4b-pins {
+ groups = "smb4b";
+ function = "smb4b";
+ };
+ smb4c_pins: smb4c-pins {
+ groups = "smb4c";
+ function = "smb4c";
+ };
+ smb15_pins: smb15-pins {
+ groups = "smb15";
+ function = "smb15";
+ };
+ smb4d_pins: smb4d-pins {
+ groups = "smb4d";
+ function = "smb4d";
+ };
+ smb14_pins: smb14-pins {
+ groups = "smb14";
+ function = "smb14";
+ };
+ smb5_pins: smb5-pins {
+ groups = "smb5";
+ function = "smb5";
+ };
+ smb4_pins: smb4-pins {
+ groups = "smb4";
+ function = "smb4";
+ };
+ smb3_pins: smb3-pins {
+ groups = "smb3";
+ function = "smb3";
+ };
+ spi0cs1_pins: spi0cs1-pins {
+ groups = "spi0cs1";
+ function = "spi0cs1";
+ };
+ spi0cs2_pins: spi0cs2-pins {
+ groups = "spi0cs2";
+ function = "spi0cs2";
+ };
+ spi0cs3_pins: spi0cs3-pins {
+ groups = "spi0cs3";
+ function = "spi0cs3";
+ };
+ smb3c_pins: smb3c-pins {
+ groups = "smb3c";
+ function = "smb3c";
+ };
+ smb3b_pins: smb3b-pins {
+ groups = "smb3b";
+ function = "smb3b";
+ };
+ bmcuart0a_pins: bmcuart0a-pins {
+ groups = "bmcuart0a";
+ function = "bmcuart0a";
+ };
+ uart1_pins: uart1-pins {
+ groups = "uart1";
+ function = "uart1";
+ };
+ jtag2_pins: jtag2-pins {
+ groups = "jtag2";
+ function = "jtag2";
+ };
+ bmcuart1_pins: bmcuart1-pins {
+ groups = "bmcuart1";
+ function = "bmcuart1";
+ };
+ uart2_pins: uart2-pins {
+ groups = "uart2";
+ function = "uart2";
+ };
+ bmcuart0b_pins: bmcuart0b-pins {
+ groups = "bmcuart0b";
+ function = "bmcuart0b";
+ };
+ r1err_pins: r1err-pins {
+ groups = "r1err";
+ function = "r1err";
+ };
+ r1md_pins: r1md-pins {
+ groups = "r1md";
+ function = "r1md";
+ };
+ smb3d_pins: smb3d-pins {
+ groups = "smb3d";
+ function = "smb3d";
+ };
+ fanin0_pins: fanin0-pins {
+ groups = "fanin0";
+ function = "fanin0";
+ };
+ fanin1_pins: fanin1-pins {
+ groups = "fanin1";
+ function = "fanin1";
+ };
+ fanin2_pins: fanin2-pins {
+ groups = "fanin2";
+ function = "fanin2";
+ };
+ fanin3_pins: fanin3-pins {
+ groups = "fanin3";
+ function = "fanin3";
+ };
+ fanin4_pins: fanin4-pins {
+ groups = "fanin4";
+ function = "fanin4";
+ };
+ fanin5_pins: fanin5-pins {
+ groups = "fanin5";
+ function = "fanin5";
+ };
+ fanin6_pins: fanin6-pins {
+ groups = "fanin6";
+ function = "fanin6";
+ };
+ fanin7_pins: fanin7-pins {
+ groups = "fanin7";
+ function = "fanin7";
+ };
+ fanin8_pins: fanin8-pins {
+ groups = "fanin8";
+ function = "fanin8";
+ };
+ fanin9_pins: fanin9-pins {
+ groups = "fanin9";
+ function = "fanin9";
+ };
+ fanin10_pins: fanin10-pins {
+ groups = "fanin10";
+ function = "fanin10";
+ };
+ fanin11_pins: fanin11-pins {
+ groups = "fanin11";
+ function = "fanin11";
+ };
+ fanin12_pins: fanin12-pins {
+ groups = "fanin12";
+ function = "fanin12";
+ };
+ fanin13_pins: fanin13-pins {
+ groups = "fanin13";
+ function = "fanin13";
+ };
+ fanin14_pins: fanin14-pins {
+ groups = "fanin14";
+ function = "fanin14";
+ };
+ fanin15_pins: fanin15-pins {
+ groups = "fanin15";
+ function = "fanin15";
+ };
+ pwm0_pins: pwm0-pins {
+ groups = "pwm0";
+ function = "pwm0";
+ };
+ pwm1_pins: pwm1-pins {
+ groups = "pwm1";
+ function = "pwm1";
+ };
+ pwm2_pins: pwm2-pins {
+ groups = "pwm2";
+ function = "pwm2";
+ };
+ pwm3_pins: pwm3-pins {
+ groups = "pwm3";
+ function = "pwm3";
+ };
+ r2_pins: r2-pins {
+ groups = "r2";
+ function = "r2";
+ };
+ r2err_pins: r2err-pins {
+ groups = "r2err";
+ function = "r2err";
+ };
+ r2md_pins: r2md-pins {
+ groups = "r2md";
+ function = "r2md";
+ };
+ ga20kbc_pins: ga20kbc-pins {
+ groups = "ga20kbc";
+ function = "ga20kbc";
+ };
+ smb5d_pins: smb5d-pins {
+ groups = "smb5d";
+ function = "smb5d";
+ };
+ lpc_pins: lpc-pins {
+ groups = "lpc";
+ function = "lpc";
+ };
+ espi_pins: espi-pins {
+ groups = "espi";
+ function = "espi";
+ };
+ rg1_pins: rg1-pins {
+ groups = "rg1";
+ function = "rg1";
+ };
+ rg1mdio_pins: rg1mdio-pins {
+ groups = "rg1mdio";
+ function = "rg1mdio";
+ };
+ rg2_pins: rg2-pins {
+ groups = "rg2";
+ function = "rg2";
+ };
+ ddr_pins: ddr-pins {
+ groups = "ddr";
+ function = "ddr";
+ };
+ smb0_pins: smb0-pins {
+ groups = "smb0";
+ function = "smb0";
+ };
+ smb1_pins: smb1-pins {
+ groups = "smb1";
+ function = "smb1";
+ };
+ smb2_pins: smb2-pins {
+ groups = "smb2";
+ function = "smb2";
+ };
+ smb2c_pins: smb2c-pins {
+ groups = "smb2c";
+ function = "smb2c";
+ };
+ smb2b_pins: smb2b-pins {
+ groups = "smb2b";
+ function = "smb2b";
+ };
+ smb1c_pins: smb1c-pins {
+ groups = "smb1c";
+ function = "smb1c";
+ };
+ smb1b_pins: smb1b-pins {
+ groups = "smb1b";
+ function = "smb1b";
+ };
+ smb8_pins: smb8-pins {
+ groups = "smb8";
+ function = "smb8";
+ };
+ smb9_pins: smb9-pins {
+ groups = "smb9";
+ function = "smb9";
+ };
+ smb10_pins: smb10-pins {
+ groups = "smb10";
+ function = "smb10";
+ };
+ smb11_pins: smb11-pins {
+ groups = "smb11";
+ function = "smb11";
+ };
+ sd1_pins: sd1-pins {
+ groups = "sd1";
+ function = "sd1";
+ };
+ sd1pwr_pins: sd1pwr-pins {
+ groups = "sd1pwr";
+ function = "sd1pwr";
+ };
+ pwm4_pins: pwm4-pins {
+ groups = "pwm4";
+ function = "pwm4";
+ };
+ pwm5_pins: pwm5-pins {
+ groups = "pwm5";
+ function = "pwm5";
+ };
+ pwm6_pins: pwm6-pins {
+ groups = "pwm6";
+ function = "pwm6";
+ };
+ pwm7_pins: pwm7-pins {
+ groups = "pwm7";
+ function = "pwm7";
+ };
+ mmc8_pins: mmc8-pins {
+ groups = "mmc8";
+ function = "mmc8";
+ };
+ mmc_pins: mmc-pins {
+ groups = "mmc";
+ function = "mmc";
+ };
+ mmcwp_pins: mmcwp-pins {
+ groups = "mmcwp";
+ function = "mmcwp";
+ };
+ mmccd_pins: mmccd-pins {
+ groups = "mmccd";
+ function = "mmccd";
+ };
+ mmcrst_pins: mmcrst-pins {
+ groups = "mmcrst";
+ function = "mmcrst";
+ };
+ clkout_pins: clkout-pins {
+ groups = "clkout";
+ function = "clkout";
+ };
+ serirq_pins: serirq-pins {
+ groups = "serirq";
+ function = "serirq";
+ };
+ lpcclk_pins: lpcclk-pins {
+ groups = "lpcclk";
+ function = "lpcclk";
+ };
+ scipme_pins: scipme-pins {
+ groups = "scipme";
+ function = "scipme";
+ };
+ sci_pins: sci-pins {
+ groups = "sci";
+ function = "sci";
+ };
+ smb6_pins: smb6-pins {
+ groups = "smb6";
+ function = "smb6";
+ };
+ smb7_pins: smb7-pins {
+ groups = "smb7";
+ function = "smb7";
+ };
+ pspi1_pins: pspi1-pins {
+ groups = "pspi1";
+ function = "pspi1";
+ };
+ faninx_pins: faninx-pins {
+ groups = "faninx";
+ function = "faninx";
+ };
+ r1_pins: r1-pins {
+ groups = "r1";
+ function = "r1";
+ };
+ spi3_pins: spi3-pins {
+ groups = "spi3";
+ function = "spi3";
+ };
+ spi3cs1_pins: spi3cs1-pins {
+ groups = "spi3cs1";
+ function = "spi3cs1";
+ };
+ spi3quad_pins: spi3quad-pins {
+ groups = "spi3quad";
+ function = "spi3quad";
+ };
+ spi3cs2_pins: spi3cs2-pins {
+ groups = "spi3cs2";
+ function = "spi3cs2";
+ };
+ spi3cs3_pins: spi3cs3-pins {
+ groups = "spi3cs3";
+ function = "spi3cs3";
+ };
+ nprd_smi_pins: nprd-smi-pins {
+ groups = "nprd_smi";
+ function = "nprd_smi";
+ };
+ smb0b_pins: smb0b-pins {
+ groups = "smb0b";
+ function = "smb0b";
+ };
+ smb0c_pins: smb0c-pins {
+ groups = "smb0c";
+ function = "smb0c";
+ };
+ smb0den_pins: smb0den-pins {
+ groups = "smb0den";
+ function = "smb0den";
+ };
+ smb0d_pins: smb0d-pins {
+ groups = "smb0d";
+ function = "smb0d";
+ };
+ ddc_pins: ddc-pins {
+ groups = "ddc";
+ function = "ddc";
+ };
+ rg2mdio_pins: rg2mdio-pins {
+ groups = "rg2mdio";
+ function = "rg2mdio";
+ };
+ wdog1_pins: wdog1-pins {
+ groups = "wdog1";
+ function = "wdog1";
+ };
+ wdog2_pins: wdog2-pins {
+ groups = "wdog2";
+ function = "wdog2";
+ };
+ smb12_pins: smb12-pins {
+ groups = "smb12";
+ function = "smb12";
+ };
+ smb13_pins: smb13-pins {
+ groups = "smb13";
+ function = "smb13";
+ };
+ spix_pins: spix-pins {
+ groups = "spix";
+ function = "spix";
+ };
+ spixcs1_pins: spixcs1-pins {
+ groups = "spixcs1";
+ function = "spixcs1";
+ };
+ clkreq_pins: clkreq-pins {
+ groups = "clkreq";
+ function = "clkreq";
};
};
};
diff --git a/arch/arm/boot/dts/nuvoton-npcm750-evb.dts b/arch/arm/boot/dts/nuvoton-npcm750-evb.dts
index 15f744f1beea..8c568b380706 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-evb.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-evb.dts
@@ -9,6 +9,45 @@
model = "Nuvoton npcm750 Development Board (Device Tree)";
compatible = "nuvoton,npcm750";
+ aliases {
+ ethernet0 = &emc0;
+ ethernet1 = &emc1;
+ ethernet2 = &gmac0;
+ ethernet3 = &gmac1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ udc0 = &udc0;
+ udc1 = &udc1;
+ udc2 = &udc2;
+ udc3 = &udc3;
+ udc4 = &udc4;
+ udc5 = &udc5;
+ udc6 = &udc6;
+ udc7 = &udc7;
+ udc8 = &udc8;
+ udc9 = &udc9;
+ emmc0 = &sdhci0;
+ emmc1 = &sdhci1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c13 = &i2c13;
+ i2c14 = &i2c14;
+ i2c15 = &i2c15;
+ };
+
chosen {
stdout-path = &serial3;
};
@@ -16,24 +55,469 @@
memory {
reg = <0 0x40000000>;
};
-};
-&watchdog1 {
- status = "okay";
-};
+ ahb {
+ gmac0: eth@f0802000 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+ };
-&serial0 {
- status = "okay";
-};
+ gmac1: eth@f0804000 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+ };
-&serial1 {
- status = "okay";
-};
+ emc0: eth@f0825000 {
+ phy-mode = "rmii";
+ #use-ncsi; /* add this to support ncsi */
+ status = "okay";
+ };
+
+ emc1: eth@f0826000 {
+ phy-mode = "rmii";
+ #use-ncsi; /* add this to support ncsi */
+ status = "okay";
+ };
+
+ ehci1: usb@f0806000 {
+ status = "okay";
+ };
+
+ ohci1: ohci@f0807000 {
+ status = "okay";
+ };
+
+ udc0:udc@f0830000 {
+ status = "okay";
+ };
+
+ udc1:udc@f0831000 {
+ status = "okay";
+ };
+
+ udc2:udc@f0832000 {
+ status = "okay";
+ };
+
+ udc3:udc@f0833000 {
+ status = "okay";
+ };
+
+ udc4:udc@f0834000 {
+ status = "okay";
+ };
+
+ udc5:udc@f0835000 {
+ status = "okay";
+ };
+
+ udc6:udc@f0836000 {
+ status = "okay";
+ };
+
+ udc7:udc@f0837000 {
+ status = "okay";
+ };
+
+ udc8:udc@f0838000 {
+ status = "okay";
+ };
+
+ udc9:udc@f0839000 {
+ status = "okay";
+ };
+
+ aes:aes@f0858000 {
+ status = "okay";
+ };
+
+ sha:sha@f085a000 {
+ status = "okay";
+ };
+
+ spi0: spi@fb000000 {
+ spi-nor@0 {
+ partitions@80000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bbuboot1@0 {
+ label = "bb-uboot-1";
+ reg = <0x0000000 0x80000>;
+ read-only;
+ };
+ bbuboot2@80000 {
+ label = "bb-uboot-2";
+ reg = <0x0080000 0x80000>;
+ read-only;
+ };
+ envparam@100000 {
+ label = "env-param";
+ reg = <0x0100000 0x40000>;
+ read-only;
+ };
+ spare@140000 {
+ label = "spare";
+ reg = <0x0140000 0xC0000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x0200000 0x400000>;
+ };
+ rootfs@600000 {
+ label = "rootfs";
+ reg = <0x0600000 0x700000>;
+ };
+ spare1@D00000 {
+ label = "spare1";
+ reg = <0x0D00000 0x200000>;
+ };
+ spare2@0F00000 {
+ label = "spare2";
+ reg = <0x0F00000 0x200000>;
+ };
+ spare3@1100000 {
+ label = "spare3";
+ reg = <0x1100000 0x200000>;
+ };
+ spare4@1300000 {
+ label = "spare4";
+ reg = <0x1300000 0x0>;
+ };
+ };
+ };
+ };
+
+ spi3: spi@c0000000 {
+ spi-nor@0 {
+ partitions@A0000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ system1@0 {
+ label = "spi3-system1";
+ reg = <0x0 0x800000>;
+ };
+ system2@800000 {
+ label = "spi3-system2";
+ reg = <0x800000 0x0>;
+ };
+ };
+ };
+ };
+
+ sdhci0: sdhci@f0842000 {
+ status = "okay";
+ };
+
+ sdhci1: sdhci@f0840000 {
+ status = "okay";
+ };
+
+ pcimbox: pcimbox@f0848000 {
+ status = "okay";
+ };
+
+ vcd: vcd@f0810000 {
+ status = "okay";
+ };
+
+ ece: ece@f0820000 {
+ status = "okay";
+ };
+
+ apb {
+
+ watchdog1: watchdog@901C {
+ status = "okay";
+ };
+
+ rng: rng@b000 {
+ status = "okay";
+ };
+
+ serial0: serial@1000 {
+ status = "okay";
+ };
-&serial2 {
- status = "okay";
+ serial1: serial@2000 {
+ status = "okay";
+ };
+
+ serial2: serial@3000 {
+ status = "okay";
+ };
+
+ serial3: serial@4000 {
+ status = "okay";
+ };
+
+ otp:otp@189000 {
+ status = "okay";
+ };
+
+ lpc_kcs: lpc_kcs@7000 {
+ kcs1: kcs1@0 {
+ status = "okay";
+ };
+
+ kcs2: kcs2@0 {
+ status = "okay";
+ };
+
+ kcs3: kcs3@0 {
+ status = "okay";
+ };
+ };
+
+ lpc_host: lpc_host@7000 {
+ lpc_bpc: lpc_bpc@40 {
+ monitor-ports = <0x80>;
+ status = "okay";
+ };
+ };
+
+ /* lm75 on SVB */
+ i2c0: i2c-bus@80000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "okay";
+
+ lm75@48 {
+ compatible = "lm75";
+ reg = <0x48>;
+ status = "okay";
+ };
+ };
+
+ /* lm75 on EB */
+ i2c1: i2c-bus@81000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "okay";
+
+ lm75@48 {
+ compatible = "lm75";
+ reg = <0x48>;
+ status = "okay";
+ };
+ };
+
+ /* tmp100 on EB */
+ i2c2: i2c-bus@82000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "okay";
+
+ tmp100@48 {
+ compatible = "tmp100";
+ reg = <0x48>;
+ status = "okay";
+ };
+ };
+
+ /* tmp100 on SVB */
+ i2c6: i2c-bus@86000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "okay";
+
+ tmp100@48 {
+ compatible = "tmp100";
+ reg = <0x48>;
+ status = "okay";
+ };
+ };
+ i2c3: i2c-bus@83000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c4: i2c-bus@84000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c5: i2c-bus@85000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c7: i2c-bus@87000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c8: i2c-bus@88000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c9: i2c-bus@89000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c10: i2c-bus@8a000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c11: i2c-bus@8b000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c14: i2c-bus@8e000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c15: i2c-bus@8f000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-frequency = <100000>;
+ status = "disabled"; /* SVB conflict with pspi2 cs gpio20o_pins */
+ };
+
+ pwm_fan:pwm-fan-controller@103000 {
+ status = "okay";
+ fan@0 {
+ reg = <0x00>;
+ fan-tach-ch = /bits/ 8 <0x00 0x01>;
+ cooling-levels = <127 255>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ fan-tach-ch = /bits/ 8 <0x04 0x05>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@3 {
+ reg = <0x03>;
+ fan-tach-ch = /bits/ 8 <0x06 0x07>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@4 {
+ reg = <0x04>;
+ fan-tach-ch = /bits/ 8 <0x08 0x09>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@5 {
+ reg = <0x05>;
+ fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@6 {
+ reg = <0x06>;
+ fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@7 {
+ reg = <0x07>;
+ fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ };
+
+ /* example for future pspi binding */
+ /*
+ pspi: pspi@0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pspi1_pins &pspi2_pins
+ &gpio20o_pins &gpio203o_pins>;
+ cs-gpios = <&gpio 20 1>, <&gpio 203 1>;
+ status = "okay";
+ };
+ */
+ };
+ };
+
+ pinctrl: pinctrl@f0800000 {
+ pinctrl-names = "default";
+ pinctrl-0 = < &iox1_pins
+ &gpio8_pins
+ &gpio9o_pins
+ &gpio10_pins
+ &gpio11o_pins
+ &gpio16_pins
+ &gpio24o_pins
+ &gpio25ol_pins
+ &gpio32o_pins
+ &jtag2_pins
+ &gpio61o_pins
+ &gpio62o_pins
+ &gpio63o_pins
+ &gpio64o_pins /* SVB pspi1 enable */
+ &gpio80_pins
+ &gpio81_pins
+ &gpio82_pins
+ &gpio83_pins
+ &lpc_pins
+ &gpio132o_pins
+ &gpio133_pins
+ &gpio134_pins
+ &gpio135_pins
+ &gpio144_pins
+ &gpio145_pins
+ &gpio146_pins
+ &gpio147_pins
+ &gpio160_pins
+ &gpio162_pins
+ &gpio168_pins
+ &gpio169_pins
+ &gpio170_pins
+ &gpio187o_pins
+ &gpio190_pins
+ &gpio191o_pins
+ &gpio192o_pins
+ &gpio197ol_pins
+ &ddc_pins
+ &gpio218_pins
+ &gpio219ol_pins
+ &gpio220ol_pins
+ &gpio221o_pins
+ &gpio222_pins
+ &gpio223ol_pins
+ &spix_pins
+ &gpio228ol_pins
+ &gpio231o_pins
+ &gpio255_pins>;
+ };
};
-&serial3 {
- status = "okay";
+&gcr {
+ serial_port_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+
+ mux-reg-masks = <0x38 0x07>;
+ idle-states = <2>; /* Serial port mode 3 (takeover) */
+ };
};
diff --git a/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
new file mode 100644
index 000000000000..b9675fbce4e6
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
@@ -0,0 +1,2031 @@
+/*
+ * DTSi file for the NPCM750 pin controller
+ *
+ * Copyright (c) 2014-2017 Nuvoton Technology corporation.
+ *
+ * Released under the GPLv2 only.
+ * SPDX-License-Identifier: GPL-2.0
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+
+/ {
+ pinctrl: pinctrl@f0800000 {
+ gpio0o_pins: gpio0o-pins {
+ pins = "GPIO0/IOX1DI";
+ bias-disable;
+ output-high;
+ };
+ gpio1_pins: gpio1-pins {
+ pins = "GPIO1/IOX1LD";
+ bias-disable;
+ input-enable;
+ };
+ gpio2_pins: gpio2-pins {
+ pins = "GPIO2/IOX1CK";
+ bias-disable;
+ input-enable;
+ };
+ gpio2o_pins: gpio2o-pins {
+ pins = "GPIO2/IOX1CK";
+ bias-disable;
+ output_high;
+ };
+ gpio3_pins: gpio3-pins {
+ pins = "GPIO3/IOX1D0";
+ bias-disable;
+ input-enable;
+ };
+ gpio3o_pins: gpio3o-pins {
+ pins = "GPIO3/IOX1D0";
+ bias-disable;
+ output-high;
+ };
+ gpio4_pins: gpio4-pins {
+ pins = "GPIO4/IOX2DI/SMB1DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio5_pins: gpio5-pins {
+ pins = "GPIO5/IOX2LD/SMB1DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio6_pins: gpio6-pins {
+ pins = "GPIO6/IOX2CK/SMB2DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio6o_pins: gpio6o-pins {
+ pins = "GPIO6/IOX2CK/SMB2DSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio6ol_pins: gpio6ol-pins {
+ pins = "GPIO6/IOX2CK/SMB2DSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio7_pins: gpio7-pins {
+ pins = "GPIO7/IOX2D0/SMB2DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio7o_pins: gpio7o-pins {
+ pins = "GPIO7/IOX2D0/SMB2DSCL";
+ bias-disable;
+ output-high;
+ };
+ gpio7ol_pins: gpio7ol-pins {
+ pins = "GPIO7/IOX2D0/SMB2DSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio8_pins: gpio8-pins {
+ pins = "GPIO8/LKGPO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio8ol_pins: gpio8ol-pins {
+ pins = "GPIO8/LKGPO1";
+ bias-disable;
+ output-low;
+ };
+ gpio9_pins: gpio9-pins {
+ pins = "GPIO9/LKGPO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio9o_pins: gpio9o-pins {
+ pins = "GPIO9/LKGPO2";
+ bias-disable;
+ output-high;
+ };
+ gpio9ol_pins: gpio9ol-pins {
+ pins = "GPIO9/LKGPO2";
+ bias-disable;
+ output-low;
+ };
+ gpio10_pins: gpio10-pins {
+ pins = "GPIO10/IOXHLD";
+ bias-disable;
+ input-enable;
+ };
+ gpio10ol_pins: gpio10ol-pins {
+ pins = "GPIO10/IOXHLD";
+ bias-disable;
+ output-low;
+ };
+ gpio11_pins: gpio11-pins {
+ pins = "GPIO11/IOXHCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio11o_pins: gpio11o-pins {
+ pins = "GPIO11/IOXHCK";
+ bias-disable;
+ output-high;
+ };
+ gpio11ol_pins: gpio11ol-pins {
+ pins = "GPIO11/IOXHCK";
+ bias-disable;
+ output-low;
+ };
+ gpio12_pins: gpio12-pins {
+ pins = "GPIO12/GSPICK/SMB5BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio12o_pins: gpio12o-pins {
+ pins = "GPIO12/GSPICK/SMB5BSCL";
+ bias-disable;
+ output-high;
+ };
+ gpio12ol_pins: gpio12ol-pins {
+ pins = "GPIO12/GSPICK/SMB5BSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio13_pins: gpio13-pins {
+ pins = "GPIO13/GSPIDO/SMB5BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio13ol_pins: gpio13ol-pins {
+ pins = "GPIO13/GSPIDO/SMB5BSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio14_pins: gpio14-pins {
+ pins = "GPIO14/GSPIDI/SMB5CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio14ol_pins: gpio14ol-pins {
+ pins = "GPIO14/GSPIDI/SMB5CSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio15_pins: gpio15-pins {
+ pins = "GPIO15/GSPICS/SMB5CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio15o_pins: gpio15o-pins {
+ pins = "GPIO15/GSPICS/SMB5CSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio16_pins: gpio16-pins {
+ pins = "GPIO16/LKGPO0";
+ bias-disable;
+ input-enable;
+ };
+ gpio16o_pins: gpio16o-pins {
+ pins = "GPIO16/LKGPO0";
+ bias-disable;
+ output-high;
+ };
+ gpio16ol_pins: gpio16ol-pins {
+ pins = "GPIO16/LKGPO0";
+ bias-disable;
+ output-low;
+ };
+ gpio17_pins: gpio17-pins {
+ pins = "GPIO17/PSPI2DI/SMB4DEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio17o_pins: gpio17o-pins {
+ pins = "GPIO17/PSPI2DI/SMB4DEN";
+ bias-disable;
+ output-high;
+ };
+ gpio17ol_pins: gpio17ol-pins {
+ pins = "GPIO17/PSPI2DI/SMB4DEN";
+ bias-disable;
+ output-low;
+ };
+ gpio18_pins: gpio18-pins {
+ pins = "GPIO18/PSPI2D0/SMB4BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio18ol_pins: gpio18ol-pins {
+ pins = "GPIO18/PSPI2D0/SMB4BSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio19_pins: gpio19-pins {
+ pins = "GPIO19/PSPI2CK/SMB4BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio19ol_pins: gpio19ol-pins {
+ pins = "GPIO19/PSPI2CK/SMB4BSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio20_pins: gpio20-pins {
+ pins = "GPIO20/SMB4CSDA/SMB15SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio20o_pins: gpio20o-pins {
+ pins = "GPIO20/SMB4CSDA/SMB15SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio20ol_pins: gpio20ol-pins {
+ pins = "GPIO20/SMB4CSDA/SMB15SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio21_pins: gpio21-pins {
+ pins = "GPIO21/SMB4CSCL/SMB15SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio21ol_pins: gpio21ol-pins {
+ pins = "GPIO21/SMB4CSCL/SMB15SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio22_pins: gpio22-pins {
+ pins = "GPIO22/SMB4DSDA/SMB14SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio22ol_pins: gpio22ol-pins {
+ pins = "GPIO22/SMB4DSDA/SMB14SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio23_pins: gpio23-pins {
+ pins = "GPIO23/SMB4DSCL/SMB14SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio23ol_pins: gpio23ol-pins {
+ pins = "GPIO23/SMB4DSCL/SMB14SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio24_pins: gpio24-pins {
+ pins = "GPIO24/IOXHDO";
+ bias-disable;
+ input-enable;
+ };
+ gpio24o_pins: gpio24o-pins {
+ pins = "GPIO24/IOXHDO";
+ bias-disable;
+ output-high;
+ };
+ gpio24ol_pins: gpio24ol-pins {
+ pins = "GPIO24/IOXHDO";
+ bias-disable;
+ output-low;
+ };
+ gpio25_pins: gpio25-pins {
+ pins = "GPIO25/IOXHDI";
+ bias-disable;
+ input-enable;
+ };
+ gpio25o_pins: gpio25o-pins {
+ pins = "GPIO25/IOXHDI";
+ bias-disable;
+ output-high;
+ };
+ gpio25ol_pins: gpio25ol-pins {
+ pins = "GPIO25/IOXHDI";
+ bias-disable;
+ output-low;
+ };
+ gpio26_pins: gpio26-pins {
+ pins = "GPIO26/SMB5SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio27_pins: gpio27-pins {
+ pins = "GPIO27/SMB5SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio32_pins: gpio32-pins {
+ pins = "GPIO32/nSPI0CS1";
+ bias-disable;
+ input-enable;
+ };
+ gpio32o_pins: gpio32o-pins {
+ pins = "GPIO32/nSPI0CS1";
+ bias-disable;
+ output-high;
+ };
+ gpio32ol_pins: gpio32ol-pins {
+ pins = "GPIO32/nSPI0CS1";
+ bias-disable;
+ output-low;
+ };
+ gpio37_pins: gpio37-pins {
+ pins = "GPIO37/SMB3CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio37o_pins: gpio37o-pins {
+ pins = "GPIO37/SMB3CSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio37ol_pins: gpio37ol-pins {
+ pins = "GPIO37/SMB3CSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio38_pins: gpio38-pins {
+ pins = "GPIO38/SMB3CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio38o_pins: gpio38o-pins {
+ pins = "GPIO38/SMB3CSCL";
+ bias-disable;
+ output-high;
+ };
+ gpio38ol_pins: gpio38ol-pins {
+ pins = "GPIO38/SMB3CSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio39_pins: gpio39-pins {
+ pins = "GPIO39/SMB3BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio39o_pins: gpio39o-pins {
+ pins = "GPIO39/SMB3BSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio39ol_pins: gpio39ol-pins {
+ pins = "GPIO39/SMB3BSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio40_pins: gpio40-pins {
+ pins = "GPIO40/SMB3BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio40o_pins: gpio40o-pins {
+ pins = "GPIO40/SMB3BSCL";
+ bias-disable;
+ output-high;
+ };
+ gpio40ol_pins: gpio40ol-pins {
+ pins = "GPIO40/SMB3BSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio41_pins: gpio41-pins {
+ pins = "GPIO41/BSPRXD";
+ input-enable;
+ };
+ gpio42_pins: gpio42-pins {
+ pins = "GPO42/BSPTXD/STRAP11";
+ bias-disable;
+ input-enable;
+ };
+ gpio43_pins: gpio43-pins {
+ pins = "GPIO43/RXD1/JTMS2/BU1RXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio44_pins: gpio44-pins {
+ pins = "GPIO44/nCTS1/JTDI2/BU1CTS";
+ bias-disable;
+ input-enable;
+ };
+ gpio45_pins: gpio45-pins {
+ pins = "GPIO45/nDCD1/JTDO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio46_pins: gpio46-pins {
+ pins = "GPIO46/nDSR1/JTCK2";
+ bias-disable;
+ input-enable;
+ };
+ gpio47_pins: gpio47-pins {
+ pins = "GPIO47/nRI1/JCP_RDY2";
+ bias-disable;
+ input-enable;
+ };
+ gpio48_pins: gpio48-pins {
+ pins = "GPIO48/TXD2/BSPTXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio49_pins: gpio49-pins {
+ pins = "GPIO49/RXD2/BSPRXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio50_pins: gpio50-pins {
+ pins = "GPIO50/nCTS2";
+ bias-disable;
+ input-enable;
+ };
+ gpio50ol_pins: gpio50ol-pins {
+ pins = "GPIO50/nCTS2";
+ bias-disable;
+ output-low;
+ };
+ gpio51_pins: gpio51-pins {
+ pins = "GPO51/nRTS2/STRAP2";
+ bias-disable;
+ input-enable;
+ };
+ gpio51o_pins: gpio51o-pins {
+ pins = "GPO51/nRTS2/STRAP2";
+ bias-disable;
+ output-high;
+ };
+ gpio52_pins: gpio52-pins {
+ pins = "GPIO52/nDCD2";
+ bias-disable;
+ input-enable;
+ };
+ gpio52ol_pins: gpio52ol-pins {
+ pins = "GPIO52/nDCD2";
+ bias-disable;
+ output-low;
+ };
+ gpio53_pins: gpio53-pins {
+ pins = "GPO53/nDTR2_BOUT2/STRAP1";
+ bias-disable;
+ input-enable;
+ };
+ gpio53o_pins: gpio53o-pins {
+ pins = "GPO53/nDTR2_BOUT2/STRAP1";
+ bias-disable;
+ output-high;
+ };
+ gpio54_pins: gpio54-pins {
+ pins = "GPIO54/nDSR2";
+ bias-disable;
+ input-enable;
+ };
+ gpio54ol_pins: gpio54ol-pins {
+ pins = "GPIO54/nDSR2";
+ bias-disable;
+ output-low;
+ };
+ gpio55_pins: gpio55-pins {
+ pins = "GPIO55/nRI2";
+ bias-disable;
+ input-enable;
+ };
+ gpio55ol_pins: gpio55ol-pins {
+ pins = "GPIO55/nRI2";
+ bias-disable;
+ output-low;
+ };
+ gpio56_pins: gpio56-pins {
+ pins = "GPIO56/R1RXERR";
+ bias-disable;
+ input-enable;
+ };
+ gpio57_pins: gpio57-pins {
+ pins = "GPIO57/R1MDC";
+ bias-disable;
+ input-enable;
+ };
+ gpio57ol_pins: gpio57ol-pins {
+ pins = "GPIO57/R1MDC";
+ bias-disable;
+ output-low;
+ };
+ gpio58_pins: gpio58-pins {
+ pins = "GPIO58/R1MDIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio58ol_pins: gpio58ol-pins {
+ pins = "GPIO58/R1MDIO";
+ bias-disable;
+ output-low;
+ };
+ gpio59_pins: gpio59-pins {
+ pins = "GPIO59/SMB3DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio59o_pins: gpio59o-pins {
+ pins = "GPIO59/SMB3DSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio59ol_pins: gpio59ol-pins {
+ pins = "GPIO59/SMB3DSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio60_pins: gpio60-pins {
+ pins = "GPIO60/SMB3DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio60o_pins: gpio60o-pins {
+ pins = "GPIO60/SMB3DSCL";
+ bias-disable;
+ output-high;
+ };
+ gpio60ol_pins: gpio60ol-pins {
+ pins = "GPIO60/SMB3DSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio61_pins: gpio61-pins {
+ pins = "GPO61/nDTR1_BOUT1/STRAP6";
+ bias-disable;
+ input-enable;
+ };
+ gpio61o_pins: gpio61o-pins {
+ pins = "GPO61/nDTR1_BOUT1/STRAP6";
+ bias-disable;
+ output-high;
+ };
+ gpio62_pins: gpio62-pins {
+ pins = "GPO62/nRTST1/STRAP5";
+ bias-disable;
+ input-enable;
+ };
+ gpio62o_pins: gpio62o-pins {
+ pins = "GPO62/nRTST1/STRAP5";
+ bias-disable;
+ output-high;
+ };
+ gpio63_pins: gpio63-pins {
+ pins = "GPO63/TXD1/STRAP4";
+ bias-disable;
+ input-enable;
+ };
+ gpio63o_pins: gpio63o-pins {
+ pins = "GPO63/TXD1/STRAP4";
+ bias-disable;
+ output-high;
+ };
+ gpio64_pins: gpio64-pins {
+ pins = "GPIO64/FANIN0";
+ bias-disable;
+ input-enable;
+ };
+ gpio64o_pins: gpio64o-pins {
+ pins = "GPIO64/FANIN0";
+ bias-disable;
+ output-high;
+ };
+ gpio65_pins: gpio65-pins {
+ pins = "GPIO65/FANIN1";
+ bias-disable;
+ input-enable;
+ };
+ gpio66_pins: gpio66-pins {
+ pins = "GPIO66/FANIN2";
+ bias-disable;
+ input-enable;
+ };
+ gpio67_pins: gpio67-pins {
+ pins = "GPIO67/FANIN3";
+ bias-disable;
+ input-enable;
+ };
+ gpio68_pins: gpio68-pins {
+ pins = "GPIO68/FANIN4";
+ bias-disable;
+ input-enable;
+ };
+ gpio69_pins: gpio69-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ input-enable;
+ };
+ gpio69ol_pins: gpio69ol-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ output-low;
+ };
+ gpio70_pins: gpio70-pins {
+ pins = "GPIO70/FANIN6";
+ bias-disable;
+ input-enable;
+ };
+ gpio71_pins: gpio71-pins {
+ pins = "GPIO71/FANIN7";
+ bias-disable;
+ input-enable;
+ };
+ gpio72_pins: gpio72-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ input-enable;
+ };
+ gpio72ol_pins: gpio72ol-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ output-low;
+ };
+ gpio73_pins: gpio73-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ input-enable;
+ };
+ gpio73ol_pins: gpio73ol-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ output-low;
+ };
+ gpio74_pins: gpio74-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ input-enable;
+ };
+ gpio74ol_pins: gpio74ol-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ output-low;
+ };
+ gpio75_pins: gpio75-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ input-enable;
+ };
+ gpio75ol_pins: gpio75ol-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ output-low;
+ };
+ gpio76_pins: gpio76-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ input-enable;
+ };
+ gpio76ol_pins: gpio76ol-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ output-low;
+ };
+ gpio77_pins: gpio77-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ input-enable;
+ };
+ gpio77ol_pins: gpio77ol-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ output-low;
+ };
+ gpio78_pins: gpio78-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ input-enable;
+ };
+ gpio78ol_pins: gpio78ol-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ output-low;
+ };
+ gpio79_pins: gpio79-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ input-enable;
+ };
+ gpio79ol_pins: gpio79ol-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ output-low;
+ };
+ gpio80_pins: gpio80-pins {
+ pins = "GPIO80/PWM0";
+ bias-disable;
+ input-enable;
+ };
+ gpio81_pins: gpio81-pins {
+ pins = "GPIO81/PWM1";
+ bias-disable;
+ input-enable;
+ };
+ gpio82_pins: gpio82-pins {
+ pins = "GPIO82/PWM2";
+ bias-disable;
+ input-enable;
+ };
+ gpio83_pins: gpio83-pins {
+ pins = "GPIO83/PWM3";
+ bias-disable;
+ input-enable;
+ };
+ gpio84_pins: gpio84-pins {
+ pins = "GPIO84/R2TXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio84o_pins: gpio84ol-pins {
+ pins = "GPIO84/R2TXD0";
+ bias-disable;
+ output-high;
+ };
+ gpio85_pins: gpio85-pins {
+ pins = "GPIO85/R2TXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio85o_pins: gpio85o-pins {
+ pins = "GPIO85/R2TXD1";
+ bias-disable;
+ output-high;
+ };
+ gpio86_pins: gpio86-pins {
+ pins = "GPIO86/R2TXEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio86o_pins: gpio86o-pins {
+ pins = "GPIO86/R2TXEN";
+ bias-disable;
+ output-high;
+ };
+ gpio87_pins: gpio87-pins {
+ pins = "GPIO87/R2RXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio87o_pins: gpio87o-pins {
+ pins = "GPIO87/R2RXD0";
+ bias-disable;
+ output-high;
+ };
+ gpio88_pins: gpio88-pins {
+ pins = "GPIO88/R2RXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio88ol_pins: gpio88ol-pins {
+ pins = "GPIO88/R2RXD1";
+ bias-disable;
+ output-low;
+ };
+ gpio89_pins: gpio89-pins {
+ pins = "GPIO89/R2CRSDV";
+ bias-disable;
+ input-enable;
+ };
+ gpio89ol_pins: gpio89ol-pins {
+ pins = "GPIO89/R2CRSDV";
+ bias-disable;
+ output-low;
+ };
+ gpio90_pins: gpio90-pins {
+ pins = "GPIO90/R2RXERR";
+ bias-disable;
+ input-enable;
+ };
+ gpio90o_pins: gpio90o0-pins {
+ pins = "GPIO90/R2RXERR";
+ bias-disable;
+ output-high;
+ };
+ gpio90ol_pins: gpio90ol-pins {
+ pins = "GPIO90/R2RXERR";
+ bias-disable;
+ output-low;
+ };
+ gpio91_pins: gpio91-pins {
+ pins = "GPIO91/R2MDC";
+ bias-disable;
+ input-enable;
+ };
+ gpio91o_pins: gpio91o-pins {
+ pins = "GPIO91/R2MDC";
+ bias-disable;
+ output-high;
+ };
+ gpio91ol_pins: gpio91ol-pins {
+ pins = "GPIO91/R2MDC";
+ bias-disable;
+ output-low;
+ };
+ gpio92_pins: gpio92-pins {
+ pins = "GPIO92/R2MDIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio92o_pins: gpio92o-pins {
+ pins = "GPIO92/R2MDIO";
+ bias-disable;
+ output-high;
+ };
+ gpio92ol_pins: gpio92ol-pins {
+ pins = "GPIO92/R2MDIO";
+ bias-disable;
+ output-low;
+ };
+ gpio93_pins: gpio93-pins {
+ pins = "GPIO93/GA20/SMB5DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio93ol_pins: gpio93ol-pins {
+ pins = "GPIO93/GA20/SMB5DSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio94_pins: gpio94-pins {
+ pins = "GPIO94/nKBRST/SMB5DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio94o_pins: gpio94o-pins {
+ pins = "GPIO94/nKBRST/SMB5DSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio95_pins: gpio95-pins {
+ pins = "GPIO95/nLRESET/nESPIRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio96_pins: gpio96-pins {
+ pins = "GPIO96/RG1TXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio96ol_pins: gpio96ol-pins {
+ pins = "GPIO96/RG1TXD0";
+ bias-disable;
+ output-low;
+ };
+ gpio97_pins: gpio97-pins {
+ pins = "GPIO97/RG1TXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio97ol_pins: gpio97ol-pins {
+ pins = "GPIO97/RG1TXD1";
+ bias-disable;
+ output-low;
+ };
+ gpio98_pins: gpio98-pins {
+ pins = "GPIO98/RG1TXD2";
+ bias-disable;
+ input-enable;
+ };
+ gpio98ol_pins: gpio98ol-pins {
+ pins = "GPIO98/RG1TXD2";
+ bias-disable;
+ output-low;
+ };
+ gpio99_pins: gpio99-pins {
+ pins = "GPIO99/RG1TXD3";
+ bias-disable;
+ input-enable;
+ };
+ gpio99ol_pins: gpio99ol-pins {
+ pins = "GPIO99/RG1TXD3";
+ bias-disable;
+ output-low;
+ };
+ gpio100_pins: gpio100-pins {
+ pins = "GPIO100/RG1TXC";
+ bias-disable;
+ input-enable;
+ };
+ gpio100ol_pins: gpio100ol-pins {
+ pins = "GPIO100/RG1TXC";
+ bias-disable;
+ output-low;
+ };
+ gpio101_pins: gpio101-pins {
+ pins = "GPIO101/RG1TXCTL";
+ bias-disable;
+ input-enable;
+ };
+ gpio101ol_pins: gpio101ol-pins {
+ pins = "GPIO101/RG1TXCTL";
+ bias-disable;
+ output-low;
+ };
+ gpio102_pins: gpio102-pins {
+ pins = "GPIO102/RG1RXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio102ol_pins: gpio102ol-pins {
+ pins = "GPIO102/RG1RXD0";
+ bias-disable;
+ output-low;
+ };
+ gpio103_pins: gpio103-pins {
+ pins = "GPIO103/RG1RXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio103ol_pins: gpio103ol-pins {
+ pins = "GPIO103/RG1RXD1";
+ bias-disable;
+ output-low;
+ };
+ gpio104_pins: gpio104-pins {
+ pins = "GPIO104/RG1RXD2";
+ bias-disable;
+ input-enable;
+ };
+ gpio104ol_pins: gpio104ol-pins {
+ pins = "GPIO104/RG1RXD2";
+ bias-disable;
+ output-low;
+ };
+ gpio105_pins: gpio105-pins {
+ pins = "GPIO105/RG1RXD3";
+ bias-disable;
+ input-enable;
+ };
+ gpio105ol_pins: gpio105ol-pins {
+ pins = "GPIO105/RG1RXD3";
+ bias-disable;
+ output-low;
+ };
+ gpio106_pins: gpio106-pins {
+ pins = "GPIO106/RG1RXC";
+ bias-disable;
+ input-enable;
+ };
+ gpio106ol_pins: gpio106ol-pins {
+ pins = "GPIO106/RG1RXC";
+ bias-disable;
+ output-low;
+ };
+ gpio107_pins: gpio107-pins {
+ pins = "GPIO107/RG1RXCTL";
+ bias-disable;
+ input-enable;
+ };
+ gpio107ol_pins: gpio107ol-pins {
+ pins = "GPIO107/RG1RXCTL";
+ bias-disable;
+ output-low;
+ };
+ gpio108_pins: gpio108-pins {
+ pins = "GPIO108/RG1MDC";
+ bias-disable;
+ input-enable;
+ };
+ gpio108ol_pins: gpio108ol-pins {
+ pins = "GPIO108/RG1MDC";
+ bias-disable;
+ output-low;
+ };
+ gpio109_pins: gpio109-pins {
+ pins = "GPIO109/RG1MDIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio109ol_pins: gpio109ol-pins {
+ pins = "GPIO109/RG1MDIO";
+ bias-disable;
+ output-low;
+ };
+ gpio110_pins: gpio110-pins {
+ pins = "GPIO110/RG2TXD0/DDRV0";
+ bias-disable;
+ input-enable;
+ };
+ gpio110ol_pins: gpio110ol-pins {
+ pins = "GPIO110/RG2TXD0/DDRV0";
+ bias-disable;
+ output-low;
+ };
+ gpio111_pins: gpio111-pins {
+ pins = "GPIO111/RG2TXD1/DDRV1";
+ bias-disable;
+ input-enable;
+ };
+ gpio111ol_pins: gpio111ol-pins {
+ pins = "GPIO111/RG2TXD1/DDRV1";
+ bias-disable;
+ output-low;
+ };
+ gpio112_pins: gpio112-pins {
+ pins = "GPIO112/RG2TXD2/DDRV2";
+ bias-disable;
+ input-enable;
+ };
+ gpio112ol_pins: gpio112ol-pins {
+ pins = "GPIO112/RG2TXD2/DDRV2";
+ bias-disable;
+ output-low;
+ };
+ gpio113_pins: gpio113-pins {
+ pins = "GPIO113/RG2TXD3/DDRV3";
+ bias-disable;
+ input-enable;
+ };
+ gpio113ol_pins: gpio113ol-pins {
+ pins = "GPIO113/RG2TXD3/DDRV3";
+ bias-disable;
+ output-low;
+ };
+ gpio118_pins: gpio118-pins {
+ pins = "GPIO118/SMB2SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio119_pins: gpio119-pins {
+ pins = "GPIO119/SMB2SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio120_pins: gpio120-pins {
+ pins = "GPIO120/SMB2CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio121_pins: gpio121-pins {
+ pins = "GPIO121/SMB2CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio122_pins: gpio122-pins {
+ pins = "GPIO122/SMB2BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio123_pins: gpio123-pins {
+ pins = "GPIO123/SMB2BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio123_pins: gpio123-pins {
+ pins = "GPIO123/SMB2BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio124_pins: gpio124-pins {
+ pins = "GPIO124/SMB1CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio125_pins: gpio125-pins {
+ pins = "GPIO125/SMB1CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio126_pins: gpio126-pins {
+ pins = "GPIO126/SMB1BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio127_pins: gpio127-pins {
+ pins = "GPIO127/SMB1BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio128o_pins: gpio128o-pins {
+ pins = "GPIO128/SMB8SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio130_pins: gpio130-pins {
+ pins = "GPIO130/SMB9SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio131_pins: gpio131-pins {
+ pins = "GPIO131/SMB9SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio132o_pins: gpio132o-pins {
+ pins = "GPIO132/SMB10SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio133_pins: gpio133-pins {
+ pins = "GPIO133/SMB10SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio134_pins: gpio134-pins {
+ pins = "GPIO134/SMB11SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio135_pins: gpio135-pins {
+ pins = "GPIO135/SMB11SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio136_pins: gpio136-pins {
+ pins = "GPIO136/SD1DT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio136o_pins: gpio136o-pins {
+ pins = "GPIO136/SD1DT0";
+ bias-disable;
+ output-high;
+ };
+ gpio137_pins: gpio137-pins {
+ pins = "GPIO137/SD1DT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio137o_pins: gpio137o-pins {
+ pins = "GPIO137/SD1DT1";
+ bias-disable;
+ output-high;
+ };
+ gpio138_pins: gpio138-pins {
+ pins = "GPIO138/SD1DT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio138o_pins: gpio138o-pins {
+ pins = "GPIO138/SD1DT2";
+ bias-disable;
+ output-high;
+ };
+ gpio139_pins: gpio139-pins {
+ pins = "GPIO139/SD1DT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio139o_pins: gpio139o-pins {
+ pins = "GPIO139/SD1DT3";
+ bias-disable;
+ output-high;
+ };
+ gpio140_pins: gpio140-pins {
+ pins = "GPIO140/SD1CLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio140o_pins: gpio140o-pins {
+ pins = "GPIO140/SD1CLK";
+ bias-disable;
+ output-high;
+ };
+ gpio141_pins: gpio141-pins {
+ pins = "GPIO141/SD1WP";
+ bias-disable;
+ input-enable;
+ };
+ gpio141o_pins: gpio141o-pins {
+ pins = "GPIO141/SD1WP";
+ bias-disable;
+ output-high;
+ };
+ gpio142_pins: gpio142-pins {
+ pins = "GPIO142/SD1CMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio142o_pins: gpio142o-pins {
+ pins = "GPIO142/SD1CMD";
+ bias-disable;
+ output-high;
+ };
+ gpio143_pins: gpio143-pins {
+ pins = "GPIO143/SD1CD/SD1PWR";
+ bias-disable;
+ input-enable;
+ };
+ gpio143o_pins: gpio143o-pins {
+ pins = "GPIO143/SD1CD/SD1PWR";
+ bias-disable;
+ output-high;
+ };
+ gpio143ol_pins: gpio143ol-pins {
+ pins = "GPIO143/SD1CD/SD1PWR";
+ bias-disable;
+ output-low;
+ };
+ gpio144_pins: gpio144-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ };
+ gpio145_pins: gpio145-pins {
+ pins = "GPIO145/PWM5";
+ bias-disable;
+ input-enable;
+ };
+ gpio146_pins: gpio146-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ };
+ gpio147_pins: gpio147-pins {
+ pins = "GPIO147/PWM7";
+ bias-disable;
+ input-enable;
+ };
+ gpio148_pins: gpio148-pins {
+ pins = "GPIO148/MMCDT4";
+ bias-disable;
+ input-enable;
+ };
+ gpio148o_pins: gpio148o-pins {
+ pins = "GPIO148/MMCDT4";
+ bias-disable;
+ output-high;
+ };
+ gpio148ol_pins: gpio148ol_pins {
+ pins = "GPIO148/MMCDT4";
+ bias-disable;
+ output-low;
+ };
+ gpio149_pins: gpio149-pins {
+ pins = "GPIO149/MMCDT5";
+ bias-disable;
+ input-enable;
+ };
+ gpio149o_pins: gpio149o-pins {
+ pins = "GPIO149/MMCDT5";
+ bias-disable;
+ output-high;
+ };
+ gpio149ol_pins: gpio149ol-pins {
+ pins = "GPIO149/MMCDT5";
+ bias-disable;
+ output-low;
+ };
+ gpio150_pins: gpio150-pins {
+ pins = "GPIO150/MMCDT6";
+ bias-disable;
+ input-enable;
+ };
+ gpio150o_pins: gpio150o-pins {
+ pins = "GPIO150/MMCDT6";
+ bias-disable;
+ output-high;
+ };
+ gpio150ol_pins: gpio150ol-pins {
+ pins = "GPIO150/MMCDT6";
+ bias-disable;
+ output-low;
+ };
+ gpio151_pins: gpio151-pins {
+ pins = "GPIO151/MMCDT7";
+ bias-disable;
+ input-enable;
+ };
+ gpio151o_pins: gpio151o-pins {
+ pins = "GPIO151/MMCDT7";
+ bias-disable;
+ output-high;
+ };
+ gpio151ol_pins: gpio151ol-pins {
+ pins = "GPIO151/MMCDT7";
+ bias-disable;
+ output-low;
+ };
+ gpio152_pins: gpio152-pins {
+ pins = "GPIO152/MMCCLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio152o_pins: gpio152o-pins {
+ pins = "GPIO152/MMCCLK";
+ bias-disable;
+ output-high;
+ };
+ gpio152ol_pins: gpio152ol-pins {
+ pins = "GPIO152/MMCCLK";
+ bias-disable;
+ output-low;
+ };
+ gpio153_pins: gpio153-pins {
+ pins = "GPIO153/MMCWP";
+ bias-disable;
+ input-enable;
+ };
+ gpio153ol_pins: gpio153ol-pins {
+ pins = "GPIO153/MMCWP";
+ bias-disable;
+ output-low;
+ };
+ gpio154_pins: gpio154-pins {
+ pins = "GPIO154/MMCCMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio154ol_pins: gpio154ol-pins {
+ pins = "GPIO154/MMCCMD";
+ bias-disable;
+ output-low;
+ };
+ gpio155_pins: gpio155-pins {
+ pins = "GPIO155/nMMCCD/nMMCRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio155ol_pins: gpio155ol-pins {
+ pins = "GPIO155/nMMCCD/nMMCRST";
+ bias-disable;
+ output-low;
+ };
+ gpio156_pins: gpio156-pins {
+ pins = "GPIO156/MMCDT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio156ol_pins: gpio156ol-pins {
+ pins = "GPIO156/MMCDT0";
+ bias-disable;
+ output-low;
+ };
+ gpio157_pins: gpio157-pins {
+ pins = "GPIO157/MMCDT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio157o_pins: gpio157o-pins {
+ pins = "GPIO157/MMCDT1";
+ bias-disable;
+ output-high;
+ };
+ gpio157ol_pins: gpio157ol-pins {
+ pins = "GPIO157/MMCDT1";
+ bias-disable;
+ output-low;
+ };
+ gpio158_pins: gpio158-pins {
+ pins = "GPIO158/MMCDT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio158o_pins: gpio158o-pins {
+ pins = "GPIO158/MMCDT2";
+ bias-disable;
+ output-high;
+ };
+ gpio158ol_pins: gpio158ol-pins {
+ pins = "GPIO158/MMCDT2";
+ bias-disable;
+ output-low;
+ };
+ gpio159_pins: gpio159-pins {
+ pins = "GPIO159/MMCDT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio159o_pins: gpio159o-pins {
+ pins = "GPIO159/MMCDT3";
+ bias-disable;
+ output-high;
+ };
+ gpio159ol_pins: gpio159ol-pins {
+ pins = "GPIO159/MMCDT3";
+ bias-disable;
+ output-low;
+ };
+ gpio160_pins: gpio160-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT";
+ bias-disable;
+ input-enable;
+ };
+ gpio160o_pins: gpio160o-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT";
+ bias-disable;
+ output-high;
+ };
+ gpio160ol_pins: gpio160ol-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT";
+ bias-disable;
+ output-low;
+ };
+ gpio161_pins: gpio161-pins {
+ pins = "GPIO161/nLFRAME/nESPICS";
+ bias-disable;
+ input-enable;
+ };
+ gpio162_pins: gpio162-pins {
+ pins = "GPIO162/SERIRQ";
+ bias-disable;
+ input-enable;
+ };
+ gpio163_pins: gpio163-pins {
+ pins = "GPIO163/LCLK/ESPICLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio164_pins: gpio164-pins {
+ pins = "GPIO164/LAD0/ESPI_IO0";
+ bias-disable;
+ input-enable;
+ };
+ gpio165_pins: gpio165-pins {
+ pins = "GPIO165/LAD1/ESPI_IO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio166_pins: gpio166-pins {
+ pins = "GPIO166/LAD2/ESPI_IO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio167_pins: gpio167-pins {
+ pins = "GPIO167/LAD3/ESPI_IO3";
+ bias-disable;
+ input-enable;
+ };
+ gpio168_pins: gpio168-pins {
+ pins = "GPIO168/nCLKRUN/nESPIALERT";
+ bias-disable;
+ input-enable;
+ };
+ gpio168ol_pins: gpio168ol-pins {
+ pins = "GPIO168/nCLKRUN/nESPIALERT";
+ bias-disable;
+ output-low;
+ };
+ gpio169_pins: gpio169-pins {
+ pins = "GPIO169/nSCIPME";
+ bias-disable;
+ input-enable;
+ };
+ gpio169o_pins: gpio169o-pins {
+ pins = "GPIO169/nSCIPME";
+ bias-disable;
+ output-high;
+ };
+ gpio169ol_pins: gpio169ol-pins {
+ pins = "GPIO169/nSCIPME";
+ bias-disable;
+ output-low;
+ };
+ gpio170_pins: gpio170-pins {
+ pins = "GPIO170/nSMI";
+ bias-disable;
+ input-enable;
+ };
+ gpio170ol_pins: gpio170ol-pins {
+ pins = "GPIO170/nSMI";
+ bias-disable;
+ output-low;
+ };
+ gpio173o_pins: gpio173o-pins {
+ pins = "GPIO173/SMB7SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio173ol_pins: gpio173ol-pins {
+ pins = "GPIO173/SMB7SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio174_pins: gpio174-pins {
+ pins = "GPIO174/SMB7SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio175_pins: gpio175-pins {
+ pins = "GPIO175/PSPI1CK/FANIN19";
+ bias-disable;
+ input-enable;
+ };
+ gpio175o_pins: gpio175o-pins {
+ pins = "GPIO175/PSPI1CK/FANIN19";
+ bias-disable;
+ output-high;
+ };
+ gpio175ol_pins: gpio175ol-pins {
+ pins = "GPIO175/PSPI1CK/FANIN19";
+ bias-disable;
+ output-low;
+ };
+ gpio176_pins: gpio176-pins {
+ pins = "GPIO176/PSPI1DO/FANIN18";
+ bias-disable;
+ input-enable;
+ };
+ gpio176o_pins: gpio176o-pins {
+ pins = "GPIO176/PSPI1DO/FANIN18";
+ bias-disable;
+ output-high;
+ };
+ gpio176ol_pins: gpio176ol-pins {
+ pins = "GPIO176/PSPI1DO/FANIN18";
+ bias-disable;
+ output-low;
+ };
+ gpio177_pins: gpio177-pins {
+ pins = "GPIO177/PSPI1DI/FANIN17";
+ bias-disable;
+ input-enable;
+ };
+ gpio177o_pins: gpio177o-pins {
+ pins = "GPIO177/PSPI1DI/FANIN17";
+ bias-disable;
+ output-high;
+ };
+ gpio177ol_pins: gpio177ol-pins {
+ pins = "GPIO177/PSPI1DI/FANIN17";
+ bias-disable;
+ output-low;
+ };
+ gpio187_pins: gpio187-pins {
+ pins = "GPIO187/nSPI3CS1";
+ bias-disable;
+ input-enable;
+ };
+ gpio187o_pins: gpio187o-pins {
+ pins = "GPIO187/nSPI3CS1";
+ bias-disable;
+ output-high;
+ };
+ gpio187ol_pins: gpio187ol-pins {
+ pins = "GPIO187/nSPI3CS1";
+ bias-disable;
+ output-low;
+ };
+ gpio188_pins: gpio188-pins {
+ pins = "GPIO188/SPI3D2/nSPI3CS2";
+ bias-disable;
+ input-enable;
+ };
+ gpio188o_pins: gpio188o-pins {
+ pins = "GPIO188/SPI3D2/nSPI3CS2";
+ bias-disable;
+ output-high;
+ };
+ gpio189o_pins: gpio189o-pins {
+ pins = "GPIO189/SPI3D3/nSPI3CS3";
+ bias-disable;
+ output-high;
+ };
+ gpio190_pins: gpio190-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ input-enable;
+ };
+ gpio190o_pins: gpio190o-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ output-high;
+ };
+ gpio190ol_pins: gpio190ol-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ output-low;
+ };
+ gpio191o_pins: gpio191o-pins {
+ pins = "GPIO191";
+ bias-disable;
+ output-high;
+ };
+ gpio191ol_pins: gpio191ol-pins {
+ pins = "GPIO191";
+ bias-disable;
+ output-low;
+ };
+ gpio192_pins: gpio192-pins {
+ pins = "GPIO192";
+ bias-disable;
+ input-enable;
+ };
+ gpio192o_pins: gpio192o-pins {
+ pins = "GPIO192";
+ bias-disable;
+ output-high;
+ };
+ gpio192ol_pins: gpio192ol-pins {
+ pins = "GPIO192";
+ bias-disable;
+ output-low;
+ };
+ gpio194_pins: gpio194-pins {
+ pins = "GPIO194/SMB0BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio194o_pins: gpio194o-pins {
+ pins = "GPIO194/SMB0BSCL";
+ bias-disable;
+ output-high;
+ };
+ gpio195_pins: gpio195-pins {
+ pins = "GPIO195/SMB0BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio196_pins: gpio196-pins {
+ pins = "GPIO196/SMB0CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio197_pins: gpio197-pins {
+ pins = "GPIO197/SMB0DEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio197o_pins: gpio197o-pins {
+ pins = "GPIO197/SMB0DEN";
+ bias-disable;
+ output-high;
+ };
+ gpio197ol_pins: gpio197ol-pins {
+ pins = "GPIO197/SMB0DEN";
+ bias-disable;
+ output-low;
+ };
+ gpio198o_pins: gpio198o-pins {
+ pins = "GPIO198/SMB0DSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio198ol_pins: gpio198ol-pins {
+ pins = "GPIO198/SMB0DSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio199_pins: gpio199-pins {
+ pins = "GPIO199/SMB0DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio200_pins: gpio200-pins {
+ pins = "GPIO200/R2CK";
+ input-enable;
+ bias-disable;
+ };
+ gpio200ol_pins: gpio200ol-pins {
+ pins = "GPIO200/R2CK";
+ bias-disable;
+ output-low;
+ };
+ gpio201ol_pins: gpio201ol-pins {
+ pins = "GPIO200/R2CK";
+ bias-disable;
+ output-low;
+ };
+ gpio202_pins: gpio202-pins {
+ pins = "GPIO202/SMB0CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio203_pins: gpio203-pins {
+ pins = "GPIO203/FANIN16";
+ bias-disable;
+ input-enable;
+ };
+ gpio203o_pins: gpio203o-pins {
+ pins = "GPIO203/FANIN16";
+ bias-disable;
+ output-high;
+ };
+ gpio203ol_pins: gpio203ol-pins {
+ pins = "GPIO203/FANIN16";
+ bias-disable;
+ output-low;
+ };
+ gpio204_pins: gpio204-pins {
+ pins = "GPIO204/DDC2SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio204o_pins: gpio204o-pins {
+ pins = "GPIO204/DDC2SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio204ol_pins: gpio204ol-pins {
+ pins = "GPIO204/DDC2SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio205_pins: gpio205-pins {
+ pins = "GPIO205/DDC2SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio205o_pins: gpio205o-pins {
+ pins = "GPIO205/DDC2SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio205ol_pins: gpio205ol-pins {
+ pins = "GPIO205/DDC2SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio206_pins: gpio206-pins {
+ pins = "GPIO206/HSYNC2";
+ bias-disable;
+ input-enable;
+ };
+ gpio206o_pins: gpio206o-pins {
+ pins = "GPIO206/HSYNC2";
+ bias-disable;
+ output-high;
+ };
+ gpio206ol_pins: gpio206ol-pins {
+ pins = "GPIO206/HSYNC2";
+ bias-disable;
+ output-low;
+ };
+ gpio207_pins: gpio207-pins {
+ pins = "GPIO207/VSYNC2";
+ bias-disable;
+ input-enable;
+ };
+ gpio207o_pins: gpio207o-pins {
+ pins = "GPIO207/VSYNC2";
+ bias-disable;
+ output-high;
+ };
+ gpio207ol_pins: gpio207ol-pins {
+ pins = "GPIO207/VSYNC2";
+ bias-disable;
+ output-low;
+ };
+ gpio208_pins: gpio208-pins {
+ pins = "GPIO208/RG2TXC/DVCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio208o_pins: gpio208o-pins {
+ pins = "GPIO208/RG2TXC/DVCK";
+ bias-disable;
+ output-high;
+ };
+ gpio208ol_pins: gpio208ol-pins {
+ pins = "GPIO208/RG2TXC/DVCK";
+ bias-disable;
+ output-low;
+ };
+ gpio209_pins: gpio209-pins {
+ pins = "GPIO209/RG2TXCTL/DDRV4";
+ bias-disable;
+ input-enable;
+ };
+ gpio209ol_pins: gpio209ol-pins {
+ pins = "GPIO209/RG2TXCTL/DDRV4";
+ bias-disable;
+ output-low;
+ };
+ gpio210_pins: gpio210-pins {
+ pins = "GPIO210/RG2RXD0/DDRV5";
+ bias-disable;
+ input-enable;
+ };
+ gpio210o_pins: gpio210o-pins {
+ pins = "GPIO210/RG2RXD0/DDRV5";
+ bias-disable;
+ output-high;
+ };
+ gpio210ol_pins: gpio210ol-pins {
+ pins = "GPIO210/RG2RXD0/DDRV5";
+ bias-disable;
+ output-low;
+ };
+ gpio211_pins: gpio211-pins {
+ pins = "GPIO211/RG2RXD1/DDRV6";
+ bias-disable;
+ input-enable;
+ };
+ gpio211o_pins: gpio211o-pins {
+ pins = "GPIO211/RG2RXD1/DDRV6";
+ bias-disable;
+ output-high;
+ };
+ gpio211ol_pins: gpio211ol-pins {
+ pins = "GPIO211/RG2RXD1/DDRV6";
+ bias-disable;
+ output-low;
+ };
+ gpio212_pins: gpio212-pins {
+ pins = "GPIO212/RG2RXD2/DDRV7";
+ bias-disable;
+ input-enable;
+ };
+ gpio212o_pins: gpio212o-pins {
+ pins = "GPIO212/RG2RXD2/DDRV7";
+ bias-disable;
+ output-high;
+ };
+ gpio212ol_pins: gpio212ol-pins {
+ pins = "GPIO212/RG2RXD2/DDRV7";
+ bias-disable;
+ output-low;
+ };
+ gpio213_pins: gpio213-pins {
+ pins = "GPIO213/RG2RXD3/DDRV8";
+ bias-disable;
+ input-enable;
+ };
+ gpio213o_pins: gpio213o-pins {
+ pins = "GPIO213/RG2RXD3/DDRV8";
+ bias-disable;
+ output-high;
+ };
+ gpio213ol_pins: gpio213ol-pins {
+ pins = "GPIO213/RG2RXD3/DDRV8";
+ bias-disable;
+ output-low;
+ };
+ gpio214_pins: gpio214-pins {
+ pins = "GPIO214/RG2RXC/DDRV9";
+ bias-disable;
+ input-enable;
+ };
+ gpio214ol_pins: gpio214ol-pins {
+ pins = "GPIO214/RG2RXC/DDRV9";
+ bias-disable;
+ output-low;
+ };
+ gpio215_pins: gpio215-pins {
+ pins = "GPIO215/RG2RXCTL/DDRV10";
+ bias-disable;
+ input-enable;
+ };
+ gpio215ol_pins: gpio215ol-pins {
+ pins = "GPIO215/RG2RXCTL/DDRV10";
+ bias-disable;
+ output-low;
+ };
+ gpio216_pins: gpio216-pins {
+ pins = "GPIO216/RG2MDC/DDRV11";
+ bias-disable;
+ input-enable;
+ };
+ gpio216ol_pins: gpio216ol-pins {
+ pins = "GPIO216/RG2MDC/DDRV11";
+ bias-disable;
+ output-low;
+ };
+ gpio217_pins: gpio217-pins {
+ pins = "GPIO217/RG2MDIO/DVHSYNC";
+ bias-disable;
+ input-enable;
+ };
+ gpio217ol_pins: gpio217ol-pins {
+ pins = "GPIO217/RG2MDIO/DVHSYNC";
+ bias-disable;
+ output-low;
+ };
+ gpio218_pins: gpio218-pins {
+ pins = "GPIO218/nWDO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio218ol_pins: gpio218ol-pins {
+ pins = "GPIO218/nWDO1";
+ bias-disable;
+ output-low;
+ };
+ gpio219_pins: gpio219-pins {
+ pins = "GPIO219/nWDO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio219ol_pins: gpio219ol-pins {
+ pins = "GPIO219/nWDO2";
+ bias-disable;
+ output-low;
+ };
+ gpio220ol_pins: gpio220ol-pins {
+ pins = "GPIO220/SMB12SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio221o_pins: gpio221o-pins {
+ pins = "GPIO221/SMB12SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio222_pins: gpio222-pins {
+ pins = "GPIO222/SMB13SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio222o_pins: gpio222o-pins {
+ pins = "GPIO222/SMB13SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio223_pins: gpio223-pins {
+ pins = "GPIO223/SMB13SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio223ol_pins: gpio223ol-pins {
+ pins = "GPIO223/SMB13SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio224_pins: gpio224-pins {
+ pins = "GPIO224/SPIXCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio224o_pins: gpio224o-pins {
+ pins = "GPIO224/SPIXCK";
+ bias-disable;
+ output-high;
+ };
+ gpio224ol_pins: gpio224ol-pins {
+ pins = "GPIO224/SPIXCK";
+ bias-disable;
+ output-low;
+ };
+ gpio225_pins: gpio225-pins {
+ pins = "GPO225/SPIXD0/STRAP12";
+ bias-disable;
+ input-enable;
+ };
+ gpio225o_pins: gpio225o-pins {
+ pins = "GPO225/SPIXD0/STRAP12";
+ bias-disable;
+ output-high;
+ };
+ gpio226_pins: gpio226-pins {
+ pins = "GPO226/SPIXD1/STRAP13";
+ bias-disable;
+ input-enable;
+ };
+ gpio226o_pins: gpio226o-pins {
+ pins = "GPO226/SPIXD1/STRAP13";
+ bias-disable;
+ output-high;
+ };
+ gpio227_pins: gpio227-pins {
+ pins = "GPIO227/nSPIXCS0";
+ bias-disable;
+ input-enable;
+ };
+ gpio227o_pins: gpio227o-pins {
+ pins = "GPIO227/nSPIXCS0";
+ bias-disable;
+ output-high;
+ };
+ gpio227ol_pins: gpio227ol-pins {
+ pins = "GPIO227/nSPIXCS0";
+ bias-disable;
+ output-low;
+ };
+ gpio228_pins: gpio228-pins {
+ pins = "GPIO228/nSPIXCS1";
+ bias-disable;
+ input-enable;
+ };
+ gpio228ol_pins: gpio228ol-pins {
+ pins = "GPIO228/nSPIXCS1";
+ bias-disable;
+ output-low;
+ };
+ gpio229_pins: gpio229-pins {
+ pins = "GPO229/SPIXD2/STRAP3";
+ bias-disable;
+ input-enable;
+ };
+ gpio229o_pins: gpio229o-pins {
+ pins = "GPO229/SPIXD2/STRAP3";
+ bias-disable;
+ output-high;
+ };
+ gpio230_pins: gpio230-pins {
+ pins = "GPIO230/SPIXD3";
+ bias-disable;
+ input-enable;
+ };
+ gpio230o_pins: gpio230o-pins {
+ pins = "GPIO230/SPIXD3";
+ bias-disable;
+ output-high;
+ };
+ gpio230ol_pins: gpio230ol-pins {
+ pins = "GPIO230/SPIXD3";
+ bias-disable;
+ output-low;
+ };
+ gpio231_pins: gpio231-pins {
+ pins = "GPIO231/nCLKREQ";
+ bias-disable;
+ input-enable;
+ };
+ gpio231o_pins: gpio231o-pins {
+ pins = "GPIO231/nCLKREQ";
+ bias-disable;
+ output-high;
+ };
+ gpio255_pins: gpio255-pins {
+ pins = "GPI255/DACOSEL";
+ bias-disable;
+ input-enable;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
index 6ac340533587..421a4ed54bad 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
@@ -3,6 +3,7 @@
// Copyright 2018 Google, Inc.
#include "nuvoton-common-npcm7xx.dtsi"
+#include "nuvoton-npcm750-gpio.dtsi"
/ {
#address-cells = <1>;
@@ -17,7 +18,7 @@
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
- clocks = <&clk 0>;
+ clocks = <&clk NPCM7XX_CLK_CPU>;
clock-names = "clk_cpu";
reg = <0>;
next-level-cache = <&l2>;
@@ -26,19 +27,152 @@
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
- clocks = <&clk 0>;
+ clocks = <&clk NPCM7XX_CLK_CPU>;
clock-names = "clk_cpu";
reg = <1>;
next-level-cache = <&l2>;
};
};
+
soc {
timer@3fe600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x3fe600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ };
+ };
+
+
+ ahb {
+ gmac1: eth@f0804000 {
+ device_type = "network";
+ compatible = "snps,dwmac";
+ reg = <0xf0804000 0x2000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ ethernet = <1>;
+ clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "stmmaceth", "clk_gmac";
+ pinctrl-names = "default";
+ /*pinctrl-0 = <&rg2_pins
+ &rg2mdio_pins>;*/
+ status = "disabled";
+ };
+
+ emc1: eth@f0826000 {
+ device_type = "network";
+ compatible = "nuvoton,npcm750-emc";
+ reg = <0xf0826000 0x1000>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_emc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&r2_pins
+ &r2err_pins
+ &r2md_pins>;
+ };
+
+ udc0:udc@f0830000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0830000 0x1000
+ 0xfffd0000 0x800>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc1:udc@f0831000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0831000 0x1000
+ 0xfffd0800 0x800>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc2:udc@f0832000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0832000 0x1000
+ 0xfffd1000 0x800>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc3:udc@f0833000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0833000 0x1000
+ 0xfffd1800 0x800>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc4:udc@f0834000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0834000 0x1000
+ 0xfffd2000 0x800>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc5:udc@f0835000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0835000 0x1000
+ 0xfffd2800 0x800>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc6:udc@f0836000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0836000 0x1000
+ 0xfffd3000 0x800>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc7:udc@f0837000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0837000 0x1000
+ 0xfffd3800 0x800>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc8:udc@f0838000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0838000 0x1000
+ 0xfffd4000 0x800>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ };
+
+ udc9:udc@f0839000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0839000 0x1000
+ 0xfffd4800 0x800>;
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
};
};
};
--
2.14.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-12 12:05 ` Tomer Maimon
@ 2018-12-12 23:22 ` Joel Stanley
2018-12-13 0:56 ` Joel Stanley
0 siblings, 1 reply; 14+ messages in thread
From: Joel Stanley @ 2018-12-12 23:22 UTC (permalink / raw)
To: Tomer Maimon; +Cc: OpenBMC Maillist
Hi Tomer,
On Wed, 12 Dec 2018 at 22:29, Tomer Maimon <tmaimon77@gmail.com> wrote:
> First, I like to apologize that there is many patches of NPCM to add, so it look quite messy...
That's fine. The NPCM team has done a good job of incrementally
upstreaming their work, and I'm sure you will continue this progress
next year.
A note for next time: turn off the HTML email for the mailing list please.
> · PCI Mailbox patches - The PCI mail box will not upstream, because it not build with the mailbox driver interface,
> but still OpenBMC have an application to use the miscellaneous mailbox but still OpenBMC have an application
> to use the miscellaneous mailbox.
I think we had a similar issue when attempting to upstream the ASPEED
LPC mailbox driver. The kernel has a driver model called "mailbox",
and so the reviewers assumed the hardware should use that. However it
does not fit the hardware or use case at all. We should work out a
common solution here.
> · ETHERNET MAC CONTROLLER (EMC) patches – the patches is on final stage of upstream work, but it is very important to us that the patches will
> add now because costumer requests that are using the OpenBMC linux.
Is this the driver that Ben offered to help rework? I strongly suggest
re-starting the conversation with him. He is very experienced with the
network stack, and will be able to help get the driver in shape for
upstream, and make it efficient.
I'll take a look at the patches below today.
Cheers,
Joel
> Commit upstream to kernel 4.20
>
>
>
> hwmon: (npcm-750-pwm-fan) Change initial pwm target to 255
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f21c8e753b1dcb8f9e5b096db1f7f4e6fdfa7258
>
>
>
> Commits will upstream to kernel 4.21
>
>
>
> dt-binding: spi: add NPCM PSPI controller documentation
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=4ad26864df53b265976c4a3ae61b1e6cad92fe40
>
>
>
> spi: npcm: add NPCM PSPI controller driver
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=2a22f1b30cee8d1e104a6c5062a609bedbfd5c39
>
>
>
> spi: npcm: fix u32 csgpio being checked for less than zero
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=757ec116c9bce4278fa4423039736c832cc63b6f
>
>
>
> spi: npcm: fix platform_no_drv_owner.cocci warnings
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=7986e2273c1ed987ff34f1c318d5a2b18e8c0fee
>
>
>
> spi: npcm: Fix an error code in the probe function
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=428f977a6a6b43154928571b01fa8415c11a9244
>
>
>
> spi: npcm: Fix uninitialized variable warning
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1d2319efb6a970d5f5740a60828244e6c309df2b
>
>
>
> spi: npcm: Modify pspi send function
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1fa33be36cfc8908be951ed56113906f422add50
>
>
>
> spi: Update NPCM PSPI controller documentation
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=6ab4a3502923c20c5a6921868e787e5fd033409b
>
>
>
> pinctrl: nuvoton: modify NPCM7xx pin configuration function
>
> https://git.linaro.org/people/linus.walleij/linux-pinctrl.git/commit/?h=for-next&id=67b249aaa650a461c86484e6c365f33887f0968a
>
>
>
> watchdog: npcm: Modify npcm watchdog kconfig arch parameter
>
> https://kernel.googlesource.com/pub/scm/linux/kernel/git/groeck/linux-staging/+/4181f4a55838db15deaed315b11bfab395be0a17
>
>
>
> Commits on upstream process
>
>
>
> dt-binding: mtd: add NPCM FIU controller
>
> https://github.com/Nuvoton-Israel/linux/commit/f13c82dca3ca21175eb71223156d5c525c18dd74
>
>
>
> mtd: spi-nor: add NPCM FIU controller driver
>
> https://github.com/Nuvoton-Israel/linux/commit/747809a0082dbeaaa6b786842c5c5eaffa519561
>
>
>
> dt-bindings: i2c: npcm7xx: add binding for i2c controller
>
> https://github.com/Nuvoton-Israel/linux/commit/07be53b47443fcab645f0e67c03e3912387ff9a7
>
>
>
> i2c: npcm: driver for Poleg i2c controller
>
> https://github.com/Nuvoton-Israel/linux/commit/3a7f3375024461d3db17a78cb7d83dafcc2dbc6c
>
>
>
> dt-binding: bmc: Add NPCM7xx LPC BPC documentation
>
> https://github.com/Nuvoton-Israel/linux/commit/e8b6cc1c31e744b3fd5630d790af65ac38b2c24d#diff-e7386aa740d12baf8cdc2a0ab8e5347c
>
>
>
> misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
>
> https://github.com/Nuvoton-Israel/linux/commit/adee227ac24431cd033f1c44b63d5a244a0bdd3b#diff-7081e24727d8058bcc6ebf20230f5403
>
>
>
> misc: bpc: modify remove function in npcm7xx bpc driver
>
> https://github.com/Nuvoton-Israel/linux/commit/1c5268f9b17f9333ee2fb245f84729beebb66a9c#diff-7081e24727d8058bcc6ebf20230f5403
>
>
>
> PCI mail box commits
>
>
>
> dt-binding: bmc: add npcm7xx pci mailbox document
>
> https://github.com/Nuvoton-Israel/linux/commit/7da4f41849aef11b1a9a6e05773545f181246496
>
>
>
> misc: mbox: add npcm7xx pci mailbox driver
>
> https://github.com/Nuvoton-Israel/linux/commit/c3d5d2bab5ad216e6c0debabf50ad8365f2301d1
>
>
>
> EMC net commits
>
>
>
> net: npcm: add NPCM7xx Ethernet MAC controller
>
> https://github.com/Nuvoton-Israel/linux/commit/6a9407ed142ff2c205d732d4d3477a8e9f7d950b
>
>
>
> dt-binding: net: document NPCM7xx EMC DT bindings
>
> https://github.com/Nuvoton-Israel/linux/commit/66478b88409dba415a7bb008ce833afa3957fb2d
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-12 23:22 ` Joel Stanley
@ 2018-12-13 0:56 ` Joel Stanley
2018-12-13 7:30 ` Avi.Fishman
2018-12-16 14:44 ` Tomer Maimon
0 siblings, 2 replies; 14+ messages in thread
From: Joel Stanley @ 2018-12-13 0:56 UTC (permalink / raw)
To: Tomer Maimon; +Cc: OpenBMC Maillist
> > Commit upstream to kernel 4.20
> > hwmon: (npcm-750-pwm-fan) Change initial pwm target to 255
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f21c8e753b1dcb8f9e5b096db1f7f4e6fdfa7258
Done.
> > Commits will upstream to kernel 4.21
> >
> > dt-binding: spi: add NPCM PSPI controller documentation
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=4ad26864df53b265976c4a3ae61b1e6cad92fe40
> >
> > spi: npcm: add NPCM PSPI controller driver
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=2a22f1b30cee8d1e104a6c5062a609bedbfd5c39
> >
> > spi: npcm: fix u32 csgpio being checked for less than zero
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=757ec116c9bce4278fa4423039736c832cc63b6f
> >
> > spi: npcm: fix platform_no_drv_owner.cocci warnings
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=7986e2273c1ed987ff34f1c318d5a2b18e8c0fee
> >
> > spi: npcm: Fix an error code in the probe function
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=428f977a6a6b43154928571b01fa8415c11a9244
> >
> > spi: npcm: Fix uninitialized variable warning
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1d2319efb6a970d5f5740a60828244e6c309df2b
> >
> > spi: npcm: Modify pspi send function
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1fa33be36cfc8908be951ed56113906f422add50
> >
> > spi: Update NPCM PSPI controller documentation
> > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=6ab4a3502923c20c5a6921868e787e5fd033409b
> >
> > pinctrl: nuvoton: modify NPCM7xx pin configuration function
> > https://git.linaro.org/people/linus.walleij/linux-pinctrl.git/commit/?h=for-next&id=67b249aaa650a461c86484e6c365f33887f0968a
> >
> > watchdog: npcm: Modify npcm watchdog kconfig arch parameter
> >
> > https://kernel.googlesource.com/pub/scm/linux/kernel/git/groeck/linux-staging/+/4181f4a55838db15deaed315b11bfab395be0a17
All of the above are now done. I built your defconfig and net booted
it on the poleg evb I have:
Booting Linux on physical CPU 0x0
Linux version 4.19.8-00077-gdfde697b6cae (joel@aurora) (gcc version
8.2.0 (Ubuntu 8.2.0-7ubuntu1)) #2 SMP Thu Dec 13 11:24:12 ACDT 2018
CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: Nuvoton npcm750 Development Board (Device Tree)
> > Commits on upstream process
> >
> > dt-binding: mtd: add NPCM FIU controller
> > https://github.com/Nuvoton-Israel/linux/commit/f13c82dca3ca21175eb71223156d5c525c18dd74
> >
> > mtd: spi-nor: add NPCM FIU controller driver
> > https://github.com/Nuvoton-Israel/linux/commit/747809a0082dbeaaa6b786842c5c5eaffa519561
> >
> > dt-bindings: i2c: npcm7xx: add binding for i2c controller
> > https://github.com/Nuvoton-Israel/linux/commit/07be53b47443fcab645f0e67c03e3912387ff9a7
> >
> > i2c: npcm: driver for Poleg i2c controller
> > https://github.com/Nuvoton-Israel/linux/commit/3a7f3375024461d3db17a78cb7d83dafcc2dbc6c
> >
> > dt-binding: bmc: Add NPCM7xx LPC BPC documentation
> > https://github.com/Nuvoton-Israel/linux/commit/e8b6cc1c31e744b3fd5630d790af65ac38b2c24d#diff-e7386aa740d12baf8cdc2a0ab8e5347c
> >
> > misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
> > https://github.com/Nuvoton-Israel/linux/commit/adee227ac24431cd033f1c44b63d5a244a0bdd3b#diff-7081e24727d8058bcc6ebf20230f5403
> >
> > misc: bpc: modify remove function in npcm7xx bpc driver
> > https://github.com/Nuvoton-Israel/linux/commit/1c5268f9b17f9333ee2fb245f84729beebb66a9c#diff-7081e24727d8058bcc6ebf20230f5403
> >
> > PCI mail box commits
> >
> > dt-binding: bmc: add npcm7xx pci mailbox document
> > https://github.com/Nuvoton-Israel/linux/commit/7da4f41849aef11b1a9a6e05773545f181246496
> >
> > misc: mbox: add npcm7xx pci mailbox driver
> > https://github.com/Nuvoton-Israel/linux/commit/c3d5d2bab5ad216e6c0debabf50ad8365f2301d1
> >
> > EMC net commits
> >
> > net: npcm: add NPCM7xx Ethernet MAC controller
> > https://github.com/Nuvoton-Israel/linux/commit/6a9407ed142ff2c205d732d4d3477a8e9f7d950b
> >
> > dt-binding: net: document NPCM7xx EMC DT bindings
> > https://github.com/Nuvoton-Israel/linux/commit/66478b88409dba415a7bb008ce833afa3957fb2d
Not all of the above commits do not have signed-off-bys. This is
required for putting it in the kernel tree.
Instead of cherry-picking these from your tree, I would prefer to see
them posted to the mailing list where I can apply them. Can you please
send them out using git send-email, and we can go from there?
I have applied the device tree patch you sent.
Can you please re-send the defconfig using git-send-email and name it
'poleg_defconfig' or 'poleg_svb_defconfig' (what is SVB?) to match the
defconfig naming convention. It should be generated against the
dev-4.19 tree (make poleg_defconfig && make savedefconfig && cp
defconfig arch/arm/config/poleg_defconfig).
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: Linux dev-4.19
2018-12-13 0:56 ` Joel Stanley
@ 2018-12-13 7:30 ` Avi.Fishman
2018-12-16 14:44 ` Tomer Maimon
1 sibling, 0 replies; 14+ messages in thread
From: Avi.Fishman @ 2018-12-13 7:30 UTC (permalink / raw)
To: joel, tmaimon77; +Cc: openbmc
Hi Joel,
Regarding the EMC driver I made a lot of changes according to your comment and Benjamin comments:
- Use "dev_*" for massages
- Remove all code not defined to CONFIG_OF
- Use debug_fs instead of proc_*
- VLAN is handled more gently
- Change order of functions
- Remove CONFIG_NPCM7XX_EMC_ETH_DEBUG_EXT
- Change _raw_readl and _raw_writel to readl and writel
- Remove muxing (done in pinmux driver)
- Change HW related variables from "unsigned int' to '__le32'
- Remove irrelevant error cases
- Remove redundant locks
- Remove redundant of_match_device()
- Remove ether_setup(), it is done inside alloc_etherdev()
- Remove naming the device (let the network stuck pick a name)
- Some definition and function renaming
- syntax and code style changes
- update dts binding document
But still some comments from Benjamin that requires more risky modification were not done yet.
The driver we have works around some HW issues that some of them are hard to reproduce, so I am afraid (at this point) that some design changes might break them.
This driver was heavily tested on our site and our main OEM customer.
Note that on our next BMC chip we will not use this IP so this IP only applies to our Poleg.
Thanks,
Avi
-----Original Message-----
From: openbmc <openbmc-bounces+avifishman70=gmail.com@lists.ozlabs.org> On Behalf Of Joel Stanley
Sent: Thursday, December 13, 2018 2:56 AM
To: Tomer Maimon <tmaimon77@gmail.com>
Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>
Subject: Re: Linux dev-4.19
> > Commit upstream to kernel 4.20
> > hwmon: (npcm-750-pwm-fan) Change initial pwm target to 255
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_torvalds_linux.git_commit_-3Fid-3Df21c8e753
> > b1dcb8f9e5b096db1f7f4e6fdfa7258&d=DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC
> > 01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneHprahPM6I78&m=E
> > LnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=p-LAPdYOBNI_KKIH_DawlHJ
> > J3Tg8yjs5fSCwchxODZM&e=
Done.
> > Commits will upstream to kernel 4.21
> >
> > dt-binding: spi: add NPCM PSPI controller documentation
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D4ad26864df53b265976c4a3ae61b1e6cad92fe40&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=eQUcYfJdc
> > q4ItYmLDngSe9Qi9AQy2F86uhAeHQb4hnc&e=
> >
> > spi: npcm: add NPCM PSPI controller driver
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D2a22f1b30cee8d1e104a6c5062a609bedbfd5c39&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=L0d6tgcA8
> > EoveyNtN_Bdvbwc8gJawe8Bt3EE7n7pqkQ&e=
> >
> > spi: npcm: fix u32 csgpio being checked for less than zero
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D757ec116c9bce4278fa4423039736c832cc63b6f&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=qsjXlXRQx
> > Vl5uv4uX8AWCP2QPkydR_xHDgBzSOZtJ3E&e=
> >
> > spi: npcm: fix platform_no_drv_owner.cocci warnings
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D7986e2273c1ed987ff34f1c318d5a2b18e8c0fee&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=RIeQRFrcu
> > KbmisiBMBQQhvWIyEPyQT5zfS2TstwafJw&e=
> >
> > spi: npcm: Fix an error code in the probe function
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D428f977a6a6b43154928571b01fa8415c11a9244&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=jreMCKH6o
> > AAnq29T0VeO82kFFRzpRpyV0T0X9VoAoRs&e=
> >
> > spi: npcm: Fix uninitialized variable warning
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D1d2319efb6a970d5f5740a60828244e6c309df2b&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=bFEkqbBjn
> > RqbjjNzw71SDKhuEj9O4LL2FoVOxLjhfDM&e=
> >
> > spi: npcm: Modify pspi send function
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D1fa33be36cfc8908be951ed56113906f422add50&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=7ma2h-PUg
> > cEVoXYOT4NdiS1lmlCl04KzZFNoms2OwFw&e=
> >
> > spi: Update NPCM PSPI controller documentation
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_
> > pub_scm_linux_kernel_git_broonie_spi.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D6ab4a3502923c20c5a6921868e787e5fd033409b&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=jVF-Ct8jm
> > w17vCdIW1uTiqqO9gcz4Ox26-FL_rGnTm4&e=
> >
> > pinctrl: nuvoton: modify NPCM7xx pin configuration function
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__git.linaro.org_
> > people_linus.walleij_linux-2Dpinctrl.git_commit_-3Fh-3Dfor-2Dnext-26
> > id-3D67b249aaa650a461c86484e6c365f33887f0968a&d=DwIBaQ&c=ue8mO8zgC4V
> > Z4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneH
> > prahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=49tWS3XDC
> > am5Uu_hiD4YhuhKGVu7ck8e5F09JAWlpZM&e=
> >
> > watchdog: npcm: Modify npcm watchdog kconfig arch parameter
> >
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__kernel.googleso
> > urce.com_pub_scm_linux_kernel_git_groeck_linux-2Dstaging_-2B_4181f4a
> > 55838db15deaed315b11bfab395be0a17&d=DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9
> > MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneHprahPM6I78&m
> > =ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=tvoCWtzFhztDogtqxhkcm
> > AIdwA00ysyb_AjV4L1wftk&e=
All of the above are now done. I built your defconfig and net booted it on the poleg evb I have:
Booting Linux on physical CPU 0x0
Linux version 4.19.8-00077-gdfde697b6cae (joel@aurora) (gcc version
8.2.0 (Ubuntu 8.2.0-7ubuntu1)) #2 SMP Thu Dec 13 11:24:12 ACDT 2018
CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: Nuvoton npcm750 Development Board (Device Tree)
> > Commits on upstream process
> >
> > dt-binding: mtd: add NPCM FIU controller
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_f13c82dca3ca21175eb71223156d5c525c18dd74&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=2H7RgZDWGaC51J4vgPlPI-sMoN9WgdnCDzQPUFRON4g&e=
> >
> > mtd: spi-nor: add NPCM FIU controller driver
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_747809a0082dbeaaa6b786842c5c5eaffa519561&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=w6AEFBwRPA2BJjYM36bylDBN7fUBSBoi2MHkjdeF6TA&e=
> >
> > dt-bindings: i2c: npcm7xx: add binding for i2c controller
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_07be53b47443fcab645f0e67c03e3912387ff9a7&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=Bv8gjLQnWmv4U7_X2jkDTzLWms-uhPOsKwDj3sA0JJU&e=
> >
> > i2c: npcm: driver for Poleg i2c controller
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_3a7f3375024461d3db17a78cb7d83dafcc2dbc6c&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=0n2DQYGCcLyKKX0KXXfNa9r3abwa2WrkwMssKoat6Uk&e=
> >
> > dt-binding: bmc: Add NPCM7xx LPC BPC documentation
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_e8b6cc1c31e744b3fd5630d790af65ac38b2c24d-2
> > 3diff-2De7386aa740d12baf8cdc2a0ab8e5347c&d=DwIBaQ&c=ue8mO8zgC4VZ4q_a
> > NVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneHprahP
> > M6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=oZrISIjyD73eDp
> > wNC3w1IGykiKiThz9E1GciypWG4JE&e=
> >
> > misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_adee227ac24431cd033f1c44b63d5a244a0bdd3b-2
> > 3diff-2D7081e24727d8058bcc6ebf20230f5403&d=DwIBaQ&c=ue8mO8zgC4VZ4q_a
> > NVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneHprahP
> > M6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=alY6eLY617LOoH
> > uCc4v-5rAuV4cfEBp5to068p8YHbY&e=
> >
> > misc: bpc: modify remove function in npcm7xx bpc driver
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_1c5268f9b17f9333ee2fb245f84729beebb66a9c-2
> > 3diff-2D7081e24727d8058bcc6ebf20230f5403&d=DwIBaQ&c=ue8mO8zgC4VZ4q_a
> > NVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cOhaTMIUoFhUPAXV51uTneHprahP
> > M6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dUXPt9LhzMI&s=_cLlHO1RCi38nA
> > 3CbTcEvS6xQl1Vgxo1NIg8NFa4YeI&e=
> >
> > PCI mail box commits
> >
> > dt-binding: bmc: add npcm7xx pci mailbox document
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_7da4f41849aef11b1a9a6e05773545f181246496&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=pxvcmyURp3NUcE5B85JTbC2Qs4K8JkF9M-FQ9nDQS5w&e=
> >
> > misc: mbox: add npcm7xx pci mailbox driver
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_c3d5d2bab5ad216e6c0debabf50ad8365f2301d1&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=llrGcnZgWtFx-9P1WtuHN6b5SJJwIne7o6PVydacNbg&e=
> >
> > EMC net commits
> >
> > net: npcm: add NPCM7xx Ethernet MAC controller
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_6a9407ed142ff2c205d732d4d3477a8e9f7d950b&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=83uHEIideztXcSfkW2SCWBbYRT8Tx93qw_zUa2B8hbA&e=
> >
> > dt-binding: net: document NPCM7xx EMC DT bindings
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Nuvo
> > ton-2DIsrael_linux_commit_66478b88409dba415a7bb008ce833afa3957fb2d&d
> > =DwIBaQ&c=ue8mO8zgC4VZ4q_aNVKt8G9MC01UFDmisvMR1k-EoDM&r=kNeU5gwNy2cO
> > haTMIUoFhUPAXV51uTneHprahPM6I78&m=ELnAIsbPD6kfaIjJddqVj93bljYNEcj2dU
> > XPt9LhzMI&s=zs2C0EYbR9AtwyKnqbBqXa-So3XdScMoMsNrdmwaW88&e=
Not all of the above commits do not have signed-off-bys. This is required for putting it in the kernel tree.
Instead of cherry-picking these from your tree, I would prefer to see them posted to the mailing list where I can apply them. Can you please send them out using git send-email, and we can go from there?
I have applied the device tree patch you sent.
Can you please re-send the defconfig using git-send-email and name it 'poleg_defconfig' or 'poleg_svb_defconfig' (what is SVB?) to match the defconfig naming convention. It should be generated against the
dev-4.19 tree (make poleg_defconfig && make savedefconfig && cp defconfig arch/arm/config/poleg_defconfig).
Cheers,
Joel
===========================================================================================
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-13 0:56 ` Joel Stanley
2018-12-13 7:30 ` Avi.Fishman
@ 2018-12-16 14:44 ` Tomer Maimon
1 sibling, 0 replies; 14+ messages in thread
From: Tomer Maimon @ 2018-12-16 14:44 UTC (permalink / raw)
To: Joel Stanley; +Cc: OpenBMC Maillist
[-- Attachment #1: Type: text/plain, Size: 5636 bytes --]
On Thu, 13 Dec 2018 at 02:56, Joel Stanley <joel@jms.id.au> wrote:
> > > Commit upstream to kernel 4.20
> > > hwmon: (npcm-750-pwm-fan) Change initial pwm target to 255
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f21c8e753b1dcb8f9e5b096db1f7f4e6fdfa7258
>
> Done.
>
> > > Commits will upstream to kernel 4.21
> > >
> > > dt-binding: spi: add NPCM PSPI controller documentation
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=4ad26864df53b265976c4a3ae61b1e6cad92fe40
> > >
> > > spi: npcm: add NPCM PSPI controller driver
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=2a22f1b30cee8d1e104a6c5062a609bedbfd5c39
> > >
> > > spi: npcm: fix u32 csgpio being checked for less than zero
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=757ec116c9bce4278fa4423039736c832cc63b6f
> > >
> > > spi: npcm: fix platform_no_drv_owner.cocci warnings
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=7986e2273c1ed987ff34f1c318d5a2b18e8c0fee
> > >
> > > spi: npcm: Fix an error code in the probe function
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=428f977a6a6b43154928571b01fa8415c11a9244
> > >
> > > spi: npcm: Fix uninitialized variable warning
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1d2319efb6a970d5f5740a60828244e6c309df2b
> > >
> > > spi: npcm: Modify pspi send function
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=1fa33be36cfc8908be951ed56113906f422add50
> > >
> > > spi: Update NPCM PSPI controller documentation
> > >
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-next&id=6ab4a3502923c20c5a6921868e787e5fd033409b
> > >
> > > pinctrl: nuvoton: modify NPCM7xx pin configuration function
> > >
> https://git.linaro.org/people/linus.walleij/linux-pinctrl.git/commit/?h=for-next&id=67b249aaa650a461c86484e6c365f33887f0968a
> > >
> > > watchdog: npcm: Modify npcm watchdog kconfig arch parameter
> > >
> > >
> https://kernel.googlesource.com/pub/scm/linux/kernel/git/groeck/linux-staging/+/4181f4a55838db15deaed315b11bfab395be0a17
>
> All of the above are now done. I built your defconfig and net booted
> it on the poleg evb I have:
>
> Booting Linux on physical CPU 0x0
> Linux version 4.19.8-00077-gdfde697b6cae (joel@aurora) (gcc version
> 8.2.0 (Ubuntu 8.2.0-7ubuntu1)) #2 SMP Thu Dec 13 11:24:12 ACDT 2018
> CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=18c5387d
> CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
> OF: fdt: Machine model: Nuvoton npcm750 Development Board (Device Tree)
>
>
> > > Commits on upstream process
> > >
> > > dt-binding: mtd: add NPCM FIU controller
> > >
> https://github.com/Nuvoton-Israel/linux/commit/f13c82dca3ca21175eb71223156d5c525c18dd74
> > >
> > > mtd: spi-nor: add NPCM FIU controller driver
> > >
> https://github.com/Nuvoton-Israel/linux/commit/747809a0082dbeaaa6b786842c5c5eaffa519561
> > >
> > > dt-bindings: i2c: npcm7xx: add binding for i2c controller
> > >
> https://github.com/Nuvoton-Israel/linux/commit/07be53b47443fcab645f0e67c03e3912387ff9a7
> > >
> > > i2c: npcm: driver for Poleg i2c controller
> > >
> https://github.com/Nuvoton-Israel/linux/commit/3a7f3375024461d3db17a78cb7d83dafcc2dbc6c
> > >
> > > dt-binding: bmc: Add NPCM7xx LPC BPC documentation
> > >
> https://github.com/Nuvoton-Israel/linux/commit/e8b6cc1c31e744b3fd5630d790af65ac38b2c24d#diff-e7386aa740d12baf8cdc2a0ab8e5347c
> > >
> > > misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
> > >
> https://github.com/Nuvoton-Israel/linux/commit/adee227ac24431cd033f1c44b63d5a244a0bdd3b#diff-7081e24727d8058bcc6ebf20230f5403
> > >
> > > misc: bpc: modify remove function in npcm7xx bpc driver
> > >
> https://github.com/Nuvoton-Israel/linux/commit/1c5268f9b17f9333ee2fb245f84729beebb66a9c#diff-7081e24727d8058bcc6ebf20230f5403
> > >
> > > PCI mail box commits
> > >
> > > dt-binding: bmc: add npcm7xx pci mailbox document
> > >
> https://github.com/Nuvoton-Israel/linux/commit/7da4f41849aef11b1a9a6e05773545f181246496
> > >
> > > misc: mbox: add npcm7xx pci mailbox driver
> > >
> https://github.com/Nuvoton-Israel/linux/commit/c3d5d2bab5ad216e6c0debabf50ad8365f2301d1
> > >
> > > EMC net commits
> > >
> > > net: npcm: add NPCM7xx Ethernet MAC controller
> > >
> https://github.com/Nuvoton-Israel/linux/commit/6a9407ed142ff2c205d732d4d3477a8e9f7d950b
> > >
> > > dt-binding: net: document NPCM7xx EMC DT bindings
> > >
> https://github.com/Nuvoton-Israel/linux/commit/66478b88409dba415a7bb008ce833afa3957fb2d
>
> Not all of the above commits do not have signed-off-bys. This is
> required for putting it in the kernel tree.
>
> Instead of cherry-picking these from your tree, I would prefer to see
> them posted to the mailing list where I can apply them. Can you please
> send them out using git send-email, and we can go from there?
>
Done.
I have applied the device tree patch you sent.
>
> Can you please re-send the defconfig using git-send-email and name it
> 'poleg_defconfig' or 'poleg_svb_defconfig' (what is SVB?) to match the
> defconfig naming convention. It should be generated against the
> dev-4.19 tree (make poleg_defconfig && make savedefconfig && cp
> defconfig arch/arm/config/poleg_defconfig).
>
>
Done, you can find the new defconfig in the mail I sent earlier,
BTW, I modify the name to npcm7xx_defconfig
Cheers,
>
> Joel
>
Thank a lot,
Tomer
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2018-12-03 6:15 ` Joel Stanley
2018-12-03 19:11 ` Vijay Khemka
@ 2019-01-16 22:20 ` Adriana Kobylak
2019-01-16 23:36 ` Joel Stanley
1 sibling, 1 reply; 14+ messages in thread
From: Adriana Kobylak @ 2019-01-16 22:20 UTC (permalink / raw)
To: Joel Stanley; +Cc: OpenBMC Maillist, openbmc
Hi Joel,
>
> I've published a gerrit commit that bumps openbmc to use this version.
> This has had some testing by our CI on Witherspoon and Romulus, and I
> did some manual testing on Romulus and Palmetto (hardware and Qemu). I
> intend to merge it tomorrow:
>
Seems the AST2500 defconfig hasn't been updated in a while:
https://github.com/openbmc/openbmc/blob/4feb727cd6b77a68bdaca63e121b378d814f5eaf/meta-aspeed/recipes-kernel/linux/ast2500/defconfig
Would you be updating it with the changes from 4.19? Looking for the
configs
that enable NBD snd the vhub device.
I can submit an update to gerrit just not sure if we just copy the file
from the kernel repo or only certain changes are added.
Thanks.
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: Linux dev-4.19
2019-01-16 22:20 ` Adriana Kobylak
@ 2019-01-16 23:36 ` Joel Stanley
0 siblings, 0 replies; 14+ messages in thread
From: Joel Stanley @ 2019-01-16 23:36 UTC (permalink / raw)
To: Adriana Kobylak; +Cc: OpenBMC Maillist, openbmc
On Thu, 17 Jan 2019 at 09:14, Adriana Kobylak <anoo@linux.ibm.com> wrote:
> Would you be updating it with the changes from 4.19? Looking for the
> configs
> that enable NBD snd the vhub device.
> I can submit an update to gerrit just not sure if we just copy the file
> from the kernel repo or only certain changes are added.
As you guessed, it's up to you to submit a change to Gerrit if you
want the defconfig changed. We don't copy the defconfig from the
kernel tree as this contains options relating to testing and
development that we don't enable for the BMC build.
Use menuconfig to enable the option(s), and then savedefconfig to
write out your updated defconfig.
Cheers,
Joel
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-01-16 23:36 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-29 0:49 Linux dev-4.19 Joel Stanley
2018-12-03 6:15 ` Joel Stanley
2018-12-03 19:11 ` Vijay Khemka
2018-12-03 20:55 ` Amithash Prasad
2018-12-03 22:04 ` Joel Stanley
2018-12-04 3:13 ` David Thompson
2018-12-04 3:19 ` Joel Stanley
2018-12-12 12:05 ` Tomer Maimon
2018-12-12 23:22 ` Joel Stanley
2018-12-13 0:56 ` Joel Stanley
2018-12-13 7:30 ` Avi.Fishman
2018-12-16 14:44 ` Tomer Maimon
2019-01-16 22:20 ` Adriana Kobylak
2019-01-16 23:36 ` Joel Stanley
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