From: Joel Stanley <joel@jms.id.au>
To: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Cc: linux-aspeed <linux-aspeed@lists.ozlabs.org>,
devicetree <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards
Date: Mon, 16 Nov 2020 06:14:02 +0000 [thread overview]
Message-ID: <CACPK8XfzTzDDvoEqLW3YEspqHYuFz15zoeCaMbkzsEq87dXbVA@mail.gmail.com> (raw)
In-Reply-To: <1605247168-1028-5-git-send-email-vishwa@linux.vnet.ibm.com>
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> These cards are not hot pluggable and must be installed
> prior to boot. LEDs on these are controlled by PCA9552
> I2C expander
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 426 +++++++++++++++++++++++++++
> 1 file changed, 426 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 88fefc0..67c8c40 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -540,6 +540,162 @@
> gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
> };
> };
> +
> + leds-optional-dasd-pyramid0 {
> + compatible = "gpio-leds";
> +
> + nvme0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme4 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme5 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme6 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme7 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-dasd-pyramid1 {
> + compatible = "gpio-leds";
> +
> + nvme8 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme9 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme10 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme11 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme12 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme13 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme14 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme15 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-dasd-pyramid2 {
> + compatible = "gpio-leds";
> +
> + nvme16 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme17 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme18 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme19 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme20 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme21 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme22 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme23 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> };
>
> &ehci1 {
> @@ -1885,6 +2041,96 @@
> compatible = "atmel,24c64";
> reg = <0x50>;
> };
> +
> + pca2: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c14 {
> @@ -1894,6 +2140,96 @@
> compatible = "atmel,24c64";
> reg = <0x50>;
> };
> +
> + pca3: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c15 {
> @@ -1903,6 +2239,96 @@
> compatible = "atmel,24c64";
> reg = <0x50>;
> };
> +
> + pca4: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &vuart1 {
> --
> 1.8.3.1
>
next prev parent reply other threads:[~2020-11-16 6:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
2020-11-13 5:59 ` [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs Vishwanatha Subbanna
2020-11-16 6:13 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Vishwanatha Subbanna
2020-11-16 6:14 ` Joel Stanley
2021-02-10 11:22 ` vishwanatha subbanna
2020-11-13 5:59 ` [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882 Vishwanatha Subbanna
2020-11-16 6:15 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Vishwanatha Subbanna
2020-11-16 6:14 ` Joel Stanley [this message]
2020-11-13 5:59 ` [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Vishwanatha Subbanna
2020-11-16 6:13 ` Joel Stanley
2020-11-30 6:08 ` Andrew Jeffery
2021-02-10 11:14 ` vishwanatha subbanna
2021-02-10 11:16 ` vishwanatha subbanna
2021-02-14 23:08 ` Andrew Jeffery
[not found] ` <14C0B6E9-0724-42FE-89BA-1FA0262B9BBB@linux.vnet.ibm.com>
2021-02-18 22:45 ` Andrew Jeffery
2020-11-16 6:14 ` [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Joel Stanley
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