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* [PATCH] pinctrl: bcm2835: Clear the event latch register when disabling interrupts
@ 2015-06-30 11:35 Jonathan Bell
       [not found] ` <55927F0B.80602-FnsA7b+Nu9XbIbC87yuRow@public.gmane.org>
  2015-07-16 13:33 ` Linus Walleij
  0 siblings, 2 replies; 3+ messages in thread
From: Jonathan Bell @ 2015-06-30 11:35 UTC (permalink / raw)
  To: Linus Walleij, Stephen Warren, Lee Jones; +Cc: linux-gpio, linux-rpi-kernel


It's possible to hit a race condition if interrupts are generated on a GPIO
pin when the IRQ line in question is being disabled.

If the interrupt is freed, bcm2835_gpio_irq_disable() is called which
disables the event generation sources (edge, level). If an event occurred
between the last disabling of hard IRQs and the write to the event
source registers, a bit would be set in the GPIO event detect register
(GPEDSn) which goes unacknowledged by bcm2835_gpio_irq_handler()
so Linux complains loudly.

There is no per-GPIO mask register, so when disabling GPIO interrupts
write 1 to the relevant bit in GPEDSn to clear out any stale events.

Signed-off-by: Jonathan Bell <jonathan-FnsA7b+Nu9XbIbC87yuRow@public.gmane.org>

---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index efcf2a2..547b925 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -473,6 +473,8 @@ static void bcm2835_gpio_irq_disable(struct irq_data *data)
 
     spin_lock_irqsave(&pc->irq_lock[bank], flags);
     bcm2835_gpio_irq_config(pc, gpio, false);
+    /* Clear events that were latched prior to clearing event sources */
+    bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
     clear_bit(offset, &pc->enabled_irq_map[bank]);
     spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
 }
-- 
1.8.1.2

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] pinctrl: bcm2835: Clear the event latch register when disabling interrupts
       [not found] ` <55927F0B.80602-FnsA7b+Nu9XbIbC87yuRow@public.gmane.org>
@ 2015-07-11  4:15   ` Stephen Warren
  0 siblings, 0 replies; 3+ messages in thread
From: Stephen Warren @ 2015-07-11  4:15 UTC (permalink / raw)
  To: Jonathan Bell, Linus Walleij, Lee Jones; +Cc: linux-gpio, linux-rpi-kernel

On 06/30/2015 05:35 AM, Jonathan Bell wrote:
> It's possible to hit a race condition if interrupts are generated on a GPIO
> pin when the IRQ line in question is being disabled.
> 
> If the interrupt is freed, bcm2835_gpio_irq_disable() is called which
> disables the event generation sources (edge, level). If an event occurred
> between the last disabling of hard IRQs and the write to the event
> source registers, a bit would be set in the GPIO event detect register
> (GPEDSn) which goes unacknowledged by bcm2835_gpio_irq_handler()
> so Linux complains loudly.
> 
> There is no per-GPIO mask register, so when disabling GPIO interrupts
> write 1 to the relevant bit in GPEDSn to clear out any stale events.

Acked-by: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>

(Sorry for the slow response; I was on vacation)

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] pinctrl: bcm2835: Clear the event latch register when disabling interrupts
  2015-06-30 11:35 [PATCH] pinctrl: bcm2835: Clear the event latch register when disabling interrupts Jonathan Bell
       [not found] ` <55927F0B.80602-FnsA7b+Nu9XbIbC87yuRow@public.gmane.org>
@ 2015-07-16 13:33 ` Linus Walleij
  1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2015-07-16 13:33 UTC (permalink / raw)
  To: Jonathan Bell; +Cc: Stephen Warren, Lee Jones, linux-gpio, linux-rpi-kernel

On Tue, Jun 30, 2015 at 1:35 PM, Jonathan Bell <jonathan@raspberrypi.org> wrote:

> It's possible to hit a race condition if interrupts are generated on a GPIO
> pin when the IRQ line in question is being disabled.
>
> If the interrupt is freed, bcm2835_gpio_irq_disable() is called which
> disables the event generation sources (edge, level). If an event occurred
> between the last disabling of hard IRQs and the write to the event
> source registers, a bit would be set in the GPIO event detect register
> (GPEDSn) which goes unacknowledged by bcm2835_gpio_irq_handler()
> so Linux complains loudly.
>
> There is no per-GPIO mask register, so when disabling GPIO interrupts
> write 1 to the relevant bit in GPEDSn to clear out any stale events.
>
> Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>

Patch applied for fixes with Stephen's ACK, I had to rebase it
because of something, maybe whitespace mangling.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2015-07-16 13:33 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-30 11:35 [PATCH] pinctrl: bcm2835: Clear the event latch register when disabling interrupts Jonathan Bell
     [not found] ` <55927F0B.80602-FnsA7b+Nu9XbIbC87yuRow@public.gmane.org>
2015-07-11  4:15   ` Stephen Warren
2015-07-16 13:33 ` Linus Walleij

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