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From: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: Zhao Richard-B20223
	<B20223-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	"linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org"
	<linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org>,
	"devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org"
	<devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>,
	Liu Hui-R64343 <r64343-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	"kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
	<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
	"s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
	<s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Mike Turquette <mturquette-l0cyMroinI0@public.gmane.org>
Subject: Re: [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers
Date: Tue, 17 Jul 2012 20:15:40 +0200	[thread overview]
Message-ID: <CACRpkdZei=U67wHQW6rKGkv0X10t4k+BEYE8uFZPbp-6Y60deQ@mail.gmail.com> (raw)
In-Reply-To: <20120717030225.GF19699-Fb7DQEYuewWctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>

On Tue, Jul 17, 2012 at 5:02 AM, Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> On Sun, Jul 15, 2012 at 04:43:03AM +0800, Linus Walleij wrote:

>> This whole issue appears in other systems so you're not alone
>> on this, for example the ux500 PRCMU driver has exactly these
>> properties.
>>
> So how does ux500 PRCMU handle this?

First, this driver is in MFD which is the most apropriate place I can
think of right now.

Then we have accessor functions, but when we just want to read/write a
register we have this API:

u32 db8500_prcmu_read(unsigned int reg);
void db8500_prcmu_write(unsigned int reg, u32 value);
void db8500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value);

The third function is an oddity which performs read-modify-write
on the other side (firmware).

Yours,
Linus Walleij

WARNING: multiple messages have this Message-ID (diff)
From: linus.walleij@linaro.org (Linus Walleij)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers
Date: Tue, 17 Jul 2012 20:15:40 +0200	[thread overview]
Message-ID: <CACRpkdZei=U67wHQW6rKGkv0X10t4k+BEYE8uFZPbp-6Y60deQ@mail.gmail.com> (raw)
In-Reply-To: <20120717030225.GF19699@shlinux2.ap.freescale.net>

On Tue, Jul 17, 2012 at 5:02 AM, Dong Aisheng <b29396@freescale.com> wrote:
> On Sun, Jul 15, 2012 at 04:43:03AM +0800, Linus Walleij wrote:

>> This whole issue appears in other systems so you're not alone
>> on this, for example the ux500 PRCMU driver has exactly these
>> properties.
>>
> So how does ux500 PRCMU handle this?

First, this driver is in MFD which is the most apropriate place I can
think of right now.

Then we have accessor functions, but when we just want to read/write a
register we have this API:

u32 db8500_prcmu_read(unsigned int reg);
void db8500_prcmu_write(unsigned int reg, u32 value);
void db8500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value);

The third function is an oddity which performs read-modify-write
on the other side (firmware).

Yours,
Linus Walleij

  parent reply	other threads:[~2012-07-17 18:15 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-12  9:07 [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers Dong Aisheng
2012-07-12  9:07 ` Dong Aisheng
     [not found] ` <1342084080-3145-1-git-send-email-b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2012-07-12  9:08   ` [PATCH v2 2/2] pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_ID Dong Aisheng
2012-07-12  9:08     ` Dong Aisheng
2012-07-12  9:31   ` [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers Richard Zhao
2012-07-12  9:31     ` Richard Zhao
2012-07-14 20:43   ` Linus Walleij
2012-07-14 20:43     ` Linus Walleij
     [not found]     ` <CACRpkdbHtgKLA3JJxc4VY35zSpJFvk15u62Z3aBCqERoeQ10CA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-07-16  8:17       ` Richard Zhao
2012-07-16  8:17         ` Richard Zhao
     [not found]         ` <20120716081703.GH21635-iWYTGMXpHj9ITqJhDdzsOjpauB2SiJktrE5yTffgRl4@public.gmane.org>
2012-07-16 13:40           ` Arnd Bergmann
2012-07-16 13:40             ` Arnd Bergmann
     [not found]             ` <201207161340.18528.arnd-r2nGTMty4D4@public.gmane.org>
2012-07-16 22:15               ` Linus Walleij
2012-07-16 22:15                 ` Linus Walleij
2012-07-17  3:04               ` Dong Aisheng
2012-07-17  3:04                 ` Dong Aisheng
2012-07-17  3:02       ` Dong Aisheng
2012-07-17  3:02         ` Dong Aisheng
     [not found]         ` <20120717030225.GF19699-Fb7DQEYuewWctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2012-07-17 18:15           ` Linus Walleij [this message]
2012-07-17 18:15             ` Linus Walleij
     [not found]             ` <CACRpkdZei=U67wHQW6rKGkv0X10t4k+BEYE8uFZPbp-6Y60deQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-07-17 18:24               ` Mark Brown
2012-07-17 18:24                 ` Mark Brown
2012-07-12  9:48 ` Hui Wang
2012-07-12  9:48   ` Hui Wang
     [not found]   ` <4FFE9D7E.1080302-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-07-12 10:24     ` Richard Zhao
2012-07-12 10:24       ` Richard Zhao
2012-07-12 11:04     ` Dong Aisheng
2012-07-12 11:04       ` Dong Aisheng

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