* [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-13 2:42 ` Delphine CC Chiu
0 siblings, 0 replies; 9+ messages in thread
From: Delphine CC Chiu @ 2024-03-13 2:42 UTC (permalink / raw)
To: patrick, Andrew Jeffery, Linus Walleij, Joel Stanley
Cc: Delphine CC Chiu, linux-aspeed, openbmc, linux-gpio,
linux-arm-kernel, linux-kernel
Description:
Correct the offset of "Disable GPIO Internal Pull-Down #4" register that
should be 630h according to the AST2620 datasheet.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 34 +++++++++++-----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
index d376fa7114d1..029efe16f8cc 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
@@ -43,7 +43,7 @@
#define SCU614 0x614 /* Disable GPIO Internal Pull-Down #1 */
#define SCU618 0x618 /* Disable GPIO Internal Pull-Down #2 */
#define SCU61C 0x61c /* Disable GPIO Internal Pull-Down #3 */
-#define SCU620 0x620 /* Disable GPIO Internal Pull-Down #4 */
+#define SCU630 0x630 /* Disable GPIO Internal Pull-Down #4 */
#define SCU634 0x634 /* Disable GPIO Internal Pull-Down #5 */
#define SCU638 0x638 /* Disable GPIO Internal Pull-Down #6 */
#define SCU690 0x690 /* Multi-function Pin Control #24 */
@@ -2495,38 +2495,38 @@ static struct aspeed_pin_config aspeed_g6_configs[] = {
ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
/* GPIOS7 */
- ASPEED_PULL_DOWN_PINCONF(T24, SCU620, 23),
+ ASPEED_PULL_DOWN_PINCONF(T24, SCU630, 23),
/* GPIOS6 */
- ASPEED_PULL_DOWN_PINCONF(P23, SCU620, 22),
+ ASPEED_PULL_DOWN_PINCONF(P23, SCU630, 22),
/* GPIOS5 */
- ASPEED_PULL_DOWN_PINCONF(P24, SCU620, 21),
+ ASPEED_PULL_DOWN_PINCONF(P24, SCU630, 21),
/* GPIOS4 */
- ASPEED_PULL_DOWN_PINCONF(R26, SCU620, 20),
+ ASPEED_PULL_DOWN_PINCONF(R26, SCU630, 20),
/* GPIOS3*/
- ASPEED_PULL_DOWN_PINCONF(R24, SCU620, 19),
+ ASPEED_PULL_DOWN_PINCONF(R24, SCU630, 19),
/* GPIOS2 */
- ASPEED_PULL_DOWN_PINCONF(T26, SCU620, 18),
+ ASPEED_PULL_DOWN_PINCONF(T26, SCU630, 18),
/* GPIOS1 */
- ASPEED_PULL_DOWN_PINCONF(T25, SCU620, 17),
+ ASPEED_PULL_DOWN_PINCONF(T25, SCU630, 17),
/* GPIOS0 */
- ASPEED_PULL_DOWN_PINCONF(R23, SCU620, 16),
+ ASPEED_PULL_DOWN_PINCONF(R23, SCU630, 16),
/* GPIOR7 */
- ASPEED_PULL_DOWN_PINCONF(U26, SCU620, 15),
+ ASPEED_PULL_DOWN_PINCONF(U26, SCU630, 15),
/* GPIOR6 */
- ASPEED_PULL_DOWN_PINCONF(W26, SCU620, 14),
+ ASPEED_PULL_DOWN_PINCONF(W26, SCU630, 14),
/* GPIOR5 */
- ASPEED_PULL_DOWN_PINCONF(T23, SCU620, 13),
+ ASPEED_PULL_DOWN_PINCONF(T23, SCU630, 13),
/* GPIOR4 */
- ASPEED_PULL_DOWN_PINCONF(U25, SCU620, 12),
+ ASPEED_PULL_DOWN_PINCONF(U25, SCU630, 12),
/* GPIOR3*/
- ASPEED_PULL_DOWN_PINCONF(V26, SCU620, 11),
+ ASPEED_PULL_DOWN_PINCONF(V26, SCU630, 11),
/* GPIOR2 */
- ASPEED_PULL_DOWN_PINCONF(V24, SCU620, 10),
+ ASPEED_PULL_DOWN_PINCONF(V24, SCU630, 10),
/* GPIOR1 */
- ASPEED_PULL_DOWN_PINCONF(U24, SCU620, 9),
+ ASPEED_PULL_DOWN_PINCONF(U24, SCU630, 9),
/* GPIOR0 */
- ASPEED_PULL_DOWN_PINCONF(V25, SCU620, 8),
+ ASPEED_PULL_DOWN_PINCONF(V25, SCU630, 8),
/* GPIOX7 */
ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-13 2:42 ` Delphine CC Chiu
0 siblings, 0 replies; 9+ messages in thread
From: Delphine CC Chiu @ 2024-03-13 2:42 UTC (permalink / raw)
To: patrick, Andrew Jeffery, Linus Walleij, Joel Stanley
Cc: linux-aspeed, openbmc, linux-kernel, linux-gpio,
Delphine CC Chiu, linux-arm-kernel
Description:
Correct the offset of "Disable GPIO Internal Pull-Down #4" register that
should be 630h according to the AST2620 datasheet.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 34 +++++++++++-----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
index d376fa7114d1..029efe16f8cc 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
@@ -43,7 +43,7 @@
#define SCU614 0x614 /* Disable GPIO Internal Pull-Down #1 */
#define SCU618 0x618 /* Disable GPIO Internal Pull-Down #2 */
#define SCU61C 0x61c /* Disable GPIO Internal Pull-Down #3 */
-#define SCU620 0x620 /* Disable GPIO Internal Pull-Down #4 */
+#define SCU630 0x630 /* Disable GPIO Internal Pull-Down #4 */
#define SCU634 0x634 /* Disable GPIO Internal Pull-Down #5 */
#define SCU638 0x638 /* Disable GPIO Internal Pull-Down #6 */
#define SCU690 0x690 /* Multi-function Pin Control #24 */
@@ -2495,38 +2495,38 @@ static struct aspeed_pin_config aspeed_g6_configs[] = {
ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
/* GPIOS7 */
- ASPEED_PULL_DOWN_PINCONF(T24, SCU620, 23),
+ ASPEED_PULL_DOWN_PINCONF(T24, SCU630, 23),
/* GPIOS6 */
- ASPEED_PULL_DOWN_PINCONF(P23, SCU620, 22),
+ ASPEED_PULL_DOWN_PINCONF(P23, SCU630, 22),
/* GPIOS5 */
- ASPEED_PULL_DOWN_PINCONF(P24, SCU620, 21),
+ ASPEED_PULL_DOWN_PINCONF(P24, SCU630, 21),
/* GPIOS4 */
- ASPEED_PULL_DOWN_PINCONF(R26, SCU620, 20),
+ ASPEED_PULL_DOWN_PINCONF(R26, SCU630, 20),
/* GPIOS3*/
- ASPEED_PULL_DOWN_PINCONF(R24, SCU620, 19),
+ ASPEED_PULL_DOWN_PINCONF(R24, SCU630, 19),
/* GPIOS2 */
- ASPEED_PULL_DOWN_PINCONF(T26, SCU620, 18),
+ ASPEED_PULL_DOWN_PINCONF(T26, SCU630, 18),
/* GPIOS1 */
- ASPEED_PULL_DOWN_PINCONF(T25, SCU620, 17),
+ ASPEED_PULL_DOWN_PINCONF(T25, SCU630, 17),
/* GPIOS0 */
- ASPEED_PULL_DOWN_PINCONF(R23, SCU620, 16),
+ ASPEED_PULL_DOWN_PINCONF(R23, SCU630, 16),
/* GPIOR7 */
- ASPEED_PULL_DOWN_PINCONF(U26, SCU620, 15),
+ ASPEED_PULL_DOWN_PINCONF(U26, SCU630, 15),
/* GPIOR6 */
- ASPEED_PULL_DOWN_PINCONF(W26, SCU620, 14),
+ ASPEED_PULL_DOWN_PINCONF(W26, SCU630, 14),
/* GPIOR5 */
- ASPEED_PULL_DOWN_PINCONF(T23, SCU620, 13),
+ ASPEED_PULL_DOWN_PINCONF(T23, SCU630, 13),
/* GPIOR4 */
- ASPEED_PULL_DOWN_PINCONF(U25, SCU620, 12),
+ ASPEED_PULL_DOWN_PINCONF(U25, SCU630, 12),
/* GPIOR3*/
- ASPEED_PULL_DOWN_PINCONF(V26, SCU620, 11),
+ ASPEED_PULL_DOWN_PINCONF(V26, SCU630, 11),
/* GPIOR2 */
- ASPEED_PULL_DOWN_PINCONF(V24, SCU620, 10),
+ ASPEED_PULL_DOWN_PINCONF(V24, SCU630, 10),
/* GPIOR1 */
- ASPEED_PULL_DOWN_PINCONF(U24, SCU620, 9),
+ ASPEED_PULL_DOWN_PINCONF(U24, SCU630, 9),
/* GPIOR0 */
- ASPEED_PULL_DOWN_PINCONF(V25, SCU620, 8),
+ ASPEED_PULL_DOWN_PINCONF(V25, SCU630, 8),
/* GPIOX7 */
ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-13 2:42 ` Delphine CC Chiu
0 siblings, 0 replies; 9+ messages in thread
From: Delphine CC Chiu @ 2024-03-13 2:42 UTC (permalink / raw)
To: patrick, Andrew Jeffery, Linus Walleij, Joel Stanley
Cc: Delphine CC Chiu, linux-aspeed, openbmc, linux-gpio,
linux-arm-kernel, linux-kernel
Description:
Correct the offset of "Disable GPIO Internal Pull-Down #4" register that
should be 630h according to the AST2620 datasheet.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 34 +++++++++++-----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
index d376fa7114d1..029efe16f8cc 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
@@ -43,7 +43,7 @@
#define SCU614 0x614 /* Disable GPIO Internal Pull-Down #1 */
#define SCU618 0x618 /* Disable GPIO Internal Pull-Down #2 */
#define SCU61C 0x61c /* Disable GPIO Internal Pull-Down #3 */
-#define SCU620 0x620 /* Disable GPIO Internal Pull-Down #4 */
+#define SCU630 0x630 /* Disable GPIO Internal Pull-Down #4 */
#define SCU634 0x634 /* Disable GPIO Internal Pull-Down #5 */
#define SCU638 0x638 /* Disable GPIO Internal Pull-Down #6 */
#define SCU690 0x690 /* Multi-function Pin Control #24 */
@@ -2495,38 +2495,38 @@ static struct aspeed_pin_config aspeed_g6_configs[] = {
ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
/* GPIOS7 */
- ASPEED_PULL_DOWN_PINCONF(T24, SCU620, 23),
+ ASPEED_PULL_DOWN_PINCONF(T24, SCU630, 23),
/* GPIOS6 */
- ASPEED_PULL_DOWN_PINCONF(P23, SCU620, 22),
+ ASPEED_PULL_DOWN_PINCONF(P23, SCU630, 22),
/* GPIOS5 */
- ASPEED_PULL_DOWN_PINCONF(P24, SCU620, 21),
+ ASPEED_PULL_DOWN_PINCONF(P24, SCU630, 21),
/* GPIOS4 */
- ASPEED_PULL_DOWN_PINCONF(R26, SCU620, 20),
+ ASPEED_PULL_DOWN_PINCONF(R26, SCU630, 20),
/* GPIOS3*/
- ASPEED_PULL_DOWN_PINCONF(R24, SCU620, 19),
+ ASPEED_PULL_DOWN_PINCONF(R24, SCU630, 19),
/* GPIOS2 */
- ASPEED_PULL_DOWN_PINCONF(T26, SCU620, 18),
+ ASPEED_PULL_DOWN_PINCONF(T26, SCU630, 18),
/* GPIOS1 */
- ASPEED_PULL_DOWN_PINCONF(T25, SCU620, 17),
+ ASPEED_PULL_DOWN_PINCONF(T25, SCU630, 17),
/* GPIOS0 */
- ASPEED_PULL_DOWN_PINCONF(R23, SCU620, 16),
+ ASPEED_PULL_DOWN_PINCONF(R23, SCU630, 16),
/* GPIOR7 */
- ASPEED_PULL_DOWN_PINCONF(U26, SCU620, 15),
+ ASPEED_PULL_DOWN_PINCONF(U26, SCU630, 15),
/* GPIOR6 */
- ASPEED_PULL_DOWN_PINCONF(W26, SCU620, 14),
+ ASPEED_PULL_DOWN_PINCONF(W26, SCU630, 14),
/* GPIOR5 */
- ASPEED_PULL_DOWN_PINCONF(T23, SCU620, 13),
+ ASPEED_PULL_DOWN_PINCONF(T23, SCU630, 13),
/* GPIOR4 */
- ASPEED_PULL_DOWN_PINCONF(U25, SCU620, 12),
+ ASPEED_PULL_DOWN_PINCONF(U25, SCU630, 12),
/* GPIOR3*/
- ASPEED_PULL_DOWN_PINCONF(V26, SCU620, 11),
+ ASPEED_PULL_DOWN_PINCONF(V26, SCU630, 11),
/* GPIOR2 */
- ASPEED_PULL_DOWN_PINCONF(V24, SCU620, 10),
+ ASPEED_PULL_DOWN_PINCONF(V24, SCU630, 10),
/* GPIOR1 */
- ASPEED_PULL_DOWN_PINCONF(U24, SCU620, 9),
+ ASPEED_PULL_DOWN_PINCONF(U24, SCU630, 9),
/* GPIOR0 */
- ASPEED_PULL_DOWN_PINCONF(V25, SCU620, 8),
+ ASPEED_PULL_DOWN_PINCONF(V25, SCU630, 8),
/* GPIOX7 */
ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 9+ messages in thread
* RE: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
2024-03-13 2:42 ` Delphine CC Chiu
(?)
@ 2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
-1 siblings, 0 replies; 9+ messages in thread
From: Delphine_CC_Chiu/WYHQ/Wiwynn @ 2024-03-13 6:57 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn, patrick, Andrew Jeffery,
Linus Walleij, Joel Stanley
Cc: Delphine_CC_Chiu/WYHQ/Wiwynn, linux-aspeed, openbmc, linux-gpio,
linux-arm-kernel, linux-kernel
> -----Original Message-----
> From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> Sent: Wednesday, March 13, 2024 10:42 AM
> To: patrick@stwcx.xyz; Andrew Jeffery <andrew@codeconstruct.com.au>; Linus
> Walleij <linus.walleij@linaro.org>; Joel Stanley <joel@jms.id.au>
> Cc: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@wiwynn.com>;
> linux-aspeed@lists.ozlabs.org; openbmc@lists.ozlabs.org;
> linux-gpio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
>
> Description:
> Correct the offset of "Disable GPIO Internal Pull-Down #4" register that should
> be 630h according to the AST2620 datasheet.
>
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> ---
Hi,
Please don't review this patch since ASPEED also provided the patch to
fix this issue.
Thanks!
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
0 siblings, 0 replies; 9+ messages in thread
From: Delphine_CC_Chiu/WYHQ/Wiwynn @ 2024-03-13 6:57 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn, patrick, Andrew Jeffery,
Linus Walleij, Joel Stanley
Cc: Delphine_CC_Chiu/WYHQ/Wiwynn, linux-aspeed, openbmc, linux-gpio,
linux-arm-kernel, linux-kernel
> -----Original Message-----
> From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> Sent: Wednesday, March 13, 2024 10:42 AM
> To: patrick@stwcx.xyz; Andrew Jeffery <andrew@codeconstruct.com.au>; Linus
> Walleij <linus.walleij@linaro.org>; Joel Stanley <joel@jms.id.au>
> Cc: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@wiwynn.com>;
> linux-aspeed@lists.ozlabs.org; openbmc@lists.ozlabs.org;
> linux-gpio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
>
> Description:
> Correct the offset of "Disable GPIO Internal Pull-Down #4" register that should
> be 630h according to the AST2620 datasheet.
>
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> ---
Hi,
Please don't review this patch since ASPEED also provided the patch to
fix this issue.
Thanks!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
0 siblings, 0 replies; 9+ messages in thread
From: Delphine_CC_Chiu/WYHQ/Wiwynn @ 2024-03-13 6:57 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn, patrick, Andrew Jeffery,
Linus Walleij, Joel Stanley
Cc: linux-aspeed, openbmc, linux-kernel, linux-gpio,
Delphine_CC_Chiu/WYHQ/Wiwynn, linux-arm-kernel
> -----Original Message-----
> From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> Sent: Wednesday, March 13, 2024 10:42 AM
> To: patrick@stwcx.xyz; Andrew Jeffery <andrew@codeconstruct.com.au>; Linus
> Walleij <linus.walleij@linaro.org>; Joel Stanley <joel@jms.id.au>
> Cc: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@wiwynn.com>;
> linux-aspeed@lists.ozlabs.org; openbmc@lists.ozlabs.org;
> linux-gpio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
>
> Description:
> Correct the offset of "Disable GPIO Internal Pull-Down #4" register that should
> be 630h according to the AST2620 datasheet.
>
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> ---
Hi,
Please don't review this patch since ASPEED also provided the patch to
fix this issue.
Thanks!
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
(?)
@ 2024-03-28 9:16 ` Linus Walleij
-1 siblings, 0 replies; 9+ messages in thread
From: Linus Walleij @ 2024-03-28 9:16 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn
Cc: patrick, Andrew Jeffery, Joel Stanley, linux-aspeed, openbmc,
linux-gpio, linux-arm-kernel, linux-kernel
On Wed, Mar 13, 2024 at 7:57 AM Delphine_CC_Chiu/WYHQ/Wiwynn
<Delphine_CC_Chiu@wiwynn.com> wrote:
> Please don't review this patch since ASPEED also provided the patch to
> fix this issue.
I added your Reported-by tag to Billy's patch since you obviously found the
same issue.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-28 9:16 ` Linus Walleij
0 siblings, 0 replies; 9+ messages in thread
From: Linus Walleij @ 2024-03-28 9:16 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn
Cc: patrick, Andrew Jeffery, Joel Stanley, linux-aspeed, openbmc,
linux-gpio, linux-arm-kernel, linux-kernel
On Wed, Mar 13, 2024 at 7:57 AM Delphine_CC_Chiu/WYHQ/Wiwynn
<Delphine_CC_Chiu@wiwynn.com> wrote:
> Please don't review this patch since ASPEED also provided the patch to
> fix this issue.
I added your Reported-by tag to Billy's patch since you obviously found the
same issue.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
@ 2024-03-28 9:16 ` Linus Walleij
0 siblings, 0 replies; 9+ messages in thread
From: Linus Walleij @ 2024-03-28 9:16 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn
Cc: linux-aspeed, linux-gpio, openbmc, linux-kernel, Joel Stanley,
linux-arm-kernel
On Wed, Mar 13, 2024 at 7:57 AM Delphine_CC_Chiu/WYHQ/Wiwynn
<Delphine_CC_Chiu@wiwynn.com> wrote:
> Please don't review this patch since ASPEED also provided the patch to
> fix this issue.
I added your Reported-by tag to Billy's patch since you obviously found the
same issue.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2024-03-28 9:17 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-03-13 2:42 [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630 Delphine CC Chiu
2024-03-13 2:42 ` Delphine CC Chiu
2024-03-13 2:42 ` Delphine CC Chiu
2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
2024-03-13 6:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
2024-03-28 9:16 ` Linus Walleij
2024-03-28 9:16 ` Linus Walleij
2024-03-28 9:16 ` Linus Walleij
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.