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From: Linus Walleij <linus.walleij@linaro.org>
To: Prathamesh Shete <pshete@nvidia.com>
Cc: "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	linux-tegra <linux-tegra@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Suresh Mangipudi <smangipudi@nvidia.com>,
	kkartik@nvidia.com
Subject: Re: [PATCH] pinctrl: tegra: Use correct offset for pin group
Date: Tue, 26 Oct 2021 01:28:01 +0200	[thread overview]
Message-ID: <CACRpkdapa8ReOf3Tfdi9LruatJO_GLEJaX8c6YuHooXDpreyEA@mail.gmail.com> (raw)
In-Reply-To: <20211025110959.27751-1-pshete@nvidia.com>

On Mon, Oct 25, 2021 at 1:10 PM Prathamesh Shete <pshete@nvidia.com> wrote:

> Function tegra_pinctrl_gpio_request_enable() and
> tegra_pinctrl_gpio_disable_free() uses pin offset instead
> of group offset, causing the driver to use wrong offset
> to enable gpio.
>
> Add a helper function tegra_pinctrl_get_group() to parse the
> pin group and determine correct offset.
>
> Signed-off-by: Kartik K <kkartik@nvidia.com>
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>

Patch applied.

Yours,
Linus Walleij

  reply	other threads:[~2021-10-25 23:28 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-25 11:09 [PATCH] pinctrl: tegra: Use correct offset for pin group Prathamesh Shete
2021-10-25 23:28 ` Linus Walleij [this message]
2021-10-26 12:37 ` kernel test robot
2021-10-26 12:37   ` kernel test robot
2021-10-26 12:54 ` kernel test robot
2021-10-26 17:58 ` kernel test robot

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