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From: Linus Walleij <linus.walleij@linaro.org>
To: Paul Osmialowski <pawelo@king.net.pl>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Jiri Slaby <jslaby@suse.cz>, Kumar Gala <galak@codeaurora.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Pawel Moll <pawel.moll@arm.com>, Rob Herring <robh+dt@kernel.org>,
	Russell King <linux@arm.linux.org.uk>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Vinod Koul <vinod.koul@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	linux-clk@vger.kernel.org,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	dmaengine@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Nicolas
Subject: Re: [PATCH v2 3/9] arm: twr-k70f120m: clock driver for Kinetis SoC
Date: Tue, 14 Jul 2015 11:03:59 +0200	[thread overview]
Message-ID: <CACRpkdasMqFCwy=ZEvMLeG2Z-xV01dbf8cXaPACP1=RSz2gdjw@mail.gmail.com> (raw)
In-Reply-To: <1435667250-28299-4-git-send-email-pawelo@king.net.pl>

On Tue, Jun 30, 2015 at 2:27 PM, Paul Osmialowski <pawelo@king.net.pl> wrote:

> Based on K70P256M150SF3RM.pdf K70 Sub-Family Reference Manual, Rev. 3.
>
> Signed-off-by: Paul Osmialowski <pawelo@king.net.pl>
(...)
> +struct kinetis_sim_regs {
> +       u32 sopt1;      /* System Options Register 1 */
> +       u32 rsv0[1024];
> +       u32 sopt2;      /* System Options Register 2 */
> +       u32 rsv1;
> +       u32 sopt4;      /* System Options Register 4 */
> +       u32 sopt5;      /* System Options Register 5 */
> +       u32 sopt6;      /* System Options Register 6 */
> +       u32 sopt7;      /* System Options Register 7 */
> +       u32 rsv2[2];
> +       u32 sdid;       /* System Device Identification Register */
> +       u32 scgc[KINETIS_SIM_CG_NUMREGS];       /* Clock Gating Regs 1...7 */
> +       u32 clkdiv1;    /* System Clock Divider Register 1 */
> +       u32 clkdiv2;    /* System Clock Divider Register 2 */
> +       u32 fcfg1;      /* Flash Configuration Register 1 */
> +       u32 fcfg2;      /* Flash Configuration Register 2 */
> +       u32 uidh;       /* Unique Identification Register High */
> +       u32 uidmh;      /* Unique Identification Register Mid-High */
> +       u32 uidml;      /* Unique Identification Register Mid Low */
> +       u32 uidl;       /* Unique Identification Register Low */
> +       u32 clkdiv3;    /* System Clock Divider Register 3 */
> +       u32 clkdiv4;    /* System Clock Divider Register 4 */
> +       u32 mcr;        /* Misc Control Register */
> +};

Now there is this design pattern where you copy the datasheet
register map to a struct again.

This is not good if there is a second revision of the hardware and some
registers are shuffled around. IMO it is better to just use #defines
for register
offsets, so you can do exceptions later. Else a new hardware revision
leads to a new struct with new accessor functions etc etc.

Yours,
Linus Walleij

WARNING: multiple messages have this Message-ID (diff)
From: Linus Walleij <linus.walleij@linaro.org>
To: Paul Osmialowski <pawelo@king.net.pl>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Jiri Slaby <jslaby@suse.cz>, Kumar Gala <galak@codeaurora.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Pawel Moll <pawel.moll@arm.com>, Rob Herring <robh+dt@kernel.org>,
	Russell King <linux@arm.linux.org.uk>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Vinod Koul <vinod.koul@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	linux-clk@vger.kernel.org,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	dmaengine@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Nicolas Pitre <nicolas.pitre@linaro.org>,
	Paul Bolle <pebolle@tiscali.nl>,
	Thomas Gleixner <tglx@linutronix.de>,
	Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>,
	Anson Huang <b20788@freescale.com>,
	Frank Li <Frank.Li@freescale.com>,
	Jingchang Lu <jingchang.lu@freescale.com>,
	Rob Herring <r.herring@freescale.com>,
	Yuri Tikhonov <yur@emcraft.com>,
	Sergei Poselenov <sposelenov@emcraft.com>,
	Alexander Potashev <aspotashev@emcraft.com>
Subject: Re: [PATCH v2 3/9] arm: twr-k70f120m: clock driver for Kinetis SoC
Date: Tue, 14 Jul 2015 11:03:59 +0200	[thread overview]
Message-ID: <CACRpkdasMqFCwy=ZEvMLeG2Z-xV01dbf8cXaPACP1=RSz2gdjw@mail.gmail.com> (raw)
In-Reply-To: <1435667250-28299-4-git-send-email-pawelo@king.net.pl>

On Tue, Jun 30, 2015 at 2:27 PM, Paul Osmialowski <pawelo@king.net.pl> wrote:

> Based on K70P256M150SF3RM.pdf K70 Sub-Family Reference Manual, Rev. 3.
>
> Signed-off-by: Paul Osmialowski <pawelo@king.net.pl>
(...)
> +struct kinetis_sim_regs {
> +       u32 sopt1;      /* System Options Register 1 */
> +       u32 rsv0[1024];
> +       u32 sopt2;      /* System Options Register 2 */
> +       u32 rsv1;
> +       u32 sopt4;      /* System Options Register 4 */
> +       u32 sopt5;      /* System Options Register 5 */
> +       u32 sopt6;      /* System Options Register 6 */
> +       u32 sopt7;      /* System Options Register 7 */
> +       u32 rsv2[2];
> +       u32 sdid;       /* System Device Identification Register */
> +       u32 scgc[KINETIS_SIM_CG_NUMREGS];       /* Clock Gating Regs 1...7 */
> +       u32 clkdiv1;    /* System Clock Divider Register 1 */
> +       u32 clkdiv2;    /* System Clock Divider Register 2 */
> +       u32 fcfg1;      /* Flash Configuration Register 1 */
> +       u32 fcfg2;      /* Flash Configuration Register 2 */
> +       u32 uidh;       /* Unique Identification Register High */
> +       u32 uidmh;      /* Unique Identification Register Mid-High */
> +       u32 uidml;      /* Unique Identification Register Mid Low */
> +       u32 uidl;       /* Unique Identification Register Low */
> +       u32 clkdiv3;    /* System Clock Divider Register 3 */
> +       u32 clkdiv4;    /* System Clock Divider Register 4 */
> +       u32 mcr;        /* Misc Control Register */
> +};

Now there is this design pattern where you copy the datasheet
register map to a struct again.

This is not good if there is a second revision of the hardware and some
registers are shuffled around. IMO it is better to just use #defines
for register
offsets, so you can do exceptions later. Else a new hardware revision
leads to a new struct with new accessor functions etc etc.

Yours,
Linus Walleij

WARNING: multiple messages have this Message-ID (diff)
From: Linus Walleij <linus.walleij@linaro.org>
To: Paul Osmialowski <pawelo@king.net.pl>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Jiri Slaby <jslaby@suse.cz>, Kumar Gala <galak@codeaurora.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Pawel Moll <pawel.moll@arm.com>, Rob Herring <robh+dt@kernel.org>,
	Russell King <linux@arm.linux.org.uk>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Vinod Koul <vinod.koul@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	linux-clk@vger.kernel.org,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	dmaengine@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Nicolas Pitre <nicolas.pitre@linaro.org>,
	Paul Bolle <pebolle@tiscali.nl>,
	Thomas Gleixner <tglx@linutronix.de>,
	Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>,
	Anson Huang <b20788@freescale.com>,
	Frank Li <Frank.Li@freescale.com>,
	Jingchang Lu <jingchang.lu@freescale.com>,
	Rob Herring <r.herring@freescale.com>,
	Yuri Tikhonov <yur@emcraft.com>,
	Sergei Poselenov <sposelenov@emcraft.com>,
	Alexander Potashev <aspotashev@emcraft.com>
Subject: Re: [PATCH v2 3/9] arm: twr-k70f120m: clock driver for Kinetis SoC
Date: Tue, 14 Jul 2015 11:03:59 +0200	[thread overview]
Message-ID: <CACRpkdasMqFCwy=ZEvMLeG2Z-xV01dbf8cXaPACP1=RSz2gdjw@mail.gmail.com> (raw)
In-Reply-To: <1435667250-28299-4-git-send-email-pawelo@king.net.pl>

On Tue, Jun 30, 2015 at 2:27 PM, Paul Osmialowski <pawelo@king.net.pl> wrote:

> Based on K70P256M150SF3RM.pdf K70 Sub-Family Reference Manual, Rev. 3.
>
> Signed-off-by: Paul Osmialowski <pawelo@king.net.pl>
(...)
> +struct kinetis_sim_regs {
> +       u32 sopt1;      /* System Options Register 1 */
> +       u32 rsv0[1024];
> +       u32 sopt2;      /* System Options Register 2 */
> +       u32 rsv1;
> +       u32 sopt4;      /* System Options Register 4 */
> +       u32 sopt5;      /* System Options Register 5 */
> +       u32 sopt6;      /* System Options Register 6 */
> +       u32 sopt7;      /* System Options Register 7 */
> +       u32 rsv2[2];
> +       u32 sdid;       /* System Device Identification Register */
> +       u32 scgc[KINETIS_SIM_CG_NUMREGS];       /* Clock Gating Regs 1...7 */
> +       u32 clkdiv1;    /* System Clock Divider Register 1 */
> +       u32 clkdiv2;    /* System Clock Divider Register 2 */
> +       u32 fcfg1;      /* Flash Configuration Register 1 */
> +       u32 fcfg2;      /* Flash Configuration Register 2 */
> +       u32 uidh;       /* Unique Identification Register High */
> +       u32 uidmh;      /* Unique Identification Register Mid-High */
> +       u32 uidml;      /* Unique Identification Register Mid Low */
> +       u32 uidl;       /* Unique Identification Register Low */
> +       u32 clkdiv3;    /* System Clock Divider Register 3 */
> +       u32 clkdiv4;    /* System Clock Divider Register 4 */
> +       u32 mcr;        /* Misc Control Register */
> +};

Now there is this design pattern where you copy the datasheet
register map to a struct again.

This is not good if there is a second revision of the hardware and some
registers are shuffled around. IMO it is better to just use #defines
for register
offsets, so you can do exceptions later. Else a new hardware revision
leads to a new struct with new accessor functions etc etc.

Yours,
Linus Walleij

WARNING: multiple messages have this Message-ID (diff)
From: linus.walleij@linaro.org (Linus Walleij)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/9] arm: twr-k70f120m: clock driver for Kinetis SoC
Date: Tue, 14 Jul 2015 11:03:59 +0200	[thread overview]
Message-ID: <CACRpkdasMqFCwy=ZEvMLeG2Z-xV01dbf8cXaPACP1=RSz2gdjw@mail.gmail.com> (raw)
In-Reply-To: <1435667250-28299-4-git-send-email-pawelo@king.net.pl>

On Tue, Jun 30, 2015 at 2:27 PM, Paul Osmialowski <pawelo@king.net.pl> wrote:

> Based on K70P256M150SF3RM.pdf K70 Sub-Family Reference Manual, Rev. 3.
>
> Signed-off-by: Paul Osmialowski <pawelo@king.net.pl>
(...)
> +struct kinetis_sim_regs {
> +       u32 sopt1;      /* System Options Register 1 */
> +       u32 rsv0[1024];
> +       u32 sopt2;      /* System Options Register 2 */
> +       u32 rsv1;
> +       u32 sopt4;      /* System Options Register 4 */
> +       u32 sopt5;      /* System Options Register 5 */
> +       u32 sopt6;      /* System Options Register 6 */
> +       u32 sopt7;      /* System Options Register 7 */
> +       u32 rsv2[2];
> +       u32 sdid;       /* System Device Identification Register */
> +       u32 scgc[KINETIS_SIM_CG_NUMREGS];       /* Clock Gating Regs 1...7 */
> +       u32 clkdiv1;    /* System Clock Divider Register 1 */
> +       u32 clkdiv2;    /* System Clock Divider Register 2 */
> +       u32 fcfg1;      /* Flash Configuration Register 1 */
> +       u32 fcfg2;      /* Flash Configuration Register 2 */
> +       u32 uidh;       /* Unique Identification Register High */
> +       u32 uidmh;      /* Unique Identification Register Mid-High */
> +       u32 uidml;      /* Unique Identification Register Mid Low */
> +       u32 uidl;       /* Unique Identification Register Low */
> +       u32 clkdiv3;    /* System Clock Divider Register 3 */
> +       u32 clkdiv4;    /* System Clock Divider Register 4 */
> +       u32 mcr;        /* Misc Control Register */
> +};

Now there is this design pattern where you copy the datasheet
register map to a struct again.

This is not good if there is a second revision of the hardware and some
registers are shuffled around. IMO it is better to just use #defines
for register
offsets, so you can do exceptions later. Else a new hardware revision
leads to a new struct with new accessor functions etc etc.

Yours,
Linus Walleij

  parent reply	other threads:[~2015-07-14  9:04 UTC|newest]

Thread overview: 140+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-30 12:27 [PATCH v2 0/9] [New BSP] Add initial support for Freescale Kinetis TWR-K70F120M development kit Paul Osmialowski
2015-06-30 12:27 ` Paul Osmialowski
2015-06-30 12:27 ` Paul Osmialowski
2015-06-30 12:27 ` [PATCH v2 2/9] arm: twr-k70f120m: basic support for Kinetis TWR-K70F120M Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-06-30 12:27 ` [PATCH v2 3/9] arm: twr-k70f120m: clock driver for Kinetis SoC Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-06-30 20:36   ` Arnd Bergmann
2015-06-30 20:36     ` Arnd Bergmann
2015-06-30 20:36     ` Arnd Bergmann
2015-07-01 15:57     ` Paul Osmialowski
2015-07-01 15:57       ` Paul Osmialowski
2015-07-01 15:57       ` Paul Osmialowski
     [not found]       ` <alpine.LNX.2.00.1507011756140.14440-bi+AKbBUZKY6gyzm1THtWbp2dZbC/Bob@public.gmane.org>
2015-07-02 10:08         ` Paul Osmialowski
2015-07-02 10:08           ` Paul Osmialowski
2015-07-02 10:08           ` Paul Osmialowski
2015-07-02 12:40           ` Arnd Bergmann
2015-07-02 12:40             ` Arnd Bergmann
2015-07-02 12:40             ` Arnd Bergmann
2015-07-02 21:42             ` Paul Osmialowski
2015-07-02 21:42               ` Paul Osmialowski
2015-07-02 21:42               ` Paul Osmialowski
2015-07-02 22:08               ` Thomas Gleixner
2015-07-02 22:08                 ` Thomas Gleixner
2015-07-02 22:08                 ` Thomas Gleixner
2015-07-03 17:40                 ` Paul Osmialowski
2015-07-03 17:40                   ` Paul Osmialowski
2015-07-03 17:40                   ` Paul Osmialowski
2015-07-04 19:54                 ` Arnd Bergmann
2015-07-04 19:54                   ` Arnd Bergmann
2015-07-04 19:54                   ` Arnd Bergmann
2015-07-04 21:50                   ` Paul Osmialowski
2015-07-04 21:50                     ` Paul Osmialowski
2015-07-04 21:50                     ` Paul Osmialowski
2015-07-06 20:57                     ` Paul Osmialowski
2015-07-06 20:57                       ` Paul Osmialowski
2015-07-06 20:57                       ` Paul Osmialowski
2015-07-24  3:42                     ` Michael Turquette
2015-07-24  3:42                       ` Michael Turquette
2015-07-24  3:42                       ` Michael Turquette
2015-07-24  3:42                       ` Michael Turquette
2015-07-26 20:24                       ` Paul Osmialowski
2015-07-26 20:24                         ` Paul Osmialowski
2015-07-26 20:24                         ` Paul Osmialowski
2015-07-28 16:03                         ` Michael Turquette
2015-07-28 16:03                           ` Michael Turquette
2015-07-28 16:03                           ` Michael Turquette
2015-07-28 20:30                           ` Paul Osmialowski
2015-07-28 20:30                             ` Paul Osmialowski
2015-07-28 20:30                             ` Paul Osmialowski
2015-07-29 23:05                             ` Michael Turquette
2015-07-29 23:05                               ` Michael Turquette
2015-07-29 23:05                               ` Michael Turquette
2015-07-30 21:40                               ` Paul Osmialowski
2015-07-30 21:40                                 ` Paul Osmialowski
2015-07-30 21:40                                 ` Paul Osmialowski
2015-08-01  0:58                                 ` Michael Turquette
2015-08-01  0:58                                   ` Michael Turquette
2015-08-01  0:58                                   ` Michael Turquette
2015-08-01 15:27                                   ` Paul Osmialowski
2015-08-01 15:27                                     ` Paul Osmialowski
2015-08-01 15:27                                     ` Paul Osmialowski
2015-08-05 19:27                                     ` Michael Turquette
2015-08-05 19:27                                       ` Michael Turquette
2015-08-05 19:27                                       ` Michael Turquette
2015-07-14  9:03   ` Linus Walleij [this message]
2015-07-14  9:03     ` Linus Walleij
2015-07-14  9:03     ` Linus Walleij
2015-07-14  9:03     ` Linus Walleij
2015-07-15  7:31     ` Paul Osmialowski
2015-07-15  7:31       ` Paul Osmialowski
2015-07-15  7:31       ` Paul Osmialowski
2015-07-15  7:31       ` Paul Osmialowski
2015-07-15 17:34       ` Paul Osmialowski
2015-07-15 17:34         ` Paul Osmialowski
2015-07-15 17:34         ` Paul Osmialowski
2015-07-15 17:34         ` Paul Osmialowski
     [not found] ` <1435667250-28299-1-git-send-email-pawelo-rhuoMcPwk82rDJvtcaxF/A@public.gmane.org>
2015-06-30 12:27   ` [PATCH v2 1/9] arm: allow copying of vector table to internal SRAM memory Paul Osmialowski
2015-06-30 12:27     ` Paul Osmialowski
2015-06-30 12:27     ` Paul Osmialowski
2015-06-30 12:27   ` [PATCH v2 4/9] arm: twr-k70f120m: timer driver for Kinetis SoC Paul Osmialowski
2015-06-30 12:27     ` Paul Osmialowski
2015-06-30 12:27     ` Paul Osmialowski
     [not found]     ` <1435667250-28299-5-git-send-email-pawelo-rhuoMcPwk82rDJvtcaxF/A@public.gmane.org>
2015-06-30 20:43       ` Arnd Bergmann
2015-06-30 20:43         ` Arnd Bergmann
2015-06-30 20:43         ` Arnd Bergmann
2015-07-01 11:44         ` Paul Osmialowski
2015-07-01 11:44           ` Paul Osmialowski
2015-07-01 11:44           ` Paul Osmialowski
2015-07-05 14:39         ` Rob Herring
2015-07-05 14:39           ` Rob Herring
2015-07-05 14:39           ` Rob Herring
2015-07-05 14:39           ` Rob Herring
2015-07-01  7:51     ` Thomas Gleixner
2015-07-01  7:51       ` Thomas Gleixner
2015-07-01  7:51       ` Thomas Gleixner
2015-07-01  8:42       ` Paul Osmialowski
2015-07-01  8:42         ` Paul Osmialowski
2015-07-01  8:42         ` Paul Osmialowski
2015-07-01 13:28         ` Thomas Gleixner
2015-07-01 13:28           ` Thomas Gleixner
2015-07-01 13:28           ` Thomas Gleixner
2015-07-01 14:20           ` Paul Osmialowski
2015-07-01 14:20             ` Paul Osmialowski
2015-07-01 14:20             ` Paul Osmialowski
2015-07-14  8:59             ` Linus Walleij
2015-07-14  8:59               ` Linus Walleij
2015-07-14  8:59               ` Linus Walleij
2015-07-14  8:59               ` Linus Walleij
2015-06-30 12:27   ` [PATCH v2 9/9] arm: twr-k70f120m: use Freescale lpuart driver with " Paul Osmialowski
2015-06-30 12:27     ` Paul Osmialowski
2015-06-30 12:27     ` Paul Osmialowski
2015-06-30 12:27 ` [PATCH v2 5/9] arm: twr-k70f120m: IOMUX driver for " Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-07-14  8:55   ` Linus Walleij
2015-07-14  8:55     ` Linus Walleij
2015-07-14  8:55     ` Linus Walleij
2015-07-14  8:55     ` Linus Walleij
2015-06-30 12:27 ` [PATCH v2 6/9] arm: twr-k70f120m: extend Freescale eDMA driver with the ability to support " Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-07-05  6:45   ` Vinod Koul
2015-07-05  6:45     ` Vinod Koul
2015-07-05  6:45     ` Vinod Koul
2015-07-05  6:45     ` Vinod Koul
2015-07-05  9:45     ` Paul Osmialowski
2015-07-05  9:45       ` Paul Osmialowski
2015-07-05  9:45       ` Paul Osmialowski
2015-06-30 12:27 ` [PATCH v2 7/9] arm: twr-k70f120m: use Freescale eDMA driver with " Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski
2015-06-30 20:49   ` Arnd Bergmann
2015-06-30 20:49     ` Arnd Bergmann
2015-06-30 20:49     ` Arnd Bergmann
2015-07-01  6:54     ` Paul Osmialowski
2015-07-01  6:54       ` Paul Osmialowski
2015-07-01  6:54       ` Paul Osmialowski
2015-06-30 12:27 ` [PATCH v2 8/9] arm: twr-k70f120m: extend Freescale lpuart driver with ability to support " Paul Osmialowski
2015-06-30 12:27   ` Paul Osmialowski

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