* [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
@ 2012-07-14 2:03 ` Rob Herring
2012-07-14 12:22 ` Nicolas Pitre
2012-07-14 2:03 ` [PATCH v2 02/15] ARM: move PCI i/o resource setup into common code Rob Herring
` (15 subsequent siblings)
16 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:03 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
This adds a fixed virtual mapping for PCI i/o addresses. The mapping is
located at the last 2MB of vmalloc region (0xfee00000-0xff000000). 2MB
is used to align with PMD size, but IO_SPACE_LIMIT is 1MB. The space
is reserved just before .map_io and can be mapped at any time later with
pci_ioremap_io.
This has changed completely from the 1st implementation which only
supported creating the static mapping at .map_io.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nicolas Pitre <nico@linaro.org>
---
Documentation/arm/memory.txt | 3 +++
arch/arm/include/asm/io.h | 8 ++++++++
arch/arm/include/asm/mach/map.h | 7 +++++++
arch/arm/include/asm/mach/pci.h | 15 +++++++++++++++
arch/arm/kernel/bios32.c | 1 +
arch/arm/mm/ioremap.c | 14 ++++++++++++++
arch/arm/mm/mmu.c | 25 +++++++++++++++++--------
7 files changed, 65 insertions(+), 8 deletions(-)
diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt
index 208a2d4..83e9b18 100644
--- a/Documentation/arm/memory.txt
+++ b/Documentation/arm/memory.txt
@@ -51,6 +51,9 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned
ff000000 ffbfffff Reserved for future expansion of DMA
mapping region.
+fef00000 feffffff Mapping of PCI I/O space. This is a static
+ mapping within the vmalloc space.
+
VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
Memory returned by vmalloc/ioremap will
be dynamically placed in this region.
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 815c669..8f4db67 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -113,11 +113,19 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
#define __iowmb() do { } while (0)
#endif
+/* PCI fixed i/o mapping */
+#define PCI_IO_VIRT_BASE 0xfee00000
+
+extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
+
/*
* Now, pick up the machine-defined IO definitions
*/
#ifdef CONFIG_NEED_MACH_IO_H
#include <mach/io.h>
+#elif defined(CONFIG_PCI)
+#define IO_SPACE_LIMIT ((resource_size_t)0xfffff)
+#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT))
#else
#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
#endif
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index a6efcdd..808c517 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -9,6 +9,9 @@
*
* Page table mapping constructs and function prototypes
*/
+#ifndef __ASM_MACH_MAP_H
+#define __ASM_MACH_MAP_H
+
#include <asm/io.h>
struct map_desc {
@@ -34,6 +37,7 @@ struct map_desc {
#ifdef CONFIG_MMU
extern void iotable_init(struct map_desc *, int);
+extern void vm_reserve_area_early(unsigned long addr, unsigned long size);
struct mem_type;
extern const struct mem_type *get_mem_type(unsigned int type);
@@ -44,4 +48,7 @@ extern int ioremap_page(unsigned long virt, unsigned long phys,
const struct mem_type *mtype);
#else
#define iotable_init(map,num) do { } while (0)
+#define vm_reserve_area_early(a,s) do { } while (0)
+#endif
+
#endif
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 26c511f..51630c0 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -11,6 +11,8 @@
#ifndef __ASM_MACH_PCI_H
#define __ASM_MACH_PCI_H
+#include <asm/mach/map.h>
+
struct pci_sys_data;
struct pci_ops;
struct pci_bus;
@@ -55,6 +57,19 @@ struct pci_sys_data {
void pci_common_init(struct hw_pci *);
/*
+ * Setup fixed I/O mapping.
+ */
+#if defined(CONFIG_PCI) && !defined(CONFIG_NEED_MACH_IO_H)
+/* Called from devicemaps_init before .map_io */
+static inline void pci_reserve_io(void)
+{
+ vm_reserve_area_early(PCI_IO_VIRT_BASE, SZ_2M);
+}
+#else
+static inline void pci_reserve_io(void) {}
+#endif
+
+/*
* PCI controllers
*/
extern struct pci_ops iop3xx_ops;
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 2555250..311e1cc 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -13,6 +13,7 @@
#include <linux/io.h>
#include <asm/mach-types.h>
+#include <asm/mach/map.h>
#include <asm/mach/pci.h>
static int debug_pci;
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 4f55f50..8727802 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -36,6 +36,7 @@
#include <asm/system_info.h>
#include <asm/mach/map.h>
+#include <asm/mach/pci.h>
#include "mm.h"
int ioremap_page(unsigned long virt, unsigned long phys,
@@ -383,3 +384,16 @@ void __arm_iounmap(volatile void __iomem *io_addr)
arch_iounmap(io_addr);
}
EXPORT_SYMBOL(__arm_iounmap);
+
+#ifdef CONFIG_PCI
+int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr)
+{
+ BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT);
+
+ return ioremap_page_range(PCI_IO_VIRT_BASE + offset,
+ PCI_IO_VIRT_BASE + offset + SZ_64K,
+ phys_addr,
+ __pgprot(get_mem_type(MT_DEVICE)->prot_pte));
+}
+EXPORT_SYMBOL_GPL(pci_ioremap_io);
+#endif
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index cf4528d..c5ca07b 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -31,6 +31,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+#include <asm/mach/pci.h>
#include "mm.h"
@@ -791,6 +792,18 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
}
}
+void __init vm_reserve_area_early(unsigned long addr, unsigned long size)
+{
+ struct vm_struct *vm;
+
+ vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
+ vm->addr = (void *)addr;
+ vm->size = size;
+ vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
+ vm->caller = vm_reserve_area_early;
+ vm_area_add_early(vm++);
+}
+
#ifndef CONFIG_ARM_LPAE
/*
@@ -808,14 +821,7 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
static void __init pmd_empty_section_gap(unsigned long addr)
{
- struct vm_struct *vm;
-
- vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
- vm->addr = (void *)addr;
- vm->size = SECTION_SIZE;
- vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
- vm->caller = pmd_empty_section_gap;
- vm_area_add_early(vm);
+ vm_reserve_area_early(addr, SECTION_SIZE);
}
static void __init fill_pmd_gaps(void)
@@ -1140,6 +1146,9 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
create_mapping(&map);
}
+ /* Reserve fixed i/o space in VMALLOC region */
+ pci_reserve_io();
+
/*
* Ask the machine support to map in the statically mapped devices.
*/
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping
2012-07-14 2:03 ` [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping Rob Herring
@ 2012-07-14 12:22 ` Nicolas Pitre
2012-07-16 4:35 ` Rob Herring
0 siblings, 1 reply; 39+ messages in thread
From: Nicolas Pitre @ 2012-07-14 12:22 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, 13 Jul 2012, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> This adds a fixed virtual mapping for PCI i/o addresses. The mapping is
> located at the last 2MB of vmalloc region (0xfee00000-0xff000000). 2MB
> is used to align with PMD size, but IO_SPACE_LIMIT is 1MB. The space
> is reserved just before .map_io and can be mapped at any time later with
> pci_ioremap_io.
>
> This has changed completely from the 1st implementation which only
> supported creating the static mapping at .map_io.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Nicolas Pitre <nico@linaro.org>
A few comments below:
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index cf4528d..c5ca07b 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -31,6 +31,7 @@
>
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> +#include <asm/mach/pci.h>
>
> #include "mm.h"
>
> @@ -791,6 +792,18 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
> }
> }
>
> +void __init vm_reserve_area_early(unsigned long addr, unsigned long size)
> +{
> + struct vm_struct *vm;
> +
> + vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
> + vm->addr = (void *)addr;
> + vm->size = size;
> + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
> + vm->caller = vm_reserve_area_early;
This is not providing much useful information when looking at
/proc/vmallocinfo anymore. What about adding a void *caller argument to
this function and initializing vm->caller with it to identify the true
origin of the region?
> + vm_area_add_early(vm++);
Why ++ ?
Other than that...
Acked-by: Nicolas Pitre <nico@linaro.org>
Nicolas
^ permalink raw reply [flat|nested] 39+ messages in thread* [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping
2012-07-14 12:22 ` Nicolas Pitre
@ 2012-07-16 4:35 ` Rob Herring
2012-07-16 13:32 ` Nicolas Pitre
0 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-16 4:35 UTC (permalink / raw)
To: linux-arm-kernel
On 07/14/2012 07:22 AM, Nicolas Pitre wrote:
> On Fri, 13 Jul 2012, Rob Herring wrote:
>> + vm->size = size;
>> + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
>> + vm->caller = vm_reserve_area_early;
>
> This is not providing much useful information when looking at
> /proc/vmallocinfo anymore. What about adding a void *caller argument to
> this function and initializing vm->caller with it to identify the true
> origin of the region?
What about just using __builtin_return_address(0)? Since pci_reserve_io
and devicemaps_init get inlined, ultimately it shows paging_init doing that.
>
>> + vm_area_add_early(vm
Rob++);
>
> Why ++ ?
Just a cut and paste left over.
>
> Other than that...
>
> Acked-by: Nicolas Pitre <nico@linaro.org>
>
Thanks!
Rob
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping
2012-07-16 4:35 ` Rob Herring
@ 2012-07-16 13:32 ` Nicolas Pitre
0 siblings, 0 replies; 39+ messages in thread
From: Nicolas Pitre @ 2012-07-16 13:32 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, 15 Jul 2012, Rob Herring wrote:
> On 07/14/2012 07:22 AM, Nicolas Pitre wrote:
> > On Fri, 13 Jul 2012, Rob Herring wrote:
>
> >> + vm->size = size;
> >> + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
> >> + vm->caller = vm_reserve_area_early;
> >
> > This is not providing much useful information when looking at
> > /proc/vmallocinfo anymore. What about adding a void *caller argument to
> > this function and initializing vm->caller with it to identify the true
> > origin of the region?
>
> What about just using __builtin_return_address(0)? Since pci_reserve_io
> and devicemaps_init get inlined, ultimately it shows paging_init doing that.
Using __builtin_return_address(0) doesn't prevent gcc from inlining the
callers in their own callers and then the provided information isn't as
useful. They won't get inlined if you pass the address of the caller.
Furthermore __builtin_return_address(0) provides the call site address
and not the caller's start address which isn't as pretty.
Nicolas
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 02/15] ARM: move PCI i/o resource setup into common code
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
2012-07-14 2:03 ` [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping Rob Herring
@ 2012-07-14 2:03 ` Rob Herring
2012-07-14 2:03 ` [PATCH v2 03/15] ARM: versatile: use fixed PCI i/o mapping Rob Herring
` (14 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:03 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
With consolidation of the PCI i/o mappings, the i/o space is being
set to start at a PCI bus addr of 0x0 and fixed to 64K per bus. In
this case the core ARM PCI setup code can setup the i/o resource.
Currently, the resource is only setup if the platform did not setup
an i/o resource.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/include/asm/mach/pci.h | 3 +++
arch/arm/kernel/bios32.c | 41 ++++++++++++++++++++++++++++++++++-----
2 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 51630c0..423edff 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -11,6 +11,7 @@
#ifndef __ASM_MACH_PCI_H
#define __ASM_MACH_PCI_H
+#include <linux/ioport.h>
#include <asm/mach/map.h>
struct pci_sys_data;
@@ -44,6 +45,8 @@ struct pci_sys_data {
unsigned long io_offset; /* bus->cpu IO mapping offset */
struct pci_bus *bus; /* PCI bus */
struct list_head resources; /* root bus resources (apertures) */
+ struct resource io_res;
+ char io_res_name[12];
/* Bridge swizzling */
u8 (*swizzle)(struct pci_dev *, u8 *);
/* IRQ mapping */
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 311e1cc..316dd02 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -424,6 +424,38 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
return irq;
}
+static int __init pcibios_init_resources(int busnr, struct pci_sys_data *sys)
+{
+ int ret;
+ struct pci_host_bridge_window *window;
+
+ if (list_empty(&sys->resources)) {
+ pci_add_resource_offset(&sys->resources,
+ &iomem_resource, sys->mem_offset);
+ }
+
+ list_for_each_entry(window, &sys->resources, list) {
+ if (resource_type(window->res) == IORESOURCE_IO)
+ return 0;
+ }
+
+ sys->io_res.start = (busnr * SZ_64K) ? : pcibios_min_io;
+ sys->io_res.end = (busnr + 1) * SZ_64K - 1;
+ sys->io_res.flags = IORESOURCE_IO;
+ sys->io_res.name = sys->io_res_name;
+ sprintf(sys->io_res_name, "PCI%d I/O", busnr);
+
+ ret = request_resource(&ioport_resource, &sys->io_res);
+ if (ret) {
+ pr_err("PCI: unable to allocate I/O port region (%d)\n", ret);
+ return ret;
+ }
+ pci_add_resource_offset(&sys->resources, &sys->io_res,
+ sys->io_offset);
+
+ return 0;
+}
+
static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head)
{
struct pci_sys_data *sys = NULL;
@@ -446,11 +478,10 @@ static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head)
ret = hw->setup(nr, sys);
if (ret > 0) {
- if (list_empty(&sys->resources)) {
- pci_add_resource_offset(&sys->resources,
- &ioport_resource, sys->io_offset);
- pci_add_resource_offset(&sys->resources,
- &iomem_resource, sys->mem_offset);
+ ret = pcibios_init_resources(nr, sys);
+ if (ret) {
+ kfree(sys);
+ break;
}
if (hw->scan)
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 03/15] ARM: versatile: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
2012-07-14 2:03 ` [PATCH v2 01/15] ARM: Add fixed PCI i/o mapping Rob Herring
2012-07-14 2:03 ` [PATCH v2 02/15] ARM: move PCI i/o resource setup into common code Rob Herring
@ 2012-07-14 2:03 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 04/15] ARM: tegra: " Rob Herring
` (13 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:03 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move versatile PCI to fixed i/o mapping and remove io.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-versatile/core.c | 5 -----
arch/arm/mach-versatile/include/mach/hardware.h | 1 -
arch/arm/mach-versatile/include/mach/io.h | 27 -----------------------
arch/arm/mach-versatile/pci.c | 22 ++++--------------
5 files changed, 4 insertions(+), 52 deletions(-)
delete mode 100644 arch/arm/mach-versatile/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a91009c..8fb7e4a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -293,7 +293,6 @@ config ARCH_VERSATILE
select ICST
select GENERIC_CLOCKEVENTS
select ARCH_WANT_OPTIONAL_GPIOLIB
- select NEED_MACH_IO_H if PCI
select PLAT_VERSATILE
select PLAT_VERSATILE_CLCD
select PLAT_VERSATILE_FPGA_IRQ
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index cd8ea35..ca7902c 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -169,11 +169,6 @@ static struct map_desc versatile_io_desc[] __initdata = {
.pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
.length = VERSATILE_PCI_CFG_BASE_SIZE,
.type = MT_DEVICE
- }, {
- .virtual = (unsigned long)VERSATILE_PCI_VIRT_MEM_BASE0,
- .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
- .length = IO_SPACE_LIMIT,
- .type = MT_DEVICE
},
#endif
};
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 408e58d..3e5d425 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -29,7 +29,6 @@
*/
#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul
#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul
-#define VERSATILE_PCI_VIRT_MEM_BASE0 (void __iomem *)PCIO_BASE
/* macro to get at MMIO space when running virtually */
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
deleted file mode 100644
index 0406513..0000000
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-versatile/include/mach/io.h
- *
- * Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define PCIO_BASE 0xeb000000ul
-
-#define __io(a) ((a) + PCIO_BASE)
-
-#endif
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index e95bf84..2f84f40 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -169,13 +169,6 @@ static struct pci_ops pci_versatile_ops = {
.write = versatile_write_config,
};
-static struct resource io_port = {
- .name = "PCI",
- .start = 0,
- .end = IO_SPACE_LIMIT,
- .flags = IORESOURCE_IO,
-};
-
static struct resource io_mem = {
.name = "PCI I/O space",
.start = VERSATILE_PCI_MEM_BASE0,
@@ -207,12 +200,6 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
"memory region (%d)\n", ret);
goto out;
}
- ret = request_resource(&ioport_resource, &io_port);
- if (ret) {
- printk(KERN_ERR "PCI: unable to allocate I/O "
- "port region (%d)\n", ret);
- goto out;
- }
ret = request_resource(&iomem_resource, &non_mem);
if (ret) {
printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
@@ -227,11 +214,9 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
}
/*
- * the IO resource for this bus
* the mem resource for this bus
* the prefetch mem resource for this bus
*/
- pci_add_resource_offset(&sys->resources, &io_port, sys->io_offset);
pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
@@ -260,9 +245,11 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
goto out;
}
+ ret = pci_ioremap_io(0, VERSATILE_PCI_MEM_BASE0);
+ if (ret)
+ goto out;
+
if (nr == 0) {
- sys->mem_offset = 0;
- sys->io_offset = 0;
ret = pci_versatile_setup_resources(sys);
if (ret < 0) {
printk("pci_versatile_setup: resources... oops?\n");
@@ -319,7 +306,6 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
void __init pci_versatile_preinit(void)
{
- pcibios_min_io = 0x44000000;
pcibios_min_mem = 0x50000000;
__raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 04/15] ARM: tegra: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (2 preceding siblings ...)
2012-07-14 2:03 ` [PATCH v2 03/15] ARM: versatile: use fixed PCI i/o mapping Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 05/15] ARM: integrator: " Rob Herring
` (12 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move tegra PCI to fixed i/o mapping and remove io.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-tegra/include/mach/io.h | 46 ---------------
arch/arm/mach-tegra/include/mach/iomap.h | 3 +
arch/arm/mach-tegra/pcie.c | 95 +++++++-----------------------
4 files changed, 25 insertions(+), 120 deletions(-)
delete mode 100644 arch/arm/mach-tegra/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8fb7e4a..ac446e3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -644,7 +644,6 @@ config ARCH_TEGRA
select HAVE_CLK
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
- select NEED_MACH_IO_H if PCI
select ARCH_HAS_CPUFREQ
help
This enables support for NVIDIA Tegra based systems (Tegra APX,
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
deleted file mode 100644
index fe700f9..0000000
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/io.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- * Colin Cross <ccross@google.com>
- * Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_IO_H
-#define __MACH_TEGRA_IO_H
-
-#define IO_SPACE_LIMIT 0xffff
-
-#ifndef __ASSEMBLER__
-
-#ifdef CONFIG_TEGRA_PCI
-extern void __iomem *tegra_pcie_io_base;
-
-static inline void __iomem *__io(unsigned long addr)
-{
- return tegra_pcie_io_base + (addr & IO_SPACE_LIMIT);
-}
-#else
-static inline void __iomem *__io(unsigned long addr)
-{
- return (void __iomem *)addr;
-}
-#endif
-
-#define __io(a) __io(a)
-
-#endif
-
-#endif
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index 7e76da7..fee3a94 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -303,6 +303,9 @@
#define IO_APB_VIRT IOMEM(0xFE300000)
#define IO_APB_SIZE SZ_1M
+#define TEGRA_PCIE_BASE 0x80000000
+#define TEGRA_PCIE_IO_BASE (TEGRA_PCIE_BASE + SZ_4M)
+
#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 0e09137..1ee7f5b 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -171,8 +171,6 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
* 0x90000000 - 0x9fffffff - non-prefetchable memory
* 0xa0000000 - 0xbfffffff - prefetchable memory
*/
-#define TEGRA_PCIE_BASE 0x80000000
-
#define PCIE_REGS_SZ SZ_16K
#define PCIE_CFG_OFF PCIE_REGS_SZ
#define PCIE_CFG_SZ SZ_1M
@@ -180,8 +178,6 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
#define PCIE_EXT_CFG_SZ SZ_1M
#define PCIE_IOMAP_SZ (PCIE_REGS_SZ + PCIE_CFG_SZ + PCIE_EXT_CFG_SZ)
-#define MMIO_BASE (TEGRA_PCIE_BASE + SZ_4M)
-#define MMIO_SIZE SZ_64K
#define MEM_BASE_0 (TEGRA_PCIE_BASE + SZ_256M)
#define MEM_SIZE_0 SZ_128M
#define MEM_BASE_1 (MEM_BASE_0 + MEM_SIZE_0)
@@ -204,10 +200,9 @@ struct tegra_pcie_port {
bool link_up;
- char io_space_name[16];
char mem_space_name[16];
char prefetch_space_name[20];
- struct resource res[3];
+ struct resource res[2];
};
struct tegra_pcie_info {
@@ -223,17 +218,7 @@ struct tegra_pcie_info {
struct clk *pll_e;
};
-static struct tegra_pcie_info tegra_pcie = {
- .res_mmio = {
- .name = "PCI IO",
- .start = MMIO_BASE,
- .end = MMIO_BASE + MMIO_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-void __iomem *tegra_pcie_io_base;
-EXPORT_SYMBOL(tegra_pcie_io_base);
+static struct tegra_pcie_info tegra_pcie;
static inline void afi_writel(u32 value, unsigned long offset)
{
@@ -391,24 +376,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
pp = tegra_pcie.port + nr;
pp->root_bus_nr = sys->busnr;
- /*
- * IORESOURCE_IO
- */
- snprintf(pp->io_space_name, sizeof(pp->io_space_name),
- "PCIe %d I/O", pp->index);
- pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
- pp->res[0].name = pp->io_space_name;
- if (pp->index == 0) {
- pp->res[0].start = PCIBIOS_MIN_IO;
- pp->res[0].end = pp->res[0].start + SZ_32K - 1;
- } else {
- pp->res[0].start = PCIBIOS_MIN_IO + SZ_32K;
- pp->res[0].end = IO_SPACE_LIMIT;
- }
- pp->res[0].flags = IORESOURCE_IO;
- if (request_resource(&ioport_resource, &pp->res[0]))
- panic("Request PCIe IO resource failed\n");
- pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
+ pci_ioremap_io(nr * SZ_64K, TEGRA_PCIE_IO_BASE);
/*
* IORESOURCE_MEM
@@ -416,18 +384,18 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
snprintf(pp->mem_space_name, sizeof(pp->mem_space_name),
"PCIe %d MEM", pp->index);
pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0;
- pp->res[1].name = pp->mem_space_name;
+ pp->res[0].name = pp->mem_space_name;
if (pp->index == 0) {
- pp->res[1].start = MEM_BASE_0;
- pp->res[1].end = pp->res[1].start + MEM_SIZE_0 - 1;
+ pp->res[0].start = MEM_BASE_0;
+ pp->res[0].end = pp->res[0].start + MEM_SIZE_0 - 1;
} else {
- pp->res[1].start = MEM_BASE_1;
- pp->res[1].end = pp->res[1].start + MEM_SIZE_1 - 1;
+ pp->res[0].start = MEM_BASE_1;
+ pp->res[0].end = pp->res[0].start + MEM_SIZE_1 - 1;
}
- pp->res[1].flags = IORESOURCE_MEM;
- if (request_resource(&iomem_resource, &pp->res[1]))
+ pp->res[0].flags = IORESOURCE_MEM;
+ if (request_resource(&iomem_resource, &pp->res[0]))
panic("Request PCIe Memory resource failed\n");
- pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, &pp->res[0], sys->mem_offset);
/*
* IORESOURCE_MEM | IORESOURCE_PREFETCH
@@ -435,18 +403,18 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
snprintf(pp->prefetch_space_name, sizeof(pp->prefetch_space_name),
"PCIe %d PREFETCH MEM", pp->index);
pp->prefetch_space_name[sizeof(pp->prefetch_space_name) - 1] = 0;
- pp->res[2].name = pp->prefetch_space_name;
+ pp->res[1].name = pp->prefetch_space_name;
if (pp->index == 0) {
- pp->res[2].start = PREFETCH_MEM_BASE_0;
- pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_0 - 1;
+ pp->res[1].start = PREFETCH_MEM_BASE_0;
+ pp->res[1].end = pp->res[2].start + PREFETCH_MEM_SIZE_0 - 1;
} else {
- pp->res[2].start = PREFETCH_MEM_BASE_1;
- pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_1 - 1;
+ pp->res[1].start = PREFETCH_MEM_BASE_1;
+ pp->res[1].end = pp->res[1].start + PREFETCH_MEM_SIZE_1 - 1;
}
- pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
- if (request_resource(&iomem_resource, &pp->res[2]))
+ pp->res[1].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
+ if (request_resource(&iomem_resource, &pp->res[1]))
panic("Request PCIe Prefetch Memory resource failed\n");
- pci_add_resource_offset(&sys->resources, &pp->res[2], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
return 1;
}
@@ -541,8 +509,8 @@ static void tegra_pcie_setup_translations(void)
/* Bar 2: downstream IO bar */
fpci_bar = ((__u32)0xfdfc << 16);
- size = MMIO_SIZE;
- axi_address = MMIO_BASE;
+ size = SZ_128K;
+ axi_address = TEGRA_PCIE_IO_BASE;
afi_writel(axi_address, AFI_AXI_BAR2_START);
afi_writel(size >> 12, AFI_AXI_BAR2_SZ);
afi_writel(fpci_bar, AFI_FPCI_BAR2);
@@ -776,7 +744,6 @@ static void tegra_pcie_clocks_put(void)
static int __init tegra_pcie_get_resources(void)
{
- struct resource *res_mmio = &tegra_pcie.res_mmio;
int err;
err = tegra_pcie_clocks_get();
@@ -798,34 +765,16 @@ static int __init tegra_pcie_get_resources(void)
goto err_map_reg;
}
- err = request_resource(&iomem_resource, res_mmio);
- if (err) {
- pr_err("PCIE: Failed to request resources: %d\n", err);
- goto err_req_io;
- }
-
- tegra_pcie_io_base = ioremap_nocache(res_mmio->start,
- resource_size(res_mmio));
- if (tegra_pcie_io_base == NULL) {
- pr_err("PCIE: Failed to map IO\n");
- err = -ENOMEM;
- goto err_map_io;
- }
-
err = request_irq(INT_PCIE_INTR, tegra_pcie_isr,
IRQF_SHARED, "PCIE", &tegra_pcie);
if (err) {
pr_err("PCIE: Failed to register IRQ: %d\n", err);
- goto err_irq;
+ goto err_req_io;
}
set_irq_flags(INT_PCIE_INTR, IRQF_VALID);
return 0;
-err_irq:
- iounmap(tegra_pcie_io_base);
-err_map_io:
- release_resource(&tegra_pcie.res_mmio);
err_req_io:
iounmap(tegra_pcie.regs);
err_map_reg:
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (3 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 04/15] ARM: tegra: " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 21:49 ` Linus Walleij
2012-07-14 2:04 ` [PATCH v2 06/15] ARM: integrator: remove trailing whitespace on pci_v3.c Rob Herring
` (11 subsequent siblings)
16 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move integrator PCI to fixed i/o mapping and remove io.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-integrator/include/mach/io.h | 33 ----------------------
arch/arm/mach-integrator/include/mach/platform.h | 4 +++
arch/arm/mach-integrator/integrator_ap.c | 7 +----
arch/arm/mach-integrator/pci_v3.c | 3 --
5 files changed, 5 insertions(+), 43 deletions(-)
delete mode 100644 arch/arm/mach-integrator/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ac446e3..5d37628 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -261,7 +261,6 @@ config ARCH_INTEGRATOR
select GENERIC_CLOCKEVENTS
select PLAT_VERSATILE
select PLAT_VERSATILE_FPGA_IRQ
- select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H
select SPARSE_IRQ
select MULTI_IRQ_HANDLER
diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h
deleted file mode 100644
index 8de70de..0000000
--- a/arch/arm/mach-integrator/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * arch/arm/mach-integrator/include/mach/io.h
- *
- * Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/*
- * WARNING: this has to mirror definitions in platform.h
- */
-#define PCI_MEMORY_VADDR 0xe8000000
-#define PCI_CONFIG_VADDR 0xec000000
-#define PCI_V3_VADDR 0xed000000
-#define PCI_IO_VADDR 0xee000000
-
-#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
-
-#endif
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index ec467ba..4c03475 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -324,6 +324,10 @@
*/
#define PHYS_PCI_V3_BASE 0x62000000
+#define PCI_MEMORY_VADDR 0xe8000000
+#define PCI_CONFIG_VADDR 0xec000000
+#define PCI_V3_VADDR 0xed000000
+
/* ------------------------------------------------------------------------
* Integrator Interrupt Controllers
* ------------------------------------------------------------------------
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index c857501..83bee54 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -72,7 +72,7 @@
* e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
* ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
* ed000000 62000000 PCI V3 regs PHYS_PCI_V3_BASE (max 64k)
- * ee000000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
+ * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
* ef000000 Cache flush
* f1000000 10000000 Core module registers
* f1100000 11000000 System controller registers
@@ -146,11 +146,6 @@ static struct map_desc ap_io_desc[] __initdata = {
.pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
.length = SZ_64K,
.type = MT_DEVICE
- }, {
- .virtual = PCI_IO_VADDR,
- .pfn = __phys_to_pfn(PHYS_PCI_IO_BASE),
- .length = SZ_64K,
- .type = MT_DEVICE
}
};
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index b866880..810f4ec 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -374,12 +374,9 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
}
/*
- * the IO resource for this bus
* the mem resource for this bus
* the prefetch mem resource for this bus
*/
- pci_add_resource_offset(&sys->resources,
- &ioport_resource, sys->io_offset);
pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-14 2:04 ` [PATCH v2 05/15] ARM: integrator: " Rob Herring
@ 2012-07-14 21:49 ` Linus Walleij
2012-07-17 17:04 ` Will Deacon
0 siblings, 1 reply; 39+ messages in thread
From: Linus Walleij @ 2012-07-14 21:49 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Jul 14, 2012 at 4:04 AM, Rob Herring <robherring2@gmail.com> wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> Move integrator PCI to fixed i/o mapping and remove io.h.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Linus Walleij <linus.walleij@linaro.org>
I think the PCI bus on my Integrator/AP is tilted and not suitable
for tests. But IIRC Will Deacon actually has one of these machines
and managed to get ethernet going on it. Maybe he can even test
this patch?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-14 21:49 ` Linus Walleij
@ 2012-07-17 17:04 ` Will Deacon
2012-07-17 18:02 ` Rob Herring
0 siblings, 1 reply; 39+ messages in thread
From: Will Deacon @ 2012-07-17 17:04 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Jul 14, 2012 at 10:49:47PM +0100, Linus Walleij wrote:
> On Sat, Jul 14, 2012 at 4:04 AM, Rob Herring <robherring2@gmail.com> wrote:
>
> > From: Rob Herring <rob.herring@calxeda.com>
> >
> > Move integrator PCI to fixed i/o mapping and remove io.h.
> >
> > Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> > Cc: Russell King <linux@arm.linux.org.uk>
> > Cc: Linus Walleij <linus.walleij@linaro.org>
>
> I think the PCI bus on my Integrator/AP is tilted and not suitable
> for tests. But IIRC Will Deacon actually has one of these machines
> and managed to get ethernet going on it. Maybe he can even test
> this patch?
I can try digging out my integrator at the weekend if you like. Are these
patches sitting in a branch anywhere that I can grab?
Will
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-17 17:04 ` Will Deacon
@ 2012-07-17 18:02 ` Rob Herring
2012-07-21 14:31 ` Will Deacon
0 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-17 18:02 UTC (permalink / raw)
To: linux-arm-kernel
On 07/17/2012 12:04 PM, Will Deacon wrote:
> On Sat, Jul 14, 2012 at 10:49:47PM +0100, Linus Walleij wrote:
>> On Sat, Jul 14, 2012 at 4:04 AM, Rob Herring <robherring2@gmail.com> wrote:
>>
>>> From: Rob Herring <rob.herring@calxeda.com>
>>>
>>> Move integrator PCI to fixed i/o mapping and remove io.h.
>>>
>>> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>>> Cc: Russell King <linux@arm.linux.org.uk>
>>> Cc: Linus Walleij <linus.walleij@linaro.org>
>>
>> I think the PCI bus on my Integrator/AP is tilted and not suitable
>> for tests. But IIRC Will Deacon actually has one of these machines
>> and managed to get ethernet going on it. Maybe he can even test
>> this patch?
>
> I can try digging out my integrator at the weekend if you like. Are these
> patches sitting in a branch anywhere that I can grab?
>
git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
Rob
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-17 18:02 ` Rob Herring
@ 2012-07-21 14:31 ` Will Deacon
2012-07-21 21:56 ` Arnd Bergmann
0 siblings, 1 reply; 39+ messages in thread
From: Will Deacon @ 2012-07-21 14:31 UTC (permalink / raw)
To: linux-arm-kernel
Hi Rob,
On Tue, Jul 17, 2012 at 07:02:12PM +0100, Rob Herring wrote:
> On 07/17/2012 12:04 PM, Will Deacon wrote:
> > On Sat, Jul 14, 2012 at 10:49:47PM +0100, Linus Walleij wrote:
> >> I think the PCI bus on my Integrator/AP is tilted and not suitable
> >> for tests. But IIRC Will Deacon actually has one of these machines
> >> and managed to get ethernet going on it. Maybe he can even test
> >> this patch?
> >
> > I can try digging out my integrator at the weekend if you like. Are these
> > patches sitting in a branch anywhere that I can grab?
> >
>
> git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
I dusted off the integrator, but I'm failing to boot at all if I build from
that branch:
Uncompressing Linux... done, booting the kernel.
<silence>
Using the same .config, I can boot v3.5-rc7 just fine (I even rebased your
branch onto that in case something had been fixed in mainline, but it made
no difference).
Will
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-21 14:31 ` Will Deacon
@ 2012-07-21 21:56 ` Arnd Bergmann
2012-07-22 13:09 ` Rob Herring
0 siblings, 1 reply; 39+ messages in thread
From: Arnd Bergmann @ 2012-07-21 21:56 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 21 July 2012, Will Deacon wrote:
> Hi Rob,
>
> On Tue, Jul 17, 2012 at 07:02:12PM +0100, Rob Herring wrote:
> > On 07/17/2012 12:04 PM, Will Deacon wrote:
> > > On Sat, Jul 14, 2012 at 10:49:47PM +0100, Linus Walleij wrote:
> > >> I think the PCI bus on my Integrator/AP is tilted and not suitable
> > >> for tests. But IIRC Will Deacon actually has one of these machines
> > >> and managed to get ethernet going on it. Maybe he can even test
> > >> this patch?
> > >
> > > I can try digging out my integrator at the weekend if you like. Are these
> > > patches sitting in a branch anywhere that I can grab?
> > >
> >
> > git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
>
> I dusted off the integrator, but I'm failing to boot at all if I build from
> that branch:
>
> Uncompressing Linux... done, booting the kernel.
> <silence>
>
> Using the same .config, I can boot v3.5-rc7 just fine (I even rebased your
> branch onto that in case something had been fixed in mainline, but it made
> no difference).
I've looked at integrator_defconfig, and could not find any code that
actually uses the PIO accessors. Is your configuration different to that?
Do you actually have PCI enabled and present on the machine? Do things
change if you turn PCI off?
Arnd
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-21 21:56 ` Arnd Bergmann
@ 2012-07-22 13:09 ` Rob Herring
2012-07-22 15:08 ` Will Deacon
0 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-22 13:09 UTC (permalink / raw)
To: linux-arm-kernel
On Jul 21, 2012 5:56 PM, "Arnd Bergmann" <arnd@arndb.de> wrote:
>
> On Saturday 21 July 2012, Will Deacon wrote:
> > Hi Rob,
> >
> > On Tue, Jul 17, 2012 at 07:02:12PM +0100, Rob Herring wrote:
> > > On 07/17/2012 12:04 PM, Will Deacon wrote:
> > > > On Sat, Jul 14, 2012 at 10:49:47PM +0100, Linus Walleij wrote:
> > > >> I think the PCI bus on my Integrator/AP is tilted and not suitable
> > > >> for tests. But IIRC Will Deacon actually has one of these machines
> > > >> and managed to get ethernet going on it. Maybe he can even test
> > > >> this patch?
> > > >
> > > > I can try digging out my integrator at the weekend if you like. Are
these
> > > > patches sitting in a branch anywhere that I can grab?
> > > >
> > >
> > > git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
> >
> > I dusted off the integrator, but I'm failing to boot at all if I build
from
> > that branch:
> >
> > Uncompressing Linux... done, booting the kernel.
> > <silence>
> >
> > Using the same .config, I can boot v3.5-rc7 just fine (I even rebased
your
> > branch onto that in case something had been fixed in mainline, but it
made
> > no difference).
>
> I've looked at integrator_defconfig, and could not find any code that
> actually uses the PIO accessors. Is your configuration different to that?
> Do you actually have PCI enabled and present on the machine? Do things
> change if you turn PCI off?
>
Could be overlapping static mappings. I manually checked that, but may have
missed something.
Can you turn on earlyprintk?
Rob
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^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-22 13:09 ` Rob Herring
@ 2012-07-22 15:08 ` Will Deacon
2012-07-22 16:22 ` Rob Herring
0 siblings, 1 reply; 39+ messages in thread
From: Will Deacon @ 2012-07-22 15:08 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Jul 22, 2012 at 02:09:23PM +0100, Rob Herring wrote:
> On Jul 21, 2012 5:56 PM, "Arnd Bergmann" <arnd at arndb.de<mailto:arnd@arndb.de>> wrote:
> > On Saturday 21 July 2012, Will Deacon wrote:
> > > I dusted off the integrator, but I'm failing to boot at all if I build from
> > > that branch:
> > >
> > > Uncompressing Linux... done, booting the kernel.
> > > <silence>
> > >
> > > Using the same .config, I can boot v3.5-rc7 just fine (I even rebased your
> > > branch onto that in case something had been fixed in mainline, but it made
> > > no difference).
> >
> > I've looked at integrator_defconfig, and could not find any code that
> > actually uses the PIO accessors. Is your configuration different to that?
> > Do you actually have PCI enabled and present on the machine? Do things
> > change if you turn PCI off?
I have PCI up and running, yes, but all I use it for is an Intel e100
ethernet card which isn't required for booting. Disabling PCI makes no
difference, but see below.
> Could be overlapping static mappings. I manually checked that, but may have missed something.
>
> Can you turn on earlyprintk?
I had that turned on already... after banging my head against a wall, I
realised that increasing the baudrate in u-boot (I have to use ymodem to
transfer the kernel image...) kills the serial console completely when
booting Linux if I forget to change it back.
With that observation, I see booting get stuck:
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Linux version 3.5.0-rc6-00017-g52f1412 (will at tiny-lites) (gcc version 4.5.3 (Gent2
[ 0.000000] CPU: ARM926EJ-S [41069263] revision 3 (ARMv5TEJ), cr=00053177
[ 0.000000] CPU: VIVT data cache, VIVT instruction cache
[ 0.000000] Machine: ARM-Integrator
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] On node 0 totalpages: 32768
[ 0.000000] free_area_init_node: node 0, pgdat c04ad1f0, node_mem_map c04c9000
[ 0.000000] Normal zone: 256 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 32512 pages, LIFO batch:7
[ 0.000000] CPU: found DTCM0 32k @ 00000000, not enabled
[ 0.000000] CPU: moved DTCM0 32k to fffe8000, enabled
[ 0.000000] CPU: found ITCM0 32k @ 00000000, not enabled
[ 0.000000] CPU: moved ITCM0 32k to fffe0000, enabled
[ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
[ 0.000000] Kernel command line: console=ttyAM0 mem=128M earlyprintk debug user_debug=31 logl9
[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Memory: 128MB = 128MB total
[ 0.000000] Memory: 124968k/124968k available, 6104k reserved, 0K highmem
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] DTCM : 0xfffe8000 - 0xffff0000 ( 32 kB)
[ 0.000000] ITCM : 0xfffe0000 - 0xfffe8000 ( 32 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xc8800000 - 0xff000000 ( 872 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xc8000000 ( 128 MB)
[ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
[ 0.000000] .text : 0xc0008000 - 0xc036e9b0 (3483 kB)
[ 0.000000] .init : 0xc036f000 - 0xc048e7a4 (1150 kB)
[ 0.000000] .data : 0xc0490000 - 0xc04ad920 ( 119 kB)
[ 0.000000] .bss : 0xc04ae024 - 0xc04c86b4 ( 106 kB)
[ 0.000000] SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] NR_IRQS:16 nr_irqs:34 34
[ 0.000000] FPGA IRQ chip 0 "SC" @ f1400000, 22 irqs
[ 0.000000] sched_clock: 16 bits at 1500kHz, resolution 666ns, wraps every 43ms
Now, the next line is usually when the VGA text console is poked. Sure
enough, disabling that (CONFIG_VGA_CONSOLE) is enough to boot with your
patches and PCI appears to work correctly (I can do basic networking).
I guess there's some mapping race with the VGA code since vga_base =
PCI_MEMORY_VADDR, but you left the static mapping alone for that region,
so I'm not sure. Any ideas?
Will
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-22 15:08 ` Will Deacon
@ 2012-07-22 16:22 ` Rob Herring
2012-07-23 12:19 ` Will Deacon
0 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-22 16:22 UTC (permalink / raw)
To: linux-arm-kernel
On Jul 22, 2012 11:08 AM, "Will Deacon" <will.deacon@arm.com> wrote:
>
> On Sun, Jul 22, 2012 at 02:09:23PM +0100, Rob Herring wrote:
> > On Jul 21, 2012 5:56 PM, "Arnd Bergmann" <arnd at arndb.de<mailto:
arnd@arndb.de>> wrote:
> > > On Saturday 21 July 2012, Will Deacon wrote:
> > > > I dusted off the integrator, but I'm failing to boot at all if I
build from
> > > > that branch:
> > > >
> > > > Uncompressing Linux... done, booting the kernel.
> > > > <silence>
> > > >
> > > > Using the same .config, I can boot v3.5-rc7 just fine (I even
rebased your
> > > > branch onto that in case something had been fixed in mainline, but
it made
> > > > no difference).
> > >
> > > I've looked at integrator_defconfig, and could not find any code that
> > > actually uses the PIO accessors. Is your configuration different to
that?
> > > Do you actually have PCI enabled and present on the machine? Do things
> > > change if you turn PCI off?
>
> I have PCI up and running, yes, but all I use it for is an Intel e100
> ethernet card which isn't required for booting. Disabling PCI makes no
> difference, but see below.
>
> > Could be overlapping static mappings. I manually checked that, but may
have missed something.
> >
> > Can you turn on earlyprintk?
>
> I had that turned on already... after banging my head against a wall, I
> realised that increasing the baudrate in u-boot (I have to use ymodem to
> transfer the kernel image...) kills the serial console completely when
> booting Linux if I forget to change it back.
>
> With that observation, I see booting get stuck:
>
>
> Uncompressing Linux... done, booting the kernel.
> [ 0.000000] Booting Linux on physical CPU 0
> [ 0.000000] Initializing cgroup subsys cpu
> [ 0.000000] Linux version 3.5.0-rc6-00017-g52f1412 (will at tiny-lites)
(gcc version 4.5.3 (Gent2
> [ 0.000000] CPU: ARM926EJ-S [41069263] revision 3 (ARMv5TEJ),
cr=00053177
> [ 0.000000] CPU: VIVT data cache, VIVT instruction cache
> [ 0.000000] Machine: ARM-Integrator
> [ 0.000000] bootconsole [earlycon0] enabled
> [ 0.000000] Memory policy: ECC disabled, Data cache writeback
> [ 0.000000] On node 0 totalpages: 32768
> [ 0.000000] free_area_init_node: node 0, pgdat c04ad1f0, node_mem_map
c04c9000
> [ 0.000000] Normal zone: 256 pages used for memmap
> [ 0.000000] Normal zone: 0 pages reserved
> [ 0.000000] Normal zone: 32512 pages, LIFO batch:7
> [ 0.000000] CPU: found DTCM0 32k @ 00000000, not enabled
> [ 0.000000] CPU: moved DTCM0 32k to fffe8000, enabled
> [ 0.000000] CPU: found ITCM0 32k @ 00000000, not enabled
> [ 0.000000] CPU: moved ITCM0 32k to fffe0000, enabled
> [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
> [ 0.000000] pcpu-alloc: [0] 0
> [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on.
Total pages: 32512
> [ 0.000000] Kernel command line: console=ttyAM0 mem=128M earlyprintk
debug user_debug=31 logl9
> [ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
> [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536
bytes)
> [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768
bytes)
> [ 0.000000] Memory: 128MB = 128MB total
> [ 0.000000] Memory: 124968k/124968k available, 6104k reserved, 0K
highmem
> [ 0.000000] Virtual kernel memory layout:
> [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
> [ 0.000000] DTCM : 0xfffe8000 - 0xffff0000 ( 32 kB)
> [ 0.000000] ITCM : 0xfffe0000 - 0xfffe8000 ( 32 kB)
> [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
> [ 0.000000] vmalloc : 0xc8800000 - 0xff000000 ( 872 MB)
> [ 0.000000] lowmem : 0xc0000000 - 0xc8000000 ( 128 MB)
> [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
> [ 0.000000] .text : 0xc0008000 - 0xc036e9b0 (3483 kB)
> [ 0.000000] .init : 0xc036f000 - 0xc048e7a4 (1150 kB)
> [ 0.000000] .data : 0xc0490000 - 0xc04ad920 ( 119 kB)
> [ 0.000000] .bss : 0xc04ae024 - 0xc04c86b4 ( 106 kB)
> [ 0.000000] SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0,
CPUs=1, Nodes=1
> [ 0.000000] NR_IRQS:16 nr_irqs:34 34
> [ 0.000000] FPGA IRQ chip 0 "SC" @ f1400000, 22 irqs
> [ 0.000000] sched_clock: 16 bits at 1500kHz, resolution 666ns, wraps
every 43ms
>
>
> Now, the next line is usually when the VGA text console is poked. Sure
> enough, disabling that (CONFIG_VGA_CONSOLE) is enough to boot with your
> patches and PCI appears to work correctly (I can do basic networking).
>
> I guess there's some mapping race with the VGA code since vga_base =
> PCI_MEMORY_VADDR, but you left the static mapping alone for that region,
> so I'm not sure. Any ideas?
Perhaps pcibios_min_io changing from 6000 to default of 1000 causes probing
for vga?
Rob
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^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-22 16:22 ` Rob Herring
@ 2012-07-23 12:19 ` Will Deacon
2012-07-23 14:05 ` Rob Herring
0 siblings, 1 reply; 39+ messages in thread
From: Will Deacon @ 2012-07-23 12:19 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Jul 22, 2012 at 05:21:33PM +0100, Rob Herring wrote:
> On Jul 22, 2012 11:08 AM, "Will Deacon" <will.deacon at arm.com<mailto:will.deacon@arm.com>> wrote:
> > Now, the next line is usually when the VGA text console is poked. Sure
> > enough, disabling that (CONFIG_VGA_CONSOLE) is enough to boot with your
> > patches and PCI appears to work correctly (I can do basic networking).
> >
> > I guess there's some mapping race with the VGA code since vga_base =
> > PCI_MEMORY_VADDR, but you left the static mapping alone for that region,
> > so I'm not sure. Any ideas?
>
> Perhaps pcibios_min_io changing from 6000 to default of 1000 causes probing for vga?
I can try changing it back and see it makes a difference sometime this week.
It certainly smells like some probing is going on before the PCI stuff is up
and running and I suspect that the static mapping just leads to a hang rather
than an abort.
Will
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-23 12:19 ` Will Deacon
@ 2012-07-23 14:05 ` Rob Herring
2012-07-23 14:50 ` Linus Walleij
0 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-23 14:05 UTC (permalink / raw)
To: linux-arm-kernel
On 07/23/2012 07:19 AM, Will Deacon wrote:
> On Sun, Jul 22, 2012 at 05:21:33PM +0100, Rob Herring wrote:
>> On Jul 22, 2012 11:08 AM, "Will Deacon" <will.deacon at arm.com<mailto:will.deacon@arm.com>> wrote:
>>> Now, the next line is usually when the VGA text console is poked. Sure
>>> enough, disabling that (CONFIG_VGA_CONSOLE) is enough to boot with your
>>> patches and PCI appears to work correctly (I can do basic networking).
>>>
>>> I guess there's some mapping race with the VGA code since vga_base =
>>> PCI_MEMORY_VADDR, but you left the static mapping alone for that region,
>>> so I'm not sure. Any ideas?
>>
>> Perhaps pcibios_min_io changing from 6000 to default of 1000 causes probing for vga?
>
> I can try changing it back and see it makes a difference sometime this week.
> It certainly smells like some probing is going on before the PCI stuff is up
> and running and I suspect that the static mapping just leads to a hang rather
> than an abort.
Now that I have looked at the code. I think it is simply vgacon is
postcore_init and pci setup of the i/o mapping is in subsys_init. It
curious that you don't get an abort and backtrace though.
vgacon is only enabled for footbridge and integrator. I guess the only
way this worked before is if the bootloader has already setup the bus.
So I can add back an early mapping function that these 2 platforms can
call from .map_io. Something like this:
static inline void __init pci_map_io_early(unsigned long pfn)
{
struct map_desc pci_io_desc = {
.virtual = PCI_IO_VIRT_BASE,
.type = MT_DEVICE,
.length = SZ_64K,
};
pci_io_desc.pfn = pfn;
create_mapping(&pci_io_desc);
}
Rob
^ permalink raw reply [flat|nested] 39+ messages in thread* [PATCH v2 05/15] ARM: integrator: use fixed PCI i/o mapping
2012-07-23 14:05 ` Rob Herring
@ 2012-07-23 14:50 ` Linus Walleij
0 siblings, 0 replies; 39+ messages in thread
From: Linus Walleij @ 2012-07-23 14:50 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jul 23, 2012 at 4:05 PM, Rob Herring <robherring2@gmail.com> wrote:
> Now that I have looked at the code. I think it is simply vgacon is
> postcore_init and pci setup of the i/o mapping is in subsys_init.
Makes perfect sense.
> It curious that you don't get an abort and backtrace though.
I never get that either, it just locks up. Probably some other oddity
in these old boards.
> vgacon is only enabled for footbridge and integrator. I guess the only
> way this worked before is if the bootloader has already setup the bus.
Yes that is the case with most of the "V3 PCI" code, without some
bootloader or "BIOS" (boot monitor) poking, nothing works. Some of
the V3 registers are only just poked once, from the boot monitor or
boot loader.
> So I can add back an early mapping function that these 2 platforms can
> call from .map_io. Something like this:
>
> static inline void __init pci_map_io_early(unsigned long pfn)
> {
> struct map_desc pci_io_desc = {
> .virtual = PCI_IO_VIRT_BASE,
> .type = MT_DEVICE,
> .length = SZ_64K,
> };
>
> pci_io_desc.pfn = pfn;
> create_mapping(&pci_io_desc);
> }
Wouldn't the same kind of thing be necessary for all x86 systems,
and for any other ARM system that wants to use a VGA console?
How do these system handle it?
BTW: in the integrator_defconfig the VGA console is disabled,
for the very reason that it tends to lock things up if ther is no
graphics card in the machine.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 06/15] ARM: integrator: remove trailing whitespace on pci_v3.c
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (4 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 05/15] ARM: integrator: " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 07/15] ARM: shark: use fixed PCI i/o mapping Rob Herring
` (10 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
No functional changes.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-integrator/pci_v3.c | 46 ++++++++++++++++++-------------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 810f4ec..6f78aae 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -41,61 +41,61 @@
/*
* The V3 PCI interface chip in Integrator provides several windows from
* local bus memory into the PCI memory areas. Unfortunately, there
- * are not really enough windows for our usage, therefore we reuse
+ * are not really enough windows for our usage, therefore we reuse
* one of the windows for access to PCI configuration space. The
* memory map is as follows:
- *
+ *
* Local Bus Memory Usage
- *
+ *
* 40000000 - 4FFFFFFF PCI memory. 256M non-prefetchable
* 50000000 - 5FFFFFFF PCI memory. 256M prefetchable
* 60000000 - 60FFFFFF PCI IO. 16M
* 61000000 - 61FFFFFF PCI Configuration. 16M
- *
+ *
* There are three V3 windows, each described by a pair of V3 registers.
* These are LB_BASE0/LB_MAP0, LB_BASE1/LB_MAP1 and LB_BASE2/LB_MAP2.
* Base0 and Base1 can be used for any type of PCI memory access. Base2
* can be used either for PCI I/O or for I20 accesses. By default, uHAL
* uses this only for PCI IO space.
- *
+ *
* Normally these spaces are mapped using the following base registers:
- *
+ *
* Usage Local Bus Memory Base/Map registers used
- *
+ *
* Mem 40000000 - 4FFFFFFF LB_BASE0/LB_MAP0
* Mem 50000000 - 5FFFFFFF LB_BASE1/LB_MAP1
* IO 60000000 - 60FFFFFF LB_BASE2/LB_MAP2
* Cfg 61000000 - 61FFFFFF
- *
+ *
* This means that I20 and PCI configuration space accesses will fail.
- * When PCI configuration accesses are needed (via the uHAL PCI
+ * When PCI configuration accesses are needed (via the uHAL PCI
* configuration space primitives) we must remap the spaces as follows:
- *
+ *
* Usage Local Bus Memory Base/Map registers used
- *
+ *
* Mem 40000000 - 4FFFFFFF LB_BASE0/LB_MAP0
* Mem 50000000 - 5FFFFFFF LB_BASE0/LB_MAP0
* IO 60000000 - 60FFFFFF LB_BASE2/LB_MAP2
* Cfg 61000000 - 61FFFFFF LB_BASE1/LB_MAP1
- *
+ *
* To make this work, the code depends on overlapping windows working.
- * The V3 chip translates an address by checking its range within
+ * The V3 chip translates an address by checking its range within
* each of the BASE/MAP pairs in turn (in ascending register number
* order). It will use the first matching pair. So, for example,
* if the same address is mapped by both LB_BASE0/LB_MAP0 and
- * LB_BASE1/LB_MAP1, the V3 will use the translation from
+ * LB_BASE1/LB_MAP1, the V3 will use the translation from
* LB_BASE0/LB_MAP0.
- *
+ *
* To allow PCI Configuration space access, the code enlarges the
* window mapped by LB_BASE0/LB_MAP0 from 256M to 512M. This occludes
* the windows currently mapped by LB_BASE1/LB_MAP1 so that it can
* be remapped for use by configuration cycles.
- *
- * At the end of the PCI Configuration space accesses,
+ *
+ * At the end of the PCI Configuration space accesses,
* LB_BASE1/LB_MAP1 is reset to map PCI Memory. Finally the window
* mapped by LB_BASE0/LB_MAP0 is reduced in size from 512M to 256M to
* reveal the now restored LB_BASE1/LB_MAP1 window.
- *
+ *
* NOTE: We do not set up I2O mapping. I suspect that this is only
* for an intelligent (target) device. Using I2O disables most of
* the mappings into PCI memory.
@@ -127,8 +127,8 @@
*
* returns: configuration address to play on the PCI bus
*
- * To generate the appropriate PCI configuration cycles in the PCI
- * configuration address space, you present the V3 with the following pattern
+ * To generate the appropriate PCI configuration cycles in the PCI
+ * configuration address space, you present the V3 with the following pattern
* (which is very nearly a type 1 (except that the lower two bits are 00 and
* not 01). In order for this mapping to work you need to set up one of
* the local to PCI aperatures to 16Mbytes in length translating to
@@ -138,7 +138,7 @@
*
* Type 0:
*
- * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
+ * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
* 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
* | | |D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|0|
@@ -150,7 +150,7 @@
*
* Type 1:
*
- * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
+ * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
* 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
* | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|
@@ -161,7 +161,7 @@
* 15:11 Device number (5 bits)
* 10:8 function number
* 7:2 register number
- *
+ *
*/
static DEFINE_RAW_SPINLOCK(v3_lock);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 07/15] ARM: shark: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (5 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 06/15] ARM: integrator: remove trailing whitespace on pci_v3.c Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 08/15] ARM: footbridge: " Rob Herring
` (9 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Convert shark to use the fixed i/o mapping and remove io.h.
This shrinks the mapping from 256MB to 64KB, but nothing is using that much
space AFAICT.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-shark/core.c | 18 ------------------
arch/arm/mach-shark/include/mach/debug-macro.S | 7 ++++---
arch/arm/mach-shark/include/mach/entry-macro.S | 3 ++-
arch/arm/mach-shark/include/mach/io.h | 18 ------------------
arch/arm/mach-shark/pci.c | 5 +++++
6 files changed, 11 insertions(+), 41 deletions(-)
delete mode 100644 arch/arm/mach-shark/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5d37628..3dfc555 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -869,7 +869,6 @@ config ARCH_SHARK
select PCI
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
- select NEED_MACH_IO_H
help
Support for the StrongARM based Digital DNARD machine, also known
as "Shark" (<http://www.shark-linux.de/shark.html>).
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 2704bcd..d35b94e 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -21,9 +21,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#define IO_BASE 0xe0000000
-#define IO_SIZE 0x08000000
-#define IO_START 0x40000000
#define ROMCARD_SIZE 0x08000000
#define ROMCARD_START 0x10000000
@@ -104,20 +101,6 @@ arch_initcall(shark_init);
extern void shark_init_irq(void);
-static struct map_desc shark_io_desc[] __initdata = {
- {
- .virtual = IO_BASE,
- .pfn = __phys_to_pfn(IO_START),
- .length = IO_SIZE,
- .type = MT_DEVICE
- }
-};
-
-static void __init shark_map_io(void)
-{
- iotable_init(shark_io_desc, ARRAY_SIZE(shark_io_desc));
-}
-
#define IRQ_TIMER 0
#define HZ_TIME ((1193180 + HZ/2) / HZ)
@@ -158,7 +141,6 @@ static void shark_init_early(void)
MACHINE_START(SHARK, "Shark")
/* Maintainer: Alexander Schulz */
.atag_offset = 0x3000,
- .map_io = shark_map_io,
.init_early = shark_init_early,
.init_irq = shark_init_irq,
.timer = &shark_timer,
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S
index 20eb2bf..d129119 100644
--- a/arch/arm/mach-shark/include/mach/debug-macro.S
+++ b/arch/arm/mach-shark/include/mach/debug-macro.S
@@ -12,9 +12,10 @@
*/
.macro addruart, rp, rv, tmp
- mov \rp, #0xe0000000
- orr \rp, \rp, #0x000003f8
- mov \rv, \rp
+ mov \rp, #0x3f8
+ orr \rv, \rp, #0xfe000000
+ orr \rv, \rv, #0x00e00000
+ orr \rp, \rp, #0x40000000
.endm
.macro senduart,rd,rx
diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S
index 5901b09..c9e49f0 100644
--- a/arch/arm/mach-shark/include/mach/entry-macro.S
+++ b/arch/arm/mach-shark/include/mach/entry-macro.S
@@ -8,7 +8,8 @@
* warranty of any kind, whether express or implied.
*/
.macro get_irqnr_preamble, base, tmp
- mov \base, #0xe0000000
+ mov \base, #0xfe000000
+ orr \base, \base, #0x00e00000
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
deleted file mode 100644
index 1a45fc0..0000000
--- a/arch/arm/mach-shark/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * arch/arm/mach-shark/include/mach/io.h
- *
- * by Alexander Schulz
- *
- * derived from:
- * arch/arm/mach-ebsa110/include/mach/io.h
- * Copyright (C) 1997,1998 Russell King
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a) ((void __iomem *)(0xe0000000 + (a)))
-
-#endif
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c
index 9089407..b8b4ab3 100644
--- a/arch/arm/mach-shark/pci.c
+++ b/arch/arm/mach-shark/pci.c
@@ -8,12 +8,15 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <video/vga.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#define IO_START 0x40000000
+
static int __init shark_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
if (dev->bus->number == 0)
@@ -44,6 +47,8 @@ static int __init shark_pci_init(void)
pcibios_min_mem = 0x50000000;
vga_base = 0xe8000000;
+ pci_ioremap_io(0, IO_START);
+
pci_common_init(&shark_pci);
return 0;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 08/15] ARM: footbridge: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (6 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 07/15] ARM: shark: use fixed PCI i/o mapping Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 09/15] ARM: dove: " Rob Herring
` (8 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move footbridge PCI to fixed i/o mapping. io.h is still needed for the
!MMU case.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
---
arch/arm/Kconfig | 2 +-
| 8 ++------
| 16 ++++------------
| 3 ++-
| 12 ++----------
5 files changed, 11 insertions(+), 30 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3dfc555..7215ebf 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -431,7 +431,7 @@ config ARCH_FOOTBRIDGE
select FOOTBRIDGE
select GENERIC_CLOCKEVENTS
select HAVE_IDE
- select NEED_MACH_IO_H
+ select NEED_MACH_IO_H if !MMU
select NEED_MACH_MEMORY_H
help
Support for systems based on the DC21285 companion chip
--git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 3e6aaa6..e8f1fe6 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -15,7 +15,7 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/spinlock.h>
-
+
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/irq.h>
@@ -26,6 +26,7 @@
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
+#include <asm/mach/pci.h>
#include "common.h"
@@ -175,11 +176,6 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = {
.pfn = __phys_to_pfn(DC21285_PCI_IACK),
.length = PCIIACK_SIZE,
.type = MT_DEVICE,
- }, {
- .virtual = PCIO_BASE,
- .pfn = __phys_to_pfn(DC21285_PCI_IO),
- .length = PCIO_SIZE,
- .type = MT_DEVICE,
},
#endif
};
--git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 9d62e33..a7cd2cf 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -276,8 +276,8 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
sys->mem_offset = DC21285_PCI_MEM;
- pci_add_resource_offset(&sys->resources,
- &ioport_resource, sys->io_offset);
+ pci_ioremap_io(0, DC21285_PCI_IO);
+
pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
@@ -298,7 +298,7 @@ void __init dc21285_preinit(void)
mem_size = (unsigned int)high_memory - PAGE_OFFSET;
for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
if (mem_mask >= mem_size)
- break;
+ break;
/*
* These registers need to be set up whether we're the
@@ -350,14 +350,6 @@ void __init dc21285_preinit(void)
"PCI data parity", NULL);
if (cfn_mode) {
- static struct resource csrio;
-
- csrio.flags = IORESOURCE_IO;
- csrio.name = "Footbridge";
-
- allocate_resource(&ioport_resource, &csrio, 128,
- 0xff00, 0xffff, 128, NULL, NULL);
-
/*
* Map our SDRAM at a known address in PCI space, just in case
* the firmware had other ideas. Using a nonzero base is
@@ -365,7 +357,7 @@ void __init dc21285_preinit(void)
* in the range 0x000a0000 to 0x000c0000. (eg, S3 cards).
*/
*CSR_PCICSRBASE = 0xf4000000;
- *CSR_PCICSRIOBASE = csrio.start;
+ *CSR_PCICSRIOBASE = 0;
*CSR_PCISDRAMBASE = __virt_to_bus(PAGE_OFFSET);
*CSR_PCIROMBASE = 0;
*CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
--git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S
index e5acde2..c169f0c 100644
--- a/arch/arm/mach-footbridge/include/mach/debug-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S
@@ -17,7 +17,8 @@
/* For NetWinder debugging */
.macro addruart, rp, rv, tmp
mov \rp, #0x000003f8
- orr \rv, \rp, #0xff000000 @ virtual
+ orr \rv, \rp, #0xfe000000 @ virtual
+ orr \rv, \rv, #0x00e00000 @ virtual
orr \rp, \rp, #0x7c000000 @ physical
.endm
--git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index aba531ee..aba4638 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -14,18 +14,10 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
-#ifdef CONFIG_MMU
-#define MMU_IO(a, b) (a)
-#else
-#define MMU_IO(a, b) (b)
-#endif
-
-#define PCIO_SIZE 0x00100000
-#define PCIO_BASE MMU_IO(0xff000000, 0x7c000000)
-
/*
- * Translation of various region addresses to virtual addresses
+ * Translation of various i/o addresses to host addresses for !CONFIG_MMU
*/
+#define PCIO_BASE 0x7c000000
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 09/15] ARM: dove: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (7 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 08/15] ARM: footbridge: " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 10/15] ARM: kirkwood: " Rob Herring
` (7 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
The i/o regions are changed from 1MB to 64KB. It's likely that the 2nd
bus is not setup correctly.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-dove/common.c | 10 ----------
arch/arm/mach-dove/include/mach/dove.h | 8 +++-----
arch/arm/mach-dove/include/mach/io.h | 19 -------------------
arch/arm/mach-dove/pcie.c | 23 ++++-------------------
5 files changed, 7 insertions(+), 54 deletions(-)
delete mode 100644 arch/arm/mach-dove/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7215ebf..ed930ad 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -537,7 +537,6 @@ config ARCH_DOVE
select PCI
select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS
- select NEED_MACH_IO_H
select PLAT_ORION
help
Support for the Marvell Dove SoC 88AP510
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 9493076..95e78a8 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -49,16 +49,6 @@ static struct map_desc dove_io_desc[] __initdata = {
.pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
.length = DOVE_NB_REGS_SIZE,
.type = MT_DEVICE,
- }, {
- .virtual = DOVE_PCIE0_IO_VIRT_BASE,
- .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
- .length = DOVE_PCIE0_IO_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = DOVE_PCIE1_IO_VIRT_BASE,
- .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
- .length = DOVE_PCIE1_IO_SIZE,
- .type = MT_DEVICE,
},
};
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index d52b0ef..c91e300 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -50,14 +50,12 @@
#define DOVE_NB_REGS_SIZE SZ_8M
#define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000
-#define DOVE_PCIE0_IO_VIRT_BASE 0xfee00000
#define DOVE_PCIE0_IO_BUS_BASE 0x00000000
-#define DOVE_PCIE0_IO_SIZE SZ_1M
+#define DOVE_PCIE0_IO_SIZE SZ_64K
#define DOVE_PCIE1_IO_PHYS_BASE 0xf2100000
-#define DOVE_PCIE1_IO_VIRT_BASE 0xfef00000
-#define DOVE_PCIE1_IO_BUS_BASE 0x00100000
-#define DOVE_PCIE1_IO_SIZE SZ_1M
+#define DOVE_PCIE1_IO_BUS_BASE 0x00010000
+#define DOVE_PCIE1_IO_SIZE SZ_64K
/*
* Dove Core Registers Map
diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h
deleted file mode 100644
index 29c8b85..0000000
--- a/arch/arm/mach-dove/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/io.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include "dove.h"
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
- DOVE_PCIE0_IO_VIRT_BASE))
-
-#endif
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 47921b0..11ed6ef 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -26,7 +26,6 @@ struct pcie_port {
u8 root_bus_nr;
void __iomem *base;
spinlock_t conf_lock;
- char io_space_name[16];
char mem_space_name[16];
struct resource res[2];
};
@@ -53,24 +52,10 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
orion_pcie_setup(pp->base);
- /*
- * IORESOURCE_IO
- */
- snprintf(pp->io_space_name, sizeof(pp->io_space_name),
- "PCIe %d I/O", pp->index);
- pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
- pp->res[0].name = pp->io_space_name;
- if (pp->index == 0) {
- pp->res[0].start = DOVE_PCIE0_IO_PHYS_BASE;
- pp->res[0].end = pp->res[0].start + DOVE_PCIE0_IO_SIZE - 1;
- } else {
- pp->res[0].start = DOVE_PCIE1_IO_PHYS_BASE;
- pp->res[0].end = pp->res[0].start + DOVE_PCIE1_IO_SIZE - 1;
- }
- pp->res[0].flags = IORESOURCE_IO;
- if (request_resource(&ioport_resource, &pp->res[0]))
- panic("Request PCIe IO resource failed\n");
- pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
+ if (pp->index == 0)
+ pci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE0_IO_PHYS_BASE);
+ else
+ pci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE1_IO_PHYS_BASE);
/*
* IORESOURCE_MEM
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 10/15] ARM: kirkwood: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (8 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 09/15] ARM: dove: " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-16 7:10 ` Andrew Lunn
2012-07-14 2:04 ` [PATCH v2 11/15] ARM: orion5x: " Rob Herring
` (6 subsequent siblings)
16 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move kirkwood PCI to fixed i/o mapping and remove io.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-kirkwood/common.c | 10 ----------
arch/arm/mach-kirkwood/include/mach/io.h | 24 ------------------------
arch/arm/mach-kirkwood/include/mach/kirkwood.h | 8 +++-----
arch/arm/mach-kirkwood/pcie.c | 22 ++--------------------
5 files changed, 5 insertions(+), 60 deletions(-)
delete mode 100644 arch/arm/mach-kirkwood/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ed930ad..8a74244 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -547,7 +547,6 @@ config ARCH_KIRKWOOD
select PCI
select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS
- select NEED_MACH_IO_H
select PLAT_ORION
help
Support for the following Marvell Kirkwood series SoCs:
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f261cd2..55e4d79 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -41,16 +41,6 @@
****************************************************************************/
static struct map_desc kirkwood_io_desc[] __initdata = {
{
- .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
- .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
- .length = KIRKWOOD_PCIE_IO_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
- .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
- .length = KIRKWOOD_PCIE1_IO_SIZE,
- .type = MT_DEVICE,
- }, {
.virtual = KIRKWOOD_REGS_VIRT_BASE,
.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
.length = KIRKWOOD_REGS_SIZE,
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
deleted file mode 100644
index 5d0ab61..0000000
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/io.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include "kirkwood.h"
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-static inline void __iomem *__io(unsigned long addr)
-{
- return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
- + KIRKWOOD_PCIE_IO_VIRT_BASE);
-}
-
-#define __io(a) __io(a)
-
-#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index c5b6851..af4f000 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -37,14 +37,12 @@
#define KIRKWOOD_NAND_MEM_SIZE SZ_1K
#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
-#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000
-#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000
-#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M
+#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000
+#define KIRKWOOD_PCIE1_IO_SIZE SZ_64K
#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
-#define KIRKWOOD_PCIE_IO_VIRT_BASE 0xfee00000
#define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000
-#define KIRKWOOD_PCIE_IO_SIZE SZ_1M
+#define KIRKWOOD_PCIE_IO_SIZE SZ_64K
#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
#define KIRKWOOD_REGS_VIRT_BASE 0xfed00000
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 6e8b2ef..092b36f 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -137,14 +137,6 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp)
pp->irq = IRQ_KIRKWOOD_PCIE;
/*
- * IORESOURCE_IO
- */
- pp->res[0].name = "PCIe 0 I/O Space";
- pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
- pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
- pp->res[0].flags = IORESOURCE_IO;
-
- /*
* IORESOURCE_MEM
*/
pp->res[1].name = "PCIe 0 MEM";
@@ -159,14 +151,6 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp)
pp->irq = IRQ_KIRKWOOD_PCIE1;
/*
- * IORESOURCE_IO
- */
- pp->res[0].name = "PCIe 1 I/O Space";
- pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE;
- pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;
- pp->res[0].flags = IORESOURCE_IO;
-
- /*
* IORESOURCE_MEM
*/
pp->res[1].name = "PCIe 1 MEM";
@@ -197,22 +181,20 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
case 0:
kirkwood_enable_pcie_clk("0");
pcie0_ioresources_init(pp);
+ pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE_IO_PHYS_BASE);
break;
case 1:
kirkwood_enable_pcie_clk("1");
pcie1_ioresources_init(pp);
+ pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE1_IO_PHYS_BASE);
break;
default:
panic("PCIe setup: invalid controller %d", index);
}
- if (request_resource(&ioport_resource, &pp->res[0]))
- panic("Request PCIe%d IO resource failed\n", index);
if (request_resource(&iomem_resource, &pp->res[1]))
panic("Request PCIe%d Memory resource failed\n", index);
- sys->io_offset = 0;
- pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
/*
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 10/15] ARM: kirkwood: use fixed PCI i/o mapping
2012-07-14 2:04 ` [PATCH v2 10/15] ARM: kirkwood: " Rob Herring
@ 2012-07-16 7:10 ` Andrew Lunn
2012-07-16 14:17 ` Rob Herring
2012-07-16 16:25 ` Arnd Bergmann
0 siblings, 2 replies; 39+ messages in thread
From: Andrew Lunn @ 2012-07-16 7:10 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jul 13, 2012 at 09:04:06PM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> Move kirkwood PCI to fixed i/o mapping and remove io.h.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Lennert Buytenhek <kernel@wantstofly.org>
> Acked-by: Nicolas Pitre <nico@linaro.org>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Andrew Lunn <andrew@lunn.ch>
Hi Rob
I boot tested this, on a board without any PCI devices.
At least the PCI controllers were found O.K.
So although its not worth much:
Tested-by: Andrew Lunn <andrew@lunn.ch>
I have one question, see below.
> ---
> arch/arm/Kconfig | 1 -
> arch/arm/mach-kirkwood/common.c | 10 ----------
> arch/arm/mach-kirkwood/include/mach/io.h | 24 ------------------------
> arch/arm/mach-kirkwood/include/mach/kirkwood.h | 8 +++-----
> arch/arm/mach-kirkwood/pcie.c | 22 ++--------------------
> 5 files changed, 5 insertions(+), 60 deletions(-)
> delete mode 100644 arch/arm/mach-kirkwood/include/mach/io.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index ed930ad..8a74244 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -547,7 +547,6 @@ config ARCH_KIRKWOOD
> select PCI
> select ARCH_REQUIRE_GPIOLIB
> select GENERIC_CLOCKEVENTS
> - select NEED_MACH_IO_H
> select PLAT_ORION
> help
> Support for the following Marvell Kirkwood series SoCs:
> diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
> index f261cd2..55e4d79 100644
> --- a/arch/arm/mach-kirkwood/common.c
> +++ b/arch/arm/mach-kirkwood/common.c
> @@ -41,16 +41,6 @@
> ****************************************************************************/
> static struct map_desc kirkwood_io_desc[] __initdata = {
> {
> - .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
> - .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
> - .length = KIRKWOOD_PCIE_IO_SIZE,
> - .type = MT_DEVICE,
> - }, {
> - .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
> - .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
> - .length = KIRKWOOD_PCIE1_IO_SIZE,
> - .type = MT_DEVICE,
> - }, {
> .virtual = KIRKWOOD_REGS_VIRT_BASE,
> .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
> .length = KIRKWOOD_REGS_SIZE,
> diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
> deleted file mode 100644
> index 5d0ab61..0000000
> --- a/arch/arm/mach-kirkwood/include/mach/io.h
> +++ /dev/null
> @@ -1,24 +0,0 @@
> -/*
> - * arch/arm/mach-kirkwood/include/mach/io.h
> - *
> - * This file is licensed under the terms of the GNU General Public
> - * License version 2. This program is licensed "as is" without any
> - * warranty of any kind, whether express or implied.
> - */
> -
> -#ifndef __ASM_ARCH_IO_H
> -#define __ASM_ARCH_IO_H
> -
> -#include "kirkwood.h"
> -
> -#define IO_SPACE_LIMIT 0xffffffff
> -
> -static inline void __iomem *__io(unsigned long addr)
> -{
> - return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
> - + KIRKWOOD_PCIE_IO_VIRT_BASE);
> -}
> -
> -#define __io(a) __io(a)
> -
> -#endif
> diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
> index c5b6851..af4f000 100644
> --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
> +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
> @@ -37,14 +37,12 @@
> #define KIRKWOOD_NAND_MEM_SIZE SZ_1K
>
> #define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
> -#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000
> -#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000
> -#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M
> +#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000
> +#define KIRKWOOD_PCIE1_IO_SIZE SZ_64K
>
> #define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
> -#define KIRKWOOD_PCIE_IO_VIRT_BASE 0xfee00000
> #define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000
> -#define KIRKWOOD_PCIE_IO_SIZE SZ_1M
> +#define KIRKWOOD_PCIE_IO_SIZE SZ_64K
>
> #define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
> #define KIRKWOOD_REGS_VIRT_BASE 0xfed00000
> diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
> index 6e8b2ef..092b36f 100644
> --- a/arch/arm/mach-kirkwood/pcie.c
> +++ b/arch/arm/mach-kirkwood/pcie.c
> @@ -137,14 +137,6 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp)
> pp->irq = IRQ_KIRKWOOD_PCIE;
>
> /*
> - * IORESOURCE_IO
> - */
> - pp->res[0].name = "PCIe 0 I/O Space";
> - pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
> - pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
> - pp->res[0].flags = IORESOURCE_IO;
> -
> - /*
> * IORESOURCE_MEM
> */
> pp->res[1].name = "PCIe 0 MEM";
...
> if (request_resource(&iomem_resource, &pp->res[1]))
> panic("Request PCIe%d Memory resource failed\n", index);
>
> - sys->io_offset = 0;
> - pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
> pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
pp->res[0] is now unused. Do you plan to also clean up the PCI MEM
space at some point? And then at the same time remove the rest of this
code?
Thanks
Andrew
^ permalink raw reply [flat|nested] 39+ messages in thread* [PATCH v2 10/15] ARM: kirkwood: use fixed PCI i/o mapping
2012-07-16 7:10 ` Andrew Lunn
@ 2012-07-16 14:17 ` Rob Herring
2012-07-16 16:25 ` Arnd Bergmann
1 sibling, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-16 14:17 UTC (permalink / raw)
To: linux-arm-kernel
On 07/16/2012 02:10 AM, Andrew Lunn wrote:
> On Fri, Jul 13, 2012 at 09:04:06PM -0500, Rob Herring wrote:
>> From: Rob Herring <rob.herring@calxeda.com>
...
>> pp->res[1].name = "PCIe 0 MEM";
>
> ...
>
>> if (request_resource(&iomem_resource, &pp->res[1]))
>> panic("Request PCIe%d Memory resource failed\n", index);
>>
>> - sys->io_offset = 0;
>> - pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
>> pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
>
> pp->res[0] is now unused. Do you plan to also clean up the PCI MEM
> space at some point? And then at the same time remove the rest of this
> code?
I think we should follow what Tegra is doing and convert PCI hosts to
platform drivers (see DT support for Tegra PCI). Then this resource
would be one of the device resources. A simpler change would be moving
this resource into pci_sys_data struct. I may do the latter, but don't
plan to do the former.
I should go back and change this to a single resource though.
Rob
>
> Thanks
> Andrew
>
^ permalink raw reply [flat|nested] 39+ messages in thread* [PATCH v2 10/15] ARM: kirkwood: use fixed PCI i/o mapping
2012-07-16 7:10 ` Andrew Lunn
2012-07-16 14:17 ` Rob Herring
@ 2012-07-16 16:25 ` Arnd Bergmann
1 sibling, 0 replies; 39+ messages in thread
From: Arnd Bergmann @ 2012-07-16 16:25 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 16 July 2012, Andrew Lunn wrote:
> > if (request_resource(&iomem_resource, &pp->res[1]))
> > panic("Request PCIe%d Memory resource failed\n", index);
> >
> > - sys->io_offset = 0;
> > - pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
> > pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
>
> pp->res[0] is now unused. Do you plan to also clean up the PCI MEM
> space at some point? And then at the same time remove the rest of this
> code?
I think we still want the pci host drivers to register the resources for
the memory space. One thing is that they are not ioremapped at init
time, and also they typically have a nonzero offset.
Arnd
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 11/15] ARM: orion5x: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (9 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 10/15] ARM: kirkwood: " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 12/15] iop13xx: use more regular PCI I/O space handling Rob Herring
` (5 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move orion5x PCI to fixed i/o mapping and remove io.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-orion5x/common.c | 10 -----
arch/arm/mach-orion5x/include/mach/io.h | 22 ----------
arch/arm/mach-orion5x/include/mach/orion5x.h | 20 +++++----
arch/arm/mach-orion5x/pci.c | 56 +++++++++-----------------
5 files changed, 27 insertions(+), 82 deletions(-)
delete mode 100644 arch/arm/mach-orion5x/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8a74244..e542f99 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -585,7 +585,6 @@ config ARCH_ORION5X
select PCI
select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS
- select NEED_MACH_IO_H
select PLAT_ORION
help
Support for the following Marvell Orion 5x series SoCs:
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 9148b22..70f7d71 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -47,16 +47,6 @@ static struct map_desc orion5x_io_desc[] __initdata = {
.length = ORION5X_REGS_SIZE,
.type = MT_DEVICE,
}, {
- .virtual = ORION5X_PCIE_IO_VIRT_BASE,
- .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
- .length = ORION5X_PCIE_IO_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = ORION5X_PCI_IO_VIRT_BASE,
- .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
- .length = ORION5X_PCI_IO_SIZE,
- .type = MT_DEVICE,
- }, {
.virtual = ORION5X_PCIE_WA_VIRT_BASE,
.pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
.length = ORION5X_PCIE_WA_SIZE,
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
deleted file mode 100644
index 1aa5d0a..0000000
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/io.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include <mach/orion5x.h>
-#include <asm/sizes.h>
-
-#define IO_SPACE_LIMIT SZ_2M
-static inline void __iomem *__io(unsigned long addr)
-{
- return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE);
-}
-
-#define __io(a) __io(a)
-#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 683e085..1b60131 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -31,31 +31,29 @@
* fc000000 device bus mappings (cs0/cs1)
*
* virt phys size
- * fdd00000 f1000000 1M on-chip peripheral registers
- * fde00000 f2000000 1M PCIe I/O space
- * fdf00000 f2100000 1M PCI I/O space
- * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only)
+ * fe000000 f1000000 1M on-chip peripheral registers
+ * fee00000 f2000000 64K PCIe I/O space
+ * fee10000 f2100000 64K PCI I/O space
+ * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only)
****************************************************************************/
#define ORION5X_REGS_PHYS_BASE 0xf1000000
-#define ORION5X_REGS_VIRT_BASE 0xfdd00000
+#define ORION5X_REGS_VIRT_BASE 0xfe000000
#define ORION5X_REGS_SIZE SZ_1M
#define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
-#define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000
#define ORION5X_PCIE_IO_BUS_BASE 0x00000000
-#define ORION5X_PCIE_IO_SIZE SZ_1M
+#define ORION5X_PCIE_IO_SIZE SZ_64K
#define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
-#define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000
-#define ORION5X_PCI_IO_BUS_BASE 0x00100000
-#define ORION5X_PCI_IO_SIZE SZ_1M
+#define ORION5X_PCI_IO_BUS_BASE 0x00010000
+#define ORION5X_PCI_IO_SIZE SZ_64K
#define ORION5X_SRAM_PHYS_BASE (0xf2200000)
#define ORION5X_SRAM_SIZE SZ_8K
/* Relevant only for Orion-1/Orion-NAS */
#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
-#define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000
+#define ORION5X_PCIE_WA_VIRT_BASE 0xfd000000
#define ORION5X_PCIE_WA_SIZE SZ_16M
#define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index cb19e16..6921d49 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -162,35 +162,25 @@ static int __init pcie_setup(struct pci_sys_data *sys)
pcie_ops.read = pcie_rd_conf_wa;
}
+ pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCIE_IO_PHYS_BASE);
+
/*
* Request resources.
*/
- res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+ res = kzalloc(sizeof(struct resource), GFP_KERNEL);
if (!res)
panic("pcie_setup unable to alloc resources");
/*
- * IORESOURCE_IO
- */
- sys->io_offset = 0;
- res[0].name = "PCIe I/O Space";
- res[0].flags = IORESOURCE_IO;
- res[0].start = ORION5X_PCIE_IO_BUS_BASE;
- res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1;
- if (request_resource(&ioport_resource, &res[0]))
- panic("Request PCIe IO resource failed\n");
- pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
-
- /*
* IORESOURCE_MEM
*/
- res[1].name = "PCIe Memory Space";
- res[1].flags = IORESOURCE_MEM;
- res[1].start = ORION5X_PCIE_MEM_PHYS_BASE;
- res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1;
- if (request_resource(&iomem_resource, &res[1]))
+ res->name = "PCIe Memory Space";
+ res->flags = IORESOURCE_MEM;
+ res->start = ORION5X_PCIE_MEM_PHYS_BASE;
+ res->end = res->start + ORION5X_PCIE_MEM_SIZE - 1;
+ if (request_resource(&iomem_resource, res))
panic("Request PCIe Memory resource failed\n");
- pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, res, sys->mem_offset);
return 1;
}
@@ -489,35 +479,25 @@ static int __init pci_setup(struct pci_sys_data *sys)
*/
orion5x_setbits(PCI_CMD, PCI_CMD_HOST_REORDER);
+ pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCI_IO_PHYS_BASE);
+
/*
* Request resources
*/
- res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+ res = kzalloc(sizeof(struct resource), GFP_KERNEL);
if (!res)
panic("pci_setup unable to alloc resources");
/*
- * IORESOURCE_IO
- */
- sys->io_offset = 0;
- res[0].name = "PCI I/O Space";
- res[0].flags = IORESOURCE_IO;
- res[0].start = ORION5X_PCI_IO_BUS_BASE;
- res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1;
- if (request_resource(&ioport_resource, &res[0]))
- panic("Request PCI IO resource failed\n");
- pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
-
- /*
* IORESOURCE_MEM
*/
- res[1].name = "PCI Memory Space";
- res[1].flags = IORESOURCE_MEM;
- res[1].start = ORION5X_PCI_MEM_PHYS_BASE;
- res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1;
- if (request_resource(&iomem_resource, &res[1]))
+ res->name = "PCI Memory Space";
+ res->flags = IORESOURCE_MEM;
+ res->start = ORION5X_PCI_MEM_PHYS_BASE;
+ res->end = res->start + ORION5X_PCI_MEM_SIZE - 1;
+ if (request_resource(&iomem_resource, res))
panic("Request PCI Memory resource failed\n");
- pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, res, sys->mem_offset);
return 1;
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 12/15] iop13xx: use more regular PCI I/O space handling
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (10 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 11/15] ARM: orion5x: " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 13/15] ARM: iop13xx: use fixed PCI i/o mapping Rob Herring
` (4 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Arnd Bergmann <arnd@arndb.de>
iop13xx confuses I/O port numbers with physical addresses, which breaks
legacy ISA I/O access behind PCI bridges and makes it unnecessarily hard
to unify the inb/outb accessors with other platforms. This removes the
special-casing and just puts all I/O ports into a single 128KB virtually
mapped I/O port range starting at port zero.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-iop13xx/include/mach/io.h | 6 +++---
arch/arm/mach-iop13xx/include/mach/iop13xx.h | 12 +++---------
arch/arm/mach-iop13xx/io.c | 27 --------------------------
arch/arm/mach-iop13xx/pci.c | 12 ++++++------
4 files changed, 12 insertions(+), 45 deletions(-)
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h
index f131885..e197cb8 100644
--- a/arch/arm/mach-iop13xx/include/mach/io.h
+++ b/arch/arm/mach-iop13xx/include/mach/io.h
@@ -19,10 +19,10 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
-#define IO_SPACE_LIMIT 0xffffffff
+#include <mach/iop13xx.h>
-#define __io(a) __iop13xx_io(a)
+#define IO_SPACE_LIMIT (IOP13XX_PCIE_IO_WINDOW_SIZE + IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
-extern void __iomem * __iop13xx_io(unsigned long io_addr);
+#define __io(a) (IOP13XX_PCIX_LOWER_IO_VA + ((a) & IO_SPACE_LIMIT))
#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index e190dcd..d3777db 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -69,17 +69,15 @@ extern unsigned long get_iop_tick_rate(void);
* 0x8000.0000 + 928M 0x2.8000.0000 (ioremap) PCIE outbound memory window
*
* IO MAP
- * 0x1000 + 64K 0x0.fffb.1000 0xfec6.1000 PCIX outbound i/o window
+ * 0x1000 + 64K 0x0.fffb.1000 0xfed6.1000 PCIX outbound i/o window
* 0x1000 + 64K 0x0.fffd.1000 0xfed7.1000 PCIE outbound i/o window
*/
#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL
#define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL
-#define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL
+#define IOP13XX_PCIX_LOWER_IO_VA 0xfed60000UL
#define IOP13XX_PCIX_LOWER_IO_BA 0x0UL /* OIOTVR */
#define IOP13XX_PCIX_IO_BUS_OFFSET 0x1000UL
-#define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\
- IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\
+#define IOP13XX_PCIX_UPPER_IO_BA (IOP13XX_PCIX_LOWER_IO_BA +\
IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
(IOP13XX_PCIX_LOWER_IO_PA\
@@ -108,10 +106,6 @@ extern unsigned long get_iop_tick_rate(void);
#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL
#define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */
#define IOP13XX_PCIE_IO_BUS_OFFSET 0x1000UL
-#define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\
- IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\
- IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\
IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 3c36419..851dc8f 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -23,25 +23,6 @@
#include "pci.h"
-void * __iomem __iop13xx_io(unsigned long io_addr)
-{
- void __iomem * io_virt;
-
- switch (io_addr) {
- case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
- io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr);
- break;
- case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
- io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr);
- break;
- default:
- BUG();
- }
-
- return io_virt;
-}
-EXPORT_SYMBOL(__iop13xx_io);
-
static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
size_t size, unsigned int mtype, void *caller)
{
@@ -67,12 +48,6 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
(cookie - IOP13XX_PBI_LOWER_MEM_RA),
size, mtype, __builtin_return_address(0));
break;
- case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
- retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie);
- break;
- case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
- retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie);
- break;
case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA:
retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
break;
@@ -99,8 +74,6 @@ static void __iop13xx_iounmap(volatile void __iomem *addr)
goto skip;
switch ((u32) addr) {
- case IOP13XX_PCIE_LOWER_IO_VA ... IOP13XX_PCIE_UPPER_IO_VA:
- case IOP13XX_PCIX_LOWER_IO_VA ... IOP13XX_PCIX_UPPER_IO_VA:
case IOP13XX_PMMR_VIRT_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_VA:
goto skip;
}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 861cb12..1bb905a 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -1042,8 +1042,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
<< IOP13XX_ATUX_PCIXSR_FUNC_NUM;
__raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR);
- res[0].start = IOP13XX_PCIX_LOWER_IO_PA + IOP13XX_PCIX_IO_BUS_OFFSET;
- res[0].end = IOP13XX_PCIX_UPPER_IO_PA;
+ res[0].start = IOP13XX_PCIX_LOWER_IO_BA + IOP13XX_PCIX_IO_BUS_OFFSET;
+ res[0].end = IOP13XX_PCIX_UPPER_IO_BA;
res[0].name = "IQ81340 ATUX PCI I/O Space";
res[0].flags = IORESOURCE_IO;
@@ -1052,7 +1052,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
res[1].name = "IQ81340 ATUX PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET;
- sys->io_offset = IOP13XX_PCIX_LOWER_IO_PA;
+ sys->io_offset = IOP13XX_PCIX_LOWER_IO_BA;
break;
case IOP13XX_INIT_ATU_ATUE:
/* Note: the function number field in the PCSR is ro */
@@ -1063,8 +1063,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
__raw_writel(pcsr, IOP13XX_ATUE_PCSR);
- res[0].start = IOP13XX_PCIE_LOWER_IO_PA + IOP13XX_PCIE_IO_BUS_OFFSET;
- res[0].end = IOP13XX_PCIE_UPPER_IO_PA;
+ res[0].start = IOP13XX_PCIE_LOWER_IO_BA + IOP13XX_PCIE_IO_BUS_OFFSET;
+ res[0].end = IOP13XX_PCIE_UPPER_IO_BA;
res[0].name = "IQ81340 ATUE PCI I/O Space";
res[0].flags = IORESOURCE_IO;
@@ -1073,7 +1073,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
res[1].name = "IQ81340 ATUE PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET;
- sys->io_offset = IOP13XX_PCIE_LOWER_IO_PA;
+ sys->io_offset = IOP13XX_PCIE_LOWER_IO_BA;
sys->map_irq = iop13xx_pcie_map_irq;
break;
default:
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 13/15] ARM: iop13xx: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (11 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 12/15] iop13xx: use more regular PCI I/O space handling Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 14/15] ARM: mv78xx0: use fixed pci " Rob Herring
` (3 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move iop13xx PCI to fixed i/o mapping and remove io.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-iop13xx/include/mach/io.h | 28 -------------------
arch/arm/mach-iop13xx/include/mach/iop13xx.h | 21 +++------------
arch/arm/mach-iop13xx/pci.c | 37 +++++++++-----------------
arch/arm/mach-iop13xx/setup.c | 10 -------
5 files changed, 16 insertions(+), 81 deletions(-)
delete mode 100644 arch/arm/mach-iop13xx/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e542f99..c61e0a4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -486,7 +486,6 @@ config ARCH_IOP13XX
select PCI
select ARCH_SUPPORTS_MSI
select VMSPLIT_1G
- select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H
select NEED_RET_TO_USER
help
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h
deleted file mode 100644
index e197cb8..0000000
--- a/arch/arm/mach-iop13xx/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * iop13xx custom ioremap implementation
- * Copyright (c) 2005-2006, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place - Suite 330, Boston, MA 02111-1307 USA.
- *
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#include <mach/iop13xx.h>
-
-#define IO_SPACE_LIMIT (IOP13XX_PCIE_IO_WINDOW_SIZE + IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
-
-#define __io(a) (IOP13XX_PCIX_LOWER_IO_VA + ((a) & IO_SPACE_LIMIT))
-
-#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index d3777db..9278b8c 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -69,19 +69,11 @@ extern unsigned long get_iop_tick_rate(void);
* 0x8000.0000 + 928M 0x2.8000.0000 (ioremap) PCIE outbound memory window
*
* IO MAP
- * 0x1000 + 64K 0x0.fffb.1000 0xfed6.1000 PCIX outbound i/o window
- * 0x1000 + 64K 0x0.fffd.1000 0xfed7.1000 PCIE outbound i/o window
+ * 0x00000 + 64K 0x0.fffb.0000 0xfee0.0000 PCIX outbound i/o window
+ * 0x10000 + 64K 0x0.fffd.0000 0xfee1.0000 PCIE outbound i/o window
*/
-#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL
#define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL
-#define IOP13XX_PCIX_LOWER_IO_VA 0xfed60000UL
#define IOP13XX_PCIX_LOWER_IO_BA 0x0UL /* OIOTVR */
-#define IOP13XX_PCIX_IO_BUS_OFFSET 0x1000UL
-#define IOP13XX_PCIX_UPPER_IO_BA (IOP13XX_PCIX_LOWER_IO_BA +\
- IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
- (IOP13XX_PCIX_LOWER_IO_PA\
- - IOP13XX_PCIX_LOWER_IO_VA))
#define IOP13XX_PCIX_MEM_PHYS_OFFSET 0x100000000ULL
#define IOP13XX_PCIX_MEM_WINDOW_SIZE 0x3a000000UL
@@ -101,16 +93,9 @@ extern unsigned long get_iop_tick_rate(void);
IOP13XX_PCIX_LOWER_MEM_BA)
/* PCI-E ranges */
-#define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL
#define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL
-#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL
#define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */
-#define IOP13XX_PCIE_IO_BUS_OFFSET 0x1000UL
-#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\
- IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
- (IOP13XX_PCIE_LOWER_IO_PA\
- - IOP13XX_PCIE_LOWER_IO_VA))
+#define IOP13XX_PCIE_LOWER_IO_BA 0x10000UL
#define IOP13XX_PCIE_MEM_PHYS_OFFSET 0x200000000ULL
#define IOP13XX_PCIE_MEM_WINDOW_SIZE 0x3a000000UL
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 1bb905a..f3826bb 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -970,7 +970,6 @@ void __init iop13xx_pci_init(void)
__raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);
/* Setup the Min Address for PCI memory... */
- pcibios_min_io = 0;
pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA;
/* if Linux is given control of an ATU
@@ -1003,7 +1002,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
if (nr > 1)
return 0;
- res = kcalloc(2, sizeof(struct resource), GFP_KERNEL);
+ res = kzalloc(sizeof(struct resource), GFP_KERNEL);
if (!res)
panic("PCI: unable to alloc resources");
@@ -1042,17 +1041,13 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
<< IOP13XX_ATUX_PCIXSR_FUNC_NUM;
__raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR);
- res[0].start = IOP13XX_PCIX_LOWER_IO_BA + IOP13XX_PCIX_IO_BUS_OFFSET;
- res[0].end = IOP13XX_PCIX_UPPER_IO_BA;
- res[0].name = "IQ81340 ATUX PCI I/O Space";
- res[0].flags = IORESOURCE_IO;
+ pci_ioremap_io(0, IOP13XX_PCIX_LOWER_IO_PA);
- res[1].start = IOP13XX_PCIX_LOWER_MEM_RA;
- res[1].end = IOP13XX_PCIX_UPPER_MEM_RA;
- res[1].name = "IQ81340 ATUX PCI Memory Space";
- res[1].flags = IORESOURCE_MEM;
+ res->start = IOP13XX_PCIX_LOWER_MEM_RA;
+ res->end = IOP13XX_PCIX_UPPER_MEM_RA;
+ res->name = "IQ81340 ATUX PCI Memory Space";
+ res->flags = IORESOURCE_MEM;
sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET;
- sys->io_offset = IOP13XX_PCIX_LOWER_IO_BA;
break;
case IOP13XX_INIT_ATU_ATUE:
/* Note: the function number field in the PCSR is ro */
@@ -1063,17 +1058,13 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
__raw_writel(pcsr, IOP13XX_ATUE_PCSR);
- res[0].start = IOP13XX_PCIE_LOWER_IO_BA + IOP13XX_PCIE_IO_BUS_OFFSET;
- res[0].end = IOP13XX_PCIE_UPPER_IO_BA;
- res[0].name = "IQ81340 ATUE PCI I/O Space";
- res[0].flags = IORESOURCE_IO;
+ pci_ioremap_io(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_PCIE_LOWER_IO_PA);
- res[1].start = IOP13XX_PCIE_LOWER_MEM_RA;
- res[1].end = IOP13XX_PCIE_UPPER_MEM_RA;
- res[1].name = "IQ81340 ATUE PCI Memory Space";
- res[1].flags = IORESOURCE_MEM;
+ res->start = IOP13XX_PCIE_LOWER_MEM_RA;
+ res->end = IOP13XX_PCIE_UPPER_MEM_RA;
+ res->name = "IQ81340 ATUE PCI Memory Space";
+ res->flags = IORESOURCE_MEM;
sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET;
- sys->io_offset = IOP13XX_PCIE_LOWER_IO_BA;
sys->map_irq = iop13xx_pcie_map_irq;
break;
default:
@@ -1081,11 +1072,9 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
return 0;
}
- request_resource(&ioport_resource, &res[0]);
- request_resource(&iomem_resource, &res[1]);
+ request_resource(&iomem_resource, res);
- pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
- pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, res, sys->mem_offset);
return 1;
}
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index daabb1f..4a7f20d 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -40,16 +40,6 @@ static struct map_desc iop13xx_std_desc[] __initdata = {
.pfn = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE),
.length = IOP13XX_PMMR_SIZE,
.type = MT_DEVICE,
- }, { /* PCIE IO space */
- .virtual = IOP13XX_PCIE_LOWER_IO_VA,
- .pfn = __phys_to_pfn(IOP13XX_PCIE_LOWER_IO_PA),
- .length = IOP13XX_PCIX_IO_WINDOW_SIZE,
- .type = MT_DEVICE,
- }, { /* PCIX IO space */
- .virtual = IOP13XX_PCIX_LOWER_IO_VA,
- .pfn = __phys_to_pfn(IOP13XX_PCIX_LOWER_IO_PA),
- .length = IOP13XX_PCIX_IO_WINDOW_SIZE,
- .type = MT_DEVICE,
},
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 14/15] ARM: mv78xx0: use fixed pci i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (12 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 13/15] ARM: iop13xx: use fixed PCI i/o mapping Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 2:04 ` [PATCH v2 15/15] ARM: iop3xx: use fixed PCI " Rob Herring
` (2 subsequent siblings)
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move mv78xx0 PCI to fixed i/o mapping and remove io.h. This changes the PCI
bus addresses from the cpu address to 0 based. It appears that there is
translation h/w for this, but its untested.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-mv78xx0/addr-map.c | 3 +-
arch/arm/mach-mv78xx0/common.c | 5 --
arch/arm/mach-mv78xx0/include/mach/io.h | 24 ------
arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 21 +++--
arch/arm/mach-mv78xx0/pcie.c | 110 ++++++++------------------
6 files changed, 45 insertions(+), 119 deletions(-)
delete mode 100644 arch/arm/mach-mv78xx0/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c61e0a4..1b7faa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -571,7 +571,6 @@ config ARCH_MV78XX0
select PCI
select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS
- select NEED_MACH_IO_H
select PLAT_ORION
help
Support for the following Marvell MV78xx0 series SoCs:
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 62b53d7..7764d93 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -13,6 +13,7 @@
#include <linux/mbus.h>
#include <linux/io.h>
#include <plat/addr-map.h>
+#include <mach/mv78xx0.h>
#include "common.h"
/*
@@ -81,7 +82,7 @@ void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
int maj, int min)
{
orion_setup_cpu_win(&addr_map_cfg, window, base, size,
- TARGET_PCIE(maj), ATTR_PCIE_IO(min), -1);
+ TARGET_PCIE(maj), ATTR_PCIE_IO(min), 0);
}
void __init mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index b4c53b8..2082644 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -135,11 +135,6 @@ static struct map_desc mv78xx0_io_desc[] __initdata = {
.length = MV78XX0_CORE_REGS_SIZE,
.type = MT_DEVICE,
}, {
- .virtual = MV78XX0_PCIE_IO_VIRT_BASE(0),
- .pfn = __phys_to_pfn(MV78XX0_PCIE_IO_PHYS_BASE(0)),
- .length = MV78XX0_PCIE_IO_SIZE * 8,
- .type = MT_DEVICE,
- }, {
.virtual = MV78XX0_REGS_VIRT_BASE,
.pfn = __phys_to_pfn(MV78XX0_REGS_PHYS_BASE),
.length = MV78XX0_REGS_SIZE,
diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h
deleted file mode 100644
index c7d9d00..0000000
--- a/arch/arm/mach-mv78xx0/include/mach/io.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/io.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include "mv78xx0.h"
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-static inline void __iomem *__io(unsigned long addr)
-{
- return (void __iomem *)((addr - MV78XX0_PCIE_IO_PHYS_BASE(0))
- + MV78XX0_PCIE_IO_VIRT_BASE(0));
-}
-
-#define __io(a) __io(a)
-
-#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index e807c4c..bd03fed 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -29,15 +29,15 @@
*
* virt phys size
* fe400000 f102x000 16K core-specific peripheral registers
- * fe700000 f0800000 1M PCIe #0 I/O space
- * fe800000 f0900000 1M PCIe #1 I/O space
- * fe900000 f0a00000 1M PCIe #2 I/O space
- * fea00000 f0b00000 1M PCIe #3 I/O space
- * feb00000 f0c00000 1M PCIe #4 I/O space
- * fec00000 f0d00000 1M PCIe #5 I/O space
- * fed00000 f0e00000 1M PCIe #6 I/O space
- * fee00000 f0f00000 1M PCIe #7 I/O space
- * fef00000 f1000000 1M on-chip peripheral registers
+ * fee00000 f0800000 64K PCIe #0 I/O space
+ * fee10000 f0900000 64K PCIe #1 I/O space
+ * fee20000 f0a00000 64K PCIe #2 I/O space
+ * fee30000 f0b00000 64K PCIe #3 I/O space
+ * fee40000 f0c00000 64K PCIe #4 I/O space
+ * fee50000 f0d00000 64K PCIe #5 I/O space
+ * fee60000 f0e00000 64K PCIe #6 I/O space
+ * fee70000 f0f00000 64K PCIe #7 I/O space
+ * fd000000 f1000000 1M on-chip peripheral registers
*/
#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
@@ -46,11 +46,10 @@
#define MV78XX0_CORE_REGS_SIZE SZ_16K
#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
-#define MV78XX0_PCIE_IO_VIRT_BASE(i) (0xfe700000 + ((i) << 20))
#define MV78XX0_PCIE_IO_SIZE SZ_1M
#define MV78XX0_REGS_PHYS_BASE 0xf1000000
-#define MV78XX0_REGS_VIRT_BASE 0xfef00000
+#define MV78XX0_REGS_VIRT_BASE 0xfd000000
#define MV78XX0_REGS_SIZE SZ_1M
#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 2e56e86..26a059b 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -15,6 +15,7 @@
#include <asm/mach/pci.h>
#include <plat/pcie.h>
#include <plat/addr-map.h>
+#include <mach/mv78xx0.h>
#include "common.h"
struct pcie_port {
@@ -23,16 +24,13 @@ struct pcie_port {
u8 root_bus_nr;
void __iomem *base;
spinlock_t conf_lock;
- char io_space_name[16];
char mem_space_name[16];
- struct resource res[2];
+ struct resource res;
};
static struct pcie_port pcie_port[8];
static int num_pcie_ports;
static struct resource pcie_io_space;
-static struct resource pcie_mem_space;
-
void __init mv78xx0_pcie_id(u32 *dev, u32 *rev)
{
@@ -40,102 +38,59 @@ void __init mv78xx0_pcie_id(u32 *dev, u32 *rev)
*rev = orion_pcie_rev((void __iomem *)PCIE00_VIRT_BASE);
}
+u32 pcie_port_size[8] = {
+ 0,
+ 0x30000000,
+ 0x10000000,
+ 0x10000000,
+ 0x08000000,
+ 0x08000000,
+ 0x08000000,
+ 0x04000000,
+};
+
static void __init mv78xx0_pcie_preinit(void)
{
int i;
u32 size_each;
u32 start;
- int win;
+ int win = 0;
pcie_io_space.name = "PCIe I/O Space";
pcie_io_space.start = MV78XX0_PCIE_IO_PHYS_BASE(0);
pcie_io_space.end =
MV78XX0_PCIE_IO_PHYS_BASE(0) + MV78XX0_PCIE_IO_SIZE * 8 - 1;
- pcie_io_space.flags = IORESOURCE_IO;
+ pcie_io_space.flags = IORESOURCE_MEM;
if (request_resource(&iomem_resource, &pcie_io_space))
panic("can't allocate PCIe I/O space");
- pcie_mem_space.name = "PCIe MEM Space";
- pcie_mem_space.start = MV78XX0_PCIE_MEM_PHYS_BASE;
- pcie_mem_space.end =
- MV78XX0_PCIE_MEM_PHYS_BASE + MV78XX0_PCIE_MEM_SIZE - 1;
- pcie_mem_space.flags = IORESOURCE_MEM;
- if (request_resource(&iomem_resource, &pcie_mem_space))
- panic("can't allocate PCIe MEM space");
+ if (num_pcie_ports > 7)
+ panic("invalid number of PCIe ports");
+
+ size_each = pcie_port_size[num_pcie_ports];
+ start = MV78XX0_PCIE_MEM_PHYS_BASE;
for (i = 0; i < num_pcie_ports; i++) {
struct pcie_port *pp = pcie_port + i;
- snprintf(pp->io_space_name, sizeof(pp->io_space_name),
- "PCIe %d.%d I/O", pp->maj, pp->min);
- pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
- pp->res[0].name = pp->io_space_name;
- pp->res[0].start = MV78XX0_PCIE_IO_PHYS_BASE(i);
- pp->res[0].end = pp->res[0].start + MV78XX0_PCIE_IO_SIZE - 1;
- pp->res[0].flags = IORESOURCE_IO;
-
snprintf(pp->mem_space_name, sizeof(pp->mem_space_name),
"PCIe %d.%d MEM", pp->maj, pp->min);
pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0;
- pp->res[1].name = pp->mem_space_name;
- pp->res[1].flags = IORESOURCE_MEM;
- }
-
- switch (num_pcie_ports) {
- case 0:
- size_each = 0;
- break;
-
- case 1:
- size_each = 0x30000000;
- break;
-
- case 2 ... 3:
- size_each = 0x10000000;
- break;
-
- case 4 ... 6:
- size_each = 0x08000000;
- break;
-
- case 7:
- size_each = 0x04000000;
- break;
-
- default:
- panic("invalid number of PCIe ports");
- }
-
- start = MV78XX0_PCIE_MEM_PHYS_BASE;
- for (i = 0; i < num_pcie_ports; i++) {
- struct pcie_port *pp = pcie_port + i;
-
- pp->res[1].start = start;
- pp->res[1].end = start + size_each - 1;
+ pp->res.name = pp->mem_space_name;
+ pp->res.flags = IORESOURCE_MEM;
+ pp->res.start = start;
+ pp->res.end = start + size_each - 1;
start += size_each;
- }
-
- for (i = 0; i < num_pcie_ports; i++) {
- struct pcie_port *pp = pcie_port + i;
- if (request_resource(&pcie_io_space, &pp->res[0]))
- panic("can't allocate PCIe I/O sub-space");
-
- if (request_resource(&pcie_mem_space, &pp->res[1]))
+ if (request_resource(&iomem_resource, &pp->res))
panic("can't allocate PCIe MEM sub-space");
- }
- win = 0;
- for (i = 0; i < num_pcie_ports; i++) {
- struct pcie_port *pp = pcie_port + i;
+ mv78xx0_setup_pcie_mem_win(win + i + 8, pp->res.start,
+ resource_size(&pp->res),
+ pp->maj, pp->min);
- mv78xx0_setup_pcie_io_win(win++, pp->res[0].start,
- resource_size(&pp->res[0]),
+ mv78xx0_setup_pcie_io_win(win + i, i * SZ_64K, SZ_64K,
pp->maj, pp->min);
-
- mv78xx0_setup_pcie_mem_win(win++, pp->res[1].start,
- resource_size(&pp->res[1]),
- pp->maj, pp->min);
}
}
@@ -156,8 +111,9 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
orion_pcie_setup(pp->base);
- pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
- pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
+ pci_ioremap_io(nr * SZ_64K, MV78XX0_PCIE_IO_PHYS_BASE(nr));
+
+ pci_add_resource_offset(&sys->resources, &pp->res, sys->mem_offset);
return 1;
}
@@ -281,7 +237,7 @@ static void __init add_pcie_port(int maj, int min, unsigned long base)
pp->root_bus_nr = -1;
pp->base = (void __iomem *)base;
spin_lock_init(&pp->conf_lock);
- memset(pp->res, 0, sizeof(pp->res));
+ memset(&pp->res, 0, sizeof(pp->res));
} else {
printk("link down, ignoring\n");
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 15/15] ARM: iop3xx: use fixed PCI i/o mapping
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (13 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 14/15] ARM: mv78xx0: use fixed pci " Rob Herring
@ 2012-07-14 2:04 ` Rob Herring
2012-07-14 7:57 ` [PATCH v2 00/15] PCI io.h clean-up Arnd Bergmann
2012-07-16 7:52 ` Andrew Lunn
16 siblings, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 2:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Move iop33x and iop32x PCI to fixed i/o mapping and remove io.h. This
changes the PCI bus addresses from the cpu address to 0 based. It appears
that there is translation h/w for this, but its untested.
Not sure what to do with io_offset. I think it should always be 0.
AFAICT, PCI setup is skipped if the ATU is already setup.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/Kconfig | 2 --
arch/arm/include/asm/hardware/iop3xx.h | 12 +-----------
arch/arm/mach-iop32x/include/mach/io.h | 19 -------------------
arch/arm/mach-iop33x/include/mach/io.h | 19 -------------------
arch/arm/plat-iop/pci.c | 25 +++++++++----------------
arch/arm/plat-iop/setup.c | 5 -----
6 files changed, 10 insertions(+), 72 deletions(-)
delete mode 100644 arch/arm/mach-iop32x/include/mach/io.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1b7faa5..58bb75e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -495,7 +495,6 @@ config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
select CPU_XSCALE
- select NEED_MACH_IO_H
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
@@ -508,7 +507,6 @@ config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
select CPU_XSCALE
- select NEED_MACH_IO_H
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 2ff2c75..02fe2fb 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -217,18 +217,8 @@ extern int iop3xx_get_init_atu(void);
#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000
#define IOP3XX_PCI_MEM_WINDOW_SIZE 0x08000000
-#define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000
#define IOP3XX_PCI_LOWER_IO_PA 0x90000000
-#define IOP3XX_PCI_LOWER_IO_VA 0xfe000000
-#define IOP3XX_PCI_LOWER_IO_BA 0x90000000
-#define IOP3XX_PCI_UPPER_IO_PA (IOP3XX_PCI_LOWER_IO_PA +\
- IOP3XX_PCI_IO_WINDOW_SIZE - 1)
-#define IOP3XX_PCI_UPPER_IO_VA (IOP3XX_PCI_LOWER_IO_VA +\
- IOP3XX_PCI_IO_WINDOW_SIZE - 1)
-#define IOP3XX_PCI_IO_PHYS_TO_VIRT(addr) (((u32) (addr) -\
- IOP3XX_PCI_LOWER_IO_PA) +\
- IOP3XX_PCI_LOWER_IO_VA)
-
+#define IOP3XX_PCI_LOWER_IO_BA 0x00000000
#ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
deleted file mode 100644
index e2ada26..0000000
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/io.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __IO_H
-#define __IO_H
-
-#include <asm/hardware/iop3xx.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
-
-#endif
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
deleted file mode 100644
index f7c1b65..0000000
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/io.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __IO_H
-#define __IO_H
-
-#include <asm/hardware/iop3xx.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
-
-#endif
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 8daae9b..362474b 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -192,30 +192,24 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)
if (nr != 0)
return 0;
- res = kzalloc(2 * sizeof(struct resource), GFP_KERNEL);
+ res = kzalloc(sizeof(struct resource), GFP_KERNEL);
if (!res)
panic("PCI: unable to alloc resources");
- res[0].start = IOP3XX_PCI_LOWER_IO_PA;
- res[0].end = IOP3XX_PCI_LOWER_IO_PA + IOP3XX_PCI_IO_WINDOW_SIZE - 1;
- res[0].name = "IOP3XX PCI I/O Space";
- res[0].flags = IORESOURCE_IO;
- request_resource(&ioport_resource, &res[0]);
-
- res[1].start = IOP3XX_PCI_LOWER_MEM_PA;
- res[1].end = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE - 1;
- res[1].name = "IOP3XX PCI Memory Space";
- res[1].flags = IORESOURCE_MEM;
- request_resource(&iomem_resource, &res[1]);
+ res->start = IOP3XX_PCI_LOWER_MEM_PA;
+ res->end = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE - 1;
+ res->name = "IOP3XX PCI Memory Space";
+ res->flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, res);
/*
* Use whatever translation is already setup.
*/
sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0;
- sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR;
- pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
- pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, res, sys->mem_offset);
+
+ pci_ioremap_io(0, IOP3XX_PCI_LOWER_IO_PA);
return 1;
}
@@ -367,7 +361,6 @@ void __init iop3xx_pci_preinit_cond(void)
void __init iop3xx_pci_preinit(void)
{
- pcibios_min_io = 0;
pcibios_min_mem = 0;
iop3xx_atu_disable();
diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c
index bade586..5b217f4 100644
--- a/arch/arm/plat-iop/setup.c
+++ b/arch/arm/plat-iop/setup.c
@@ -25,11 +25,6 @@ static struct map_desc iop3xx_std_desc[] __initdata = {
.pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE),
.length = IOP3XX_PERIPHERAL_SIZE,
.type = MT_UNCACHED,
- }, { /* PCI IO space */
- .virtual = IOP3XX_PCI_LOWER_IO_VA,
- .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA),
- .length = IOP3XX_PCI_IO_WINDOW_SIZE,
- .type = MT_DEVICE,
},
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 00/15] PCI io.h clean-up
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (14 preceding siblings ...)
2012-07-14 2:04 ` [PATCH v2 15/15] ARM: iop3xx: use fixed PCI " Rob Herring
@ 2012-07-14 7:57 ` Arnd Bergmann
2012-07-14 12:26 ` Nicolas Pitre
2012-07-14 14:54 ` Rob Herring
2012-07-16 7:52 ` Andrew Lunn
16 siblings, 2 replies; 39+ messages in thread
From: Arnd Bergmann @ 2012-07-14 7:57 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 14 July 2012, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> This is the 2nd part of mach/io.h removals. This series removes io.h on
> platforms with PCI by creating a fixed virtual I/O mapping and a common
> __io() macro.
>
> This version has changed a bit to accommodate Tegra converting its PCIe
> host to a platform driver. Now the virtual space is only reserved during
> early boot before .map_io() is called. The mapping is not created until
> calling pci_ioremap_io which can be done at any point after vmalloc is
> initialized.
>
> I've gone back to fixed 64K windows for each PCI bus. This allows
> removing all the i/o resource setup from the individually platforms and
> placing it within the common ARM PCI code.
>
> I've only tested versatilepb under qemu (with the model hacked up to
> actually enable i/o space), so any testing is appreciated. iop3xx and
> mv78xx0 have some risk of breaking as the PCI bus addresses are moved
> to 0 from matching the cpu host bus addesss.
>
> This is available from my git tree:
>
> git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
I would propose sticking it in the arm-soc tree as a staging branch for
now to get some more testing on this. We can then decide in the merge
window if we consider it good enough or whether we want to delay it
to 3.7.
Any objections?
Arnd
^ permalink raw reply [flat|nested] 39+ messages in thread* [PATCH v2 00/15] PCI io.h clean-up
2012-07-14 7:57 ` [PATCH v2 00/15] PCI io.h clean-up Arnd Bergmann
@ 2012-07-14 12:26 ` Nicolas Pitre
2012-07-14 14:54 ` Rob Herring
1 sibling, 0 replies; 39+ messages in thread
From: Nicolas Pitre @ 2012-07-14 12:26 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, 14 Jul 2012, Arnd Bergmann wrote:
> On Saturday 14 July 2012, Rob Herring wrote:
> > From: Rob Herring <rob.herring@calxeda.com>
> >
> > This is the 2nd part of mach/io.h removals. This series removes io.h on
> > platforms with PCI by creating a fixed virtual I/O mapping and a common
> > __io() macro.
> >
> > This version has changed a bit to accommodate Tegra converting its PCIe
> > host to a platform driver. Now the virtual space is only reserved during
> > early boot before .map_io() is called. The mapping is not created until
> > calling pci_ioremap_io which can be done at any point after vmalloc is
> > initialized.
> >
> > I've gone back to fixed 64K windows for each PCI bus. This allows
> > removing all the i/o resource setup from the individually platforms and
> > placing it within the common ARM PCI code.
> >
> > I've only tested versatilepb under qemu (with the model hacked up to
> > actually enable i/o space), so any testing is appreciated. iop3xx and
> > mv78xx0 have some risk of breaking as the PCI bus addresses are moved
> > to 0 from matching the cpu host bus addesss.
> >
> > This is available from my git tree:
> >
> > git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
>
> I would propose sticking it in the arm-soc tree as a staging branch for
> now to get some more testing on this. We can then decide in the merge
> window if we consider it good enough or whether we want to delay it
> to 3.7.
>
> Any objections?
I suggested a cosmetic fix I'd like to see before this goes into
mainline, but no objections otherwise.
Nicolas
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 00/15] PCI io.h clean-up
2012-07-14 7:57 ` [PATCH v2 00/15] PCI io.h clean-up Arnd Bergmann
2012-07-14 12:26 ` Nicolas Pitre
@ 2012-07-14 14:54 ` Rob Herring
1 sibling, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-14 14:54 UTC (permalink / raw)
To: linux-arm-kernel
On 07/14/2012 02:57 AM, Arnd Bergmann wrote:
> On Saturday 14 July 2012, Rob Herring wrote:
>> From: Rob Herring <rob.herring@calxeda.com>
>>
>> This is the 2nd part of mach/io.h removals. This series removes io.h on
>> platforms with PCI by creating a fixed virtual I/O mapping and a common
>> __io() macro.
>>
>> This version has changed a bit to accommodate Tegra converting its PCIe
>> host to a platform driver. Now the virtual space is only reserved during
>> early boot before .map_io() is called. The mapping is not created until
>> calling pci_ioremap_io which can be done at any point after vmalloc is
>> initialized.
>>
>> I've gone back to fixed 64K windows for each PCI bus. This allows
>> removing all the i/o resource setup from the individually platforms and
>> placing it within the common ARM PCI code.
>>
>> I've only tested versatilepb under qemu (with the model hacked up to
>> actually enable i/o space), so any testing is appreciated. iop3xx and
>> mv78xx0 have some risk of breaking as the PCI bus addresses are moved
>> to 0 from matching the cpu host bus addesss.
>>
>> This is available from my git tree:
>>
>> git://sources.calxeda.com/kernel/linux.git io-cleanup-pci
>
> I would propose sticking it in the arm-soc tree as a staging branch for
> now to get some more testing on this. We can then decide in the merge
> window if we consider it good enough or whether we want to delay it
> to 3.7.
>
> Any objections?
No. BTW, it is all opt in and any platform broken can be simply be
reverted I think. I did tell previously tell Wolfram that he could take
the iop3xx i2c fixes, but they aren't in next yet. So Wolfram, please
don't pick up those 2 commits for i2c-iop3xx.
It changed a bit so I didn't add your reviewed-by. Okay to do so now?
I'll rebase and send you a pull request.
Rob
>
> Arnd
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 00/15] PCI io.h clean-up
2012-07-14 2:03 [PATCH v2 00/15] PCI io.h clean-up Rob Herring
` (15 preceding siblings ...)
2012-07-14 7:57 ` [PATCH v2 00/15] PCI io.h clean-up Arnd Bergmann
@ 2012-07-16 7:52 ` Andrew Lunn
2012-07-16 9:17 ` Arnd Bergmann
2012-07-16 14:03 ` Rob Herring
16 siblings, 2 replies; 39+ messages in thread
From: Andrew Lunn @ 2012-07-16 7:52 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jul 13, 2012 at 09:03:56PM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> This is the 2nd part of mach/io.h removals. This series removes io.h on
> platforms with PCI by creating a fixed virtual I/O mapping and a common
> __io() macro.
Hi Rob
Time to show my ignorance of PCI again.
root at orion5x:~# cat /proc/ioports
00001000-0000ffff : PCI0 I/O
00010000-0001ffff : PCI1 I/O
The changes you made for Orion decreased the window to 64K. However, i
see here that PCI0 only gets 60K, where as PCI1 gets the full 64K.
Is this asymmetry correct?
I see this for both orion5x and kirkwood.
Thanks
Andrew
^ permalink raw reply [flat|nested] 39+ messages in thread* [PATCH v2 00/15] PCI io.h clean-up
2012-07-16 7:52 ` Andrew Lunn
@ 2012-07-16 9:17 ` Arnd Bergmann
2012-07-16 14:03 ` Rob Herring
1 sibling, 0 replies; 39+ messages in thread
From: Arnd Bergmann @ 2012-07-16 9:17 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 16 July 2012, Andrew Lunn wrote:
> The changes you made for Orion decreased the window to 64K. However, i
> see here that PCI0 only gets 60K, where as PCI1 gets the full 64K.
>
> Is this asymmetry correct?
>
> I see this for both orion5x and kirkwood.
The range from 0x0-0xfff is used for ISA-style devices, including those
behind a PCI bridge or emulating one like a VGA text console or an
IDE controller. We set PCIBIOS_MIN_IO to 0x1000 to avoid conflicts
between those and dynamically probed PCI devices that we might otherwise
put in the same range.
Arnd
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 00/15] PCI io.h clean-up
2012-07-16 7:52 ` Andrew Lunn
2012-07-16 9:17 ` Arnd Bergmann
@ 2012-07-16 14:03 ` Rob Herring
1 sibling, 0 replies; 39+ messages in thread
From: Rob Herring @ 2012-07-16 14:03 UTC (permalink / raw)
To: linux-arm-kernel
On 07/16/2012 02:52 AM, Andrew Lunn wrote:
> On Fri, Jul 13, 2012 at 09:03:56PM -0500, Rob Herring wrote:
>> From: Rob Herring <rob.herring@calxeda.com>
>>
>> This is the 2nd part of mach/io.h removals. This series removes io.h on
>> platforms with PCI by creating a fixed virtual I/O mapping and a common
>> __io() macro.
>
> Hi Rob
>
> Time to show my ignorance of PCI again.
>
> root at orion5x:~# cat /proc/ioports
> 00001000-0000ffff : PCI0 I/O
> 00010000-0001ffff : PCI1 I/O
>
> The changes you made for Orion decreased the window to 64K. However, i
> see here that PCI0 only gets 60K, where as PCI1 gets the full 64K.
>
> Is this asymmetry correct?
First, thanks for testing.
PC's only have 64K, so that should be enough for any platform. 0-0x1000
is reserved for legacy ISA range. Even if we set the start to 0,
pcibios_min_io would still limit it to above 0x1000.
Also, based on the address translation masking on these platforms, I
believe it should be okay to start the PCI bus address on a 64K boundary.
Rob
>
> I see this for both orion5x and kirkwood.
>
> Thanks
> Andrew
>
^ permalink raw reply [flat|nested] 39+ messages in thread