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* [PATCH] pinctrl: armada-37xx: Add comment for pcie1_reset pin group
@ 2020-07-24 13:24 ` Pali Rohár
  0 siblings, 0 replies; 4+ messages in thread
From: Pali Rohár @ 2020-07-24 13:24 UTC (permalink / raw)
  To: Jason Cooper, Andrew Lunn, Gregory Clement,
	Sebastian Hesselbarth, Rob Herring, Linus Walleij
  Cc: linux-arm-kernel, devicetree, linux-kernel, linux-gpio

Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like
other PCIe groups it should have been called 'pcie1_reset'. But due to
backward compatibility it is not possible to change existing group name.
So just add comment describing this PCIe reset functionality.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +-
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 2bbc69b4dc99..d5b6c0a1c54a 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -316,7 +316,7 @@
 				};
 
 				pcie_reset_pins: pcie-reset-pins {
-					groups = "pcie1";
+					groups = "pcie1"; /* this actually controls "pcie1_reset" */
 					function = "gpio";
 				};
 
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 5f125bd6279d..8fd8b2af9216 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -196,7 +196,7 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
 	PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
 	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
-	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"),
+	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
 	PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
 	PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
 	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH] pinctrl: armada-37xx: Add comment for pcie1_reset pin group
@ 2020-07-24 13:24 ` Pali Rohár
  0 siblings, 0 replies; 4+ messages in thread
From: Pali Rohár @ 2020-07-24 13:24 UTC (permalink / raw)
  To: Jason Cooper, Andrew Lunn, Gregory Clement,
	Sebastian Hesselbarth, Rob Herring, Linus Walleij
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-gpio

Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like
other PCIe groups it should have been called 'pcie1_reset'. But due to
backward compatibility it is not possible to change existing group name.
So just add comment describing this PCIe reset functionality.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +-
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 2bbc69b4dc99..d5b6c0a1c54a 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -316,7 +316,7 @@
 				};
 
 				pcie_reset_pins: pcie-reset-pins {
-					groups = "pcie1";
+					groups = "pcie1"; /* this actually controls "pcie1_reset" */
 					function = "gpio";
 				};
 
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 5f125bd6279d..8fd8b2af9216 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -196,7 +196,7 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
 	PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
 	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
-	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"),
+	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
 	PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
 	PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
 	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
-- 
2.20.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH] pinctrl: armada-37xx: Add comment for pcie1_reset pin group
  2020-07-24 13:24 ` Pali Rohár
@ 2020-08-13  8:44   ` Linus Walleij
  -1 siblings, 0 replies; 4+ messages in thread
From: Linus Walleij @ 2020-08-13  8:44 UTC (permalink / raw)
  To: Pali Rohár
  Cc: Jason Cooper, Andrew Lunn, Gregory Clement,
	Sebastian Hesselbarth, Rob Herring, Linux ARM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	linux-kernel, open list:GPIO SUBSYSTEM

On Fri, Jul 24, 2020 at 3:25 PM Pali Rohár <pali@kernel.org> wrote:

> Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like
> other PCIe groups it should have been called 'pcie1_reset'. But due to
> backward compatibility it is not possible to change existing group name.
> So just add comment describing this PCIe reset functionality.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>

No reaction from the maintainers and looks good to me,
so patch applied!

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] pinctrl: armada-37xx: Add comment for pcie1_reset pin group
@ 2020-08-13  8:44   ` Linus Walleij
  0 siblings, 0 replies; 4+ messages in thread
From: Linus Walleij @ 2020-08-13  8:44 UTC (permalink / raw)
  To: Pali Rohár
  Cc: Andrew Lunn, Jason Cooper,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Gregory Clement, linux-kernel, open list:GPIO SUBSYSTEM,
	Rob Herring, Linux ARM, Sebastian Hesselbarth

On Fri, Jul 24, 2020 at 3:25 PM Pali Rohár <pali@kernel.org> wrote:

> Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like
> other PCIe groups it should have been called 'pcie1_reset'. But due to
> backward compatibility it is not possible to change existing group name.
> So just add comment describing this PCIe reset functionality.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>

No reaction from the maintainers and looks good to me,
so patch applied!

Yours,
Linus Walleij

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-08-13  8:45 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-24 13:24 [PATCH] pinctrl: armada-37xx: Add comment for pcie1_reset pin group Pali Rohár
2020-07-24 13:24 ` Pali Rohár
2020-08-13  8:44 ` Linus Walleij
2020-08-13  8:44   ` Linus Walleij

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