* [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update
@ 2016-09-20 21:06 Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 1/7] sf: Simplify fastest read cmd code Jagan Teki
` (7 more replies)
0 siblings, 8 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
This series is the spilt one of v3 "spi/sf: Update on flash detection" [1]
and deals with Code remove and update.
Changes for v3:
- New patches
- Fix checkpatch.pl
- Fix BIT positions in spi.h
- Fix ti_qspi.c mode
- Fix commit Nit: s/becuase/because
Changes for v2:
- New patches.
[1] http://u-boot.10912.n7.nabble.com/PATCH-v3-00-27-spi-sf-Updates-on-flash-detection-td264084.html
Jagan Teki (7):
sf: Simplify fastest read cmd code
sf: Remove e_rd_cmd from param table
spi: Use mode for rx mode flags
spi: Remove SPI_RX_FAST
sf: Remove SECT_32K
sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
sf: Move flags macro's to spi_flash_params{} members
drivers/mtd/spi/sandbox.c | 5 +-
drivers/mtd/spi/sf_internal.h | 41 +++------
drivers/mtd/spi/sf_params.c | 200 +++++++++++++++++++++---------------------
drivers/mtd/spi/spi_flash.c | 36 +++-----
drivers/spi/cadence_qspi.c | 2 +-
drivers/spi/ich.c | 6 +-
drivers/spi/spi-uclass.c | 11 +--
drivers/spi/ti_qspi.c | 6 +-
include/spi.h | 13 +--
9 files changed, 138 insertions(+), 182 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 1/7] sf: Simplify fastest read cmd code
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 2/7] sf: Remove e_rd_cmd from param table Jagan Teki
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
Fastest read command code look for fastest read command
taking inputs from spi->mode_rx and flags from param table
and controller mode_rx is always been a priority.
Since mode_rx is always set from controller side this optimized
code doesn't require much and this code required exctra overhead like
1) Maintain e_rx_cmd in param table
2) Maintain mode_rx in spi_slave {}
Hence removed this code, and look for read command from normal
spi->mode from spi_slave{} and params->flags
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 4 ++++
drivers/mtd/spi/spi_flash.c | 28 ++++++++++------------------
2 files changed, 14 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index da2bb7b..c5cb791 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -46,6 +46,10 @@ enum {
E_FSR = BIT(2),
SST_WR = BIT(3),
WR_QPP = BIT(4),
+ RD_QUAD = BIT(5),
+ RD_DUAL = BIT(6),
+ RD_QUADIO = BIT(7),
+ RD_DUALIO = BIT(8),
};
enum spi_nor_option_flags {
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 64d4e0f..5fd408c 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1013,15 +1013,8 @@ int spi_flash_scan(struct spi_flash *flash)
struct spi_slave *spi = flash->spi;
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
- u8 cmd, idcode[5];
+ u8 idcode[5];
int ret;
- static u8 spi_read_cmds_array[] = {
- CMD_READ_ARRAY_SLOW,
- CMD_READ_ARRAY_FAST,
- CMD_READ_DUAL_OUTPUT_FAST,
- CMD_READ_QUAD_OUTPUT_FAST,
- CMD_READ_DUAL_IO_FAST,
- CMD_READ_QUAD_IO_FAST };
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
@@ -1177,17 +1170,16 @@ int spi_flash_scan(struct spi_flash *flash)
/* Now erase size becomes valid sector size */
flash->sector_size = flash->erase_size;
- /* Look for the fastest read cmd */
- cmd = fls(params->e_rd_cmd & spi->mode_rx);
- if (cmd) {
- cmd = spi_read_cmds_array[cmd - 1];
- flash->read_cmd = cmd;
- } else {
- /* Go for default supported read cmd */
- flash->read_cmd = CMD_READ_ARRAY_FAST;
- }
+ /* Look for read commands */
+ flash->read_cmd = CMD_READ_ARRAY_FAST;
+ if (spi->mode_rx & SPI_RX_SLOW)
+ flash->read_cmd = CMD_READ_ARRAY_SLOW;
+ else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD)
+ flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
+ else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL)
+ flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
- /* Not require to look for fastest only two write cmds yet */
+ /* Look for write commands */
if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
else
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 2/7] sf: Remove e_rd_cmd from param table
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 1/7] sf: Simplify fastest read cmd code Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 3/7] spi: Use mode for rx mode flags Jagan Teki
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
e_rd_cmd is maintained separately for fastest read command code,
since the read commands are computed normally this e_rd_cmd
is not required in spi_flash_params table.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 18 +---
drivers/mtd/spi/sf_params.c | 200 +++++++++++++++++++++---------------------
2 files changed, 101 insertions(+), 117 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index c5cb791..71ba1a6 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -20,21 +20,6 @@ enum spi_dual_flash {
SF_DUAL_PARALLEL_FLASH = BIT(1),
};
-/* Enum list - Full read commands */
-enum spi_read_cmds {
- ARRAY_SLOW = BIT(0),
- ARRAY_FAST = BIT(1),
- DUAL_OUTPUT_FAST = BIT(2),
- QUAD_OUTPUT_FAST = BIT(3),
- DUAL_IO_FAST = BIT(4),
- QUAD_IO_FAST = BIT(5),
-};
-
-/* Normal - Extended - Full command set */
-#define RD_NORM (ARRAY_SLOW | ARRAY_FAST)
-#define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
-#define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
-
/* sf param flags */
enum {
#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
@@ -51,6 +36,7 @@ enum {
RD_QUADIO = BIT(7),
RD_DUALIO = BIT(8),
};
+#define RD_FULL RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
enum spi_nor_option_flags {
SNOR_F_SST_WR = BIT(0),
@@ -145,7 +131,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
* @sector_size: Isn't necessarily a sector size from vendor,
* the size listed here is what works with CMD_ERASE_64K
* @nr_sectors: No.of sectors on this device
- * @e_rd_cmd: Enum list for read commands
* @flags: Important param, for flash specific behaviour
*/
struct spi_flash_params {
@@ -154,7 +139,6 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
- u8 e_rd_cmd;
u16 flags;
};
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 70ca236..5b50114 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -15,122 +15,122 @@
/* SPI/QSPI flash device params structure */
const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K},
- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K},
- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K},
- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K},
+ {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
+ {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
+ {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
+ {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
+ {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
+ {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
+ {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
+ {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
+ {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
+ {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, RD_NORM, 0},
- {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, RD_NORM, 0},
+ {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
+ {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
+ {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
+ {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
+ {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
+ {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
- {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, RD_NORM, 0},
+ {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
+ {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
+ {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, RD_NORM, 0},
- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, RD_NORM, 0},
- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP},
- {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP},
- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
+ {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
+ {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
+ {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
+ {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
+ {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
+ {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
+ {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP},
+ {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP},
+ {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, RD_NORM, 0},
- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL, WR_QPP},
- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL, WR_QPP},
- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL, WR_QPP},
- {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL, WR_QPP},
- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL, WR_QPP},
- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP},
- {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL, WR_QPP},
- {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL, WR_QPP},
- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP},
- {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL, WR_QPP},
+ {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
+ {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
+ {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
+ {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
+ {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
+ {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
+ {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP},
+ {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP},
+ {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP},
+ {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP},
+ {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP},
+ {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP},
+ {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP},
+ {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP},
+ {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, RD_NORM, 0},
- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, RD_NORM, 0},
- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, RD_NORM, 0},
- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, RD_NORM, 0},
- {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_EXTN, 0},
- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, RD_NORM, 0},
- {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K},
- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
+ {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
+ {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
+ {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
+ {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
+ {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
+ {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
+ {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL},
+ {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
+ {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
+ {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
+ {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
+ {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
+ {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR},
+ {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
+ {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
+ {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR},
+ {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR},
+ {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
+ {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR},
+ {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR},
+ {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR},
+ {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
+ {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K},
+ {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K},
- {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
+ {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
+ {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
+ {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
+ {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
+ {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
+ {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
+ {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
+ {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
#endif
{}, /* Empty entry to terminate the list */
/*
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 3/7] spi: Use mode for rx mode flags
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 1/7] sf: Simplify fastest read cmd code Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 2/7] sf: Remove e_rd_cmd from param table Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 4/7] spi: Remove SPI_RX_FAST Jagan Teki
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
Make rx mode flags as generic to spi, earlier mode_rx is
maintained separately because of some flash specific code.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/spi_flash.c | 6 +++---
drivers/spi/cadence_qspi.c | 2 +-
drivers/spi/ich.c | 6 ++----
drivers/spi/spi-uclass.c | 11 ++++-------
drivers/spi/ti_qspi.c | 6 +++---
include/spi.h | 14 ++++----------
6 files changed, 17 insertions(+), 28 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 5fd408c..041b64f 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1172,11 +1172,11 @@ int spi_flash_scan(struct spi_flash *flash)
/* Look for read commands */
flash->read_cmd = CMD_READ_ARRAY_FAST;
- if (spi->mode_rx & SPI_RX_SLOW)
+ if (spi->mode & SPI_RX_SLOW)
flash->read_cmd = CMD_READ_ARRAY_SLOW;
- else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD)
+ else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
- else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL)
+ else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
/* Look for write commands */
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index a5244ff..1d50f13 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -251,7 +251,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen,
break;
case CQSPI_INDIRECT_READ:
err = cadence_qspi_apb_indirect_read_setup(plat,
- priv->cmd_len, dm_plat->mode_rx, cmd_buf);
+ priv->cmd_len, dm_plat->mode, cmd_buf);
if (!err) {
err = cadence_qspi_apb_indirect_read_execute
(plat, data_bytes, din);
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 00b2fed..caf0103 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -649,10 +649,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
* ICH 7 SPI controller only supports array read command
* and byte program command for SST flash
*/
- if (plat->ich_version == ICHV_7) {
- slave->mode_rx = SPI_RX_SLOW;
- slave->mode = SPI_TX_BYTE;
- }
+ if (plat->ich_version == ICHV_7)
+ slave->mode = SPI_RX_SLOW | SPI_TX_BYTE;
return 0;
}
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 247abfa..d9c49e4 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -164,7 +164,6 @@ static int spi_child_pre_probe(struct udevice *dev)
slave->max_hz = plat->max_hz;
slave->mode = plat->mode;
- slave->mode_rx = plat->mode_rx;
slave->wordlen = SPI_DEFAULT_WORDLEN;
return 0;
@@ -381,7 +380,7 @@ void spi_free_slave(struct spi_slave *slave)
int spi_slave_ofdata_to_platdata(const void *blob, int node,
struct dm_spi_slave_platdata *plat)
{
- int mode = 0, mode_rx = 0;
+ int mode = 0;
int value;
plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -413,24 +412,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node,
break;
}
- plat->mode = mode;
-
value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1);
switch (value) {
case 1:
break;
case 2:
- mode_rx |= SPI_RX_DUAL;
+ mode |= SPI_RX_DUAL;
break;
case 4:
- mode_rx |= SPI_RX_QUAD;
+ mode |= SPI_RX_QUAD;
break;
default:
error("spi-rx-bus-width %d not supported\n", value);
break;
}
- plat->mode_rx = mode_rx;
+ plat->mode = mode;
return 0;
}
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index bb72cb0..e51cbd0 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -336,7 +336,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv)
QSPI_SETUP0_NUM_D_BYTES_8_BITS |
QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
QSPI_NUM_DUMMY_BITS);
- slave->mode_rx = SPI_RX_QUAD;
+ slave->mode |= SPI_RX_QUAD;
#else
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
@@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv,
bool enable)
{
u32 memval;
- u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
+ u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL);
if (!enable) {
writel(0, &priv->base->setup0);
@@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv,
memval |= QSPI_CMD_READ_QUAD;
memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
memval |= QSPI_SETUP0_READ_QUAD;
- slave->mode_rx = SPI_RX_QUAD;
+ slave->mode |= SPI_RX_QUAD;
break;
case SPI_RX_DUAL:
memval |= QSPI_CMD_READ_DUAL;
diff --git a/include/spi.h b/include/spi.h
index ca96fa4..b262e06 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -26,12 +26,10 @@
#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */
#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
-
-/* SPI mode_rx flags */
-#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */
-#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */
-#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */
-#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
+#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
+#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */
+#define SPI_RX_DUAL BIT(13) /* receive with 2 wires */
+#define SPI_RX_QUAD BIT(14) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 << 0)
@@ -61,13 +59,11 @@ struct dm_spi_bus {
* @cs: Chip select number (0..n-1)
* @max_hz: Maximum bus speed that this slave can tolerate
* @mode: SPI mode to use for this device (see SPI mode flags)
- * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
*/
struct dm_spi_slave_platdata {
unsigned int cs;
uint max_hz;
uint mode;
- u8 mode_rx;
};
#endif /* CONFIG_DM_SPI */
@@ -94,7 +90,6 @@ struct dm_spi_slave_platdata {
* bus (bus->seq) so does not need to be stored
* @cs: ID of the chip select connected to the slave.
* @mode: SPI mode to use for this slave (see SPI mode flags)
- * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
* @wordlen: Size of SPI word in number of bits
* @max_write_size: If non-zero, the maximum number of bytes which can
* be written at once, excluding command bytes.
@@ -112,7 +107,6 @@ struct spi_slave {
unsigned int cs;
#endif
uint mode;
- u8 mode_rx;
unsigned int wordlen;
unsigned int max_write_size;
void *memory_map;
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 4/7] spi: Remove SPI_RX_FAST
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
` (2 preceding siblings ...)
2016-09-20 21:06 ` [U-Boot] [PATCH v4 3/7] spi: Use mode for rx mode flags Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 5/7] sf: Remove SECT_32K Jagan Teki
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
Removed SPI_RX_FAST since default read for spi slaves
are always 1-wire fast read.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
include/spi.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/spi.h b/include/spi.h
index b262e06..4c17983 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -27,9 +27,8 @@
#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
-#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */
-#define SPI_RX_DUAL BIT(13) /* receive with 2 wires */
-#define SPI_RX_QUAD BIT(14) /* receive with 4 wires */
+#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
+#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 << 0)
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 5/7] sf: Remove SECT_32K
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
` (3 preceding siblings ...)
2016-09-20 21:06 ` [U-Boot] [PATCH v4 4/7] spi: Remove SPI_RX_FAST Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 6/7] sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash Jagan Teki
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
SECT_32K never used anywhere in the code.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sandbox.c | 5 +----
drivers/mtd/spi/sf_internal.h | 16 +++++++---------
drivers/mtd/spi/spi_flash.c | 3 ---
3 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 53470b9..f59134f 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -292,10 +292,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
sbsf->data->nr_sectors;
} else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) {
sbsf->erase_size = 4 << 10;
- } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) {
- sbsf->erase_size = 32 << 10;
- } else if (sbsf->cmd == CMD_ERASE_64K &&
- !(flags & (SECT_4K | SECT_32K))) {
+ } else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) {
sbsf->erase_size = 64 << 10;
} else {
debug(" cmd unknown: %#x\n", sbsf->cmd);
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 71ba1a6..9eb0b84 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -27,14 +27,13 @@ enum {
#else
SECT_4K = BIT(0),
#endif
- SECT_32K = BIT(1),
- E_FSR = BIT(2),
- SST_WR = BIT(3),
- WR_QPP = BIT(4),
- RD_QUAD = BIT(5),
- RD_DUAL = BIT(6),
- RD_QUADIO = BIT(7),
- RD_DUALIO = BIT(8),
+ E_FSR = BIT(1),
+ SST_WR = BIT(2),
+ WR_QPP = BIT(3),
+ RD_QUAD = BIT(4),
+ RD_DUAL = BIT(5),
+ RD_QUADIO = BIT(6),
+ RD_DUALIO = BIT(7),
};
#define RD_FULL RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
@@ -57,7 +56,6 @@ enum spi_nor_option_flags {
/* Erase commands */
#define CMD_ERASE_4K 0x20
-#define CMD_ERASE_32K 0x52
#define CMD_ERASE_CHIP 0xc7
#define CMD_ERASE_64K 0xd8
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 041b64f..2b2a409 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1159,9 +1159,6 @@ int spi_flash_scan(struct spi_flash *flash)
if (params->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
flash->erase_size = 4096 << flash->shift;
- } else if (params->flags & SECT_32K) {
- flash->erase_cmd = CMD_ERASE_32K;
- flash->erase_size = 32768 << flash->shift;
} else {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 6/7] sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
` (4 preceding siblings ...)
2016-09-20 21:06 ` [U-Boot] [PATCH v4 5/7] sf: Remove SECT_32K Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 7/7] sf: Move flags macro's to spi_flash_params{} members Jagan Teki
2016-09-22 14:56 ` [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 4 ----
drivers/mtd/spi/spi_flash.c | 5 ++++-
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 9eb0b84..1301e48 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -22,11 +22,7 @@ enum spi_dual_flash {
/* sf param flags */
enum {
-#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
- SECT_4K = 0,
-#else
SECT_4K = BIT(0),
-#endif
E_FSR = BIT(1),
SST_WR = BIT(2),
WR_QPP = BIT(3),
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 2b2a409..7f6e9ae 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1155,11 +1155,14 @@ int spi_flash_scan(struct spi_flash *flash)
flash->size <<= 1;
#endif
+#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
/* Compute erase sector and command */
if (params->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
flash->erase_size = 4096 << flash->shift;
- } else {
+ } else
+#endif
+ {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 7/7] sf: Move flags macro's to spi_flash_params{} members
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
` (5 preceding siblings ...)
2016-09-20 21:06 ` [U-Boot] [PATCH v4 6/7] sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash Jagan Teki
@ 2016-09-20 21:06 ` Jagan Teki
2016-09-22 14:56 ` [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-20 21:06 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jteki@openedev.com>
This patch moves flags macro's to respective member position on
spi_flash_params{}, for better readabilty and finding the
respective member macro's easily.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 1301e48..cde4cfb 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -20,19 +20,6 @@ enum spi_dual_flash {
SF_DUAL_PARALLEL_FLASH = BIT(1),
};
-/* sf param flags */
-enum {
- SECT_4K = BIT(0),
- E_FSR = BIT(1),
- SST_WR = BIT(2),
- WR_QPP = BIT(3),
- RD_QUAD = BIT(4),
- RD_DUAL = BIT(5),
- RD_QUADIO = BIT(6),
- RD_DUALIO = BIT(7),
-};
-#define RD_FULL RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
-
enum spi_nor_option_flags {
SNOR_F_SST_WR = BIT(0),
SNOR_F_USE_FSR = BIT(1),
@@ -133,7 +120,17 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
+
u16 flags;
+#define SECT_4K BIT(0)
+#define E_FSR BIT(1)
+#define SST_WR BIT(2)
+#define WR_QPP BIT(3)
+#define RD_QUAD BIT(4)
+#define RD_DUAL BIT(5)
+#define RD_QUADIO BIT(6)
+#define RD_DUALIO BIT(7)
+#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
};
extern const struct spi_flash_params spi_flash_params_table[];
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
` (6 preceding siblings ...)
2016-09-20 21:06 ` [U-Boot] [PATCH v4 7/7] sf: Move flags macro's to spi_flash_params{} members Jagan Teki
@ 2016-09-22 14:56 ` Jagan Teki
7 siblings, 0 replies; 9+ messages in thread
From: Jagan Teki @ 2016-09-22 14:56 UTC (permalink / raw)
To: u-boot
On Wed, Sep 21, 2016 at 2:36 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> This series is the spilt one of v3 "spi/sf: Update on flash detection" [1]
> and deals with Code remove and update.
>
> Changes for v3:
> - New patches
> - Fix checkpatch.pl
> - Fix BIT positions in spi.h
> - Fix ti_qspi.c mode
> - Fix commit Nit: s/becuase/because
>
> Changes for v2:
> - New patches.
>
> [1] http://u-boot.10912.n7.nabble.com/PATCH-v3-00-27-spi-sf-Updates-on-flash-detection-td264084.html
>
> Jagan Teki (7):
> sf: Simplify fastest read cmd code
> sf: Remove e_rd_cmd from param table
> spi: Use mode for rx mode flags
> spi: Remove SPI_RX_FAST
> sf: Remove SECT_32K
> sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
> sf: Move flags macro's to spi_flash_params{} members
Applied to u-boot-spi/master
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2016-09-22 14:56 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-20 21:06 [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 1/7] sf: Simplify fastest read cmd code Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 2/7] sf: Remove e_rd_cmd from param table Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 3/7] spi: Use mode for rx mode flags Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 4/7] spi: Remove SPI_RX_FAST Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 5/7] sf: Remove SECT_32K Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 6/7] sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash Jagan Teki
2016-09-20 21:06 ` [U-Boot] [PATCH v4 7/7] sf: Move flags macro's to spi_flash_params{} members Jagan Teki
2016-09-22 14:56 ` [U-Boot] [PATCH v4 0/7] spi/sf: Code removal/update Jagan Teki
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