* [U-Boot] [PATCH v4] spi: fsl_qspi: Add controller busy check before new spi operation
@ 2017-08-30 14:36 Suresh Gupta
2017-08-30 15:26 ` Jagan Teki
0 siblings, 1 reply; 3+ messages in thread
From: Suresh Gupta @ 2017-08-30 14:36 UTC (permalink / raw)
To: u-boot
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
---
Change in v4:
- change Timeout from 1000ms to 100ms
Changes in v3:
- replace printf to debug
- return whatever return from wait_for_bit, before it was -EBUSY
Changes in v2:
- Add wait_for_bit instead of while
- move the busy check code to fsl_qspi_claim_bus form qspi_xfer
drivers/spi/fsl_qspi.c | 28 +++++++++++++++++++++++++++-
drivers/spi/fsl_qspi.h | 4 ++++
2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 1dfa89a..8753ed9 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -14,6 +14,7 @@
#include <dm.h>
#include <errno.h>
#include <watchdog.h>
+#include <wait_bit.h>
#include "fsl_qspi.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -991,7 +992,7 @@ static int fsl_qspi_probe(struct udevice *bus)
struct fsl_qspi_platdata *plat = dev_get_platdata(bus);
struct fsl_qspi_priv *priv = dev_get_priv(bus);
struct dm_spi_bus *dm_spi_bus;
- int i;
+ int i, ret;
dm_spi_bus = bus->uclass_priv;
@@ -1011,6 +1012,18 @@ static int fsl_qspi_probe(struct udevice *bus)
priv->flash_num = plat->flash_num;
priv->num_chipselect = plat->num_chipselect;
+ /* make sure controller is not busy anywhere */
+ ret = wait_for_bit(__func__, &priv->regs->sr,
+ QSPI_SR_BUSY_MASK |
+ QSPI_SR_AHB_ACC_MASK |
+ QSPI_SR_IP_ACC_MASK,
+ false, 100, false);
+
+ if (ret) {
+ debug("ERROR : The controller is busy\n");
+ return ret;
+ }
+
mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);
qspi_write32(priv->flags, &priv->regs->mcr,
QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
@@ -1156,10 +1169,23 @@ static int fsl_qspi_claim_bus(struct udevice *dev)
struct fsl_qspi_priv *priv;
struct udevice *bus;
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+ int ret;
bus = dev->parent;
priv = dev_get_priv(bus);
+ /* make sure controller is not busy anywhere */
+ ret = wait_for_bit(__func__, &priv->regs->sr,
+ QSPI_SR_BUSY_MASK |
+ QSPI_SR_AHB_ACC_MASK |
+ QSPI_SR_IP_ACC_MASK,
+ false, 100, false);
+
+ if (ret) {
+ debug("ERROR : The controller is busy\n");
+ return ret;
+ }
+
priv->cur_amba_base = priv->amba_base[slave_plat->cs];
qspi_module_disable(priv, 0);
diff --git a/drivers/spi/fsl_qspi.h b/drivers/spi/fsl_qspi.h
index 6cb3610..e468eb2 100644
--- a/drivers/spi/fsl_qspi.h
+++ b/drivers/spi/fsl_qspi.h
@@ -105,6 +105,10 @@ struct fsl_qspi_regs {
#define QSPI_RBCT_RXBRD_SHIFT 8
#define QSPI_RBCT_RXBRD_USEIPS (1 << QSPI_RBCT_RXBRD_SHIFT)
+#define QSPI_SR_AHB_ACC_SHIFT 2
+#define QSPI_SR_AHB_ACC_MASK (1 << QSPI_SR_AHB_ACC_SHIFT)
+#define QSPI_SR_IP_ACC_SHIFT 1
+#define QSPI_SR_IP_ACC_MASK (1 << QSPI_SR_IP_ACC_SHIFT)
#define QSPI_SR_BUSY_SHIFT 0
#define QSPI_SR_BUSY_MASK (1 << QSPI_SR_BUSY_SHIFT)
--
1.9.3
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v4] spi: fsl_qspi: Add controller busy check before new spi operation
2017-08-30 14:36 [U-Boot] [PATCH v4] spi: fsl_qspi: Add controller busy check before new spi operation Suresh Gupta
@ 2017-08-30 15:26 ` Jagan Teki
2017-09-25 7:20 ` Jagan Teki
0 siblings, 1 reply; 3+ messages in thread
From: Jagan Teki @ 2017-08-30 15:26 UTC (permalink / raw)
To: u-boot
On Wed, Aug 30, 2017 at 8:06 PM, Suresh Gupta <suresh.gupta@nxp.com> wrote:
> It is recommended to check either controller is free to take
> new spi action. The IP_ACC and AHB_ACC bits indicates that
> the controller is busy in IP or AHB mode respectively.
> And the BUSY bit indicates that controller is currently
> busy handling a transaction to an external flash device
>
> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
> ---
Reviewed-by: Jagan Teki <jagan@openedev.com>
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v4] spi: fsl_qspi: Add controller busy check before new spi operation
2017-08-30 15:26 ` Jagan Teki
@ 2017-09-25 7:20 ` Jagan Teki
0 siblings, 0 replies; 3+ messages in thread
From: Jagan Teki @ 2017-09-25 7:20 UTC (permalink / raw)
To: u-boot
On Wed, Aug 30, 2017 at 8:56 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> On Wed, Aug 30, 2017 at 8:06 PM, Suresh Gupta <suresh.gupta@nxp.com> wrote:
>> It is recommended to check either controller is free to take
>> new spi action. The IP_ACC and AHB_ACC bits indicates that
>> the controller is busy in IP or AHB mode respectively.
>> And the BUSY bit indicates that controller is currently
>> busy handling a transaction to an external flash device
>>
>> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
>> ---
>
> Reviewed-by: Jagan Teki <jagan@openedev.com>
Applied to u-boot-spi/master
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-08-30 14:36 [U-Boot] [PATCH v4] spi: fsl_qspi: Add controller busy check before new spi operation Suresh Gupta
2017-08-30 15:26 ` Jagan Teki
2017-09-25 7:20 ` Jagan Teki
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