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* [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash
@ 2015-05-28  1:42 Vikas Manocha
  2015-05-28  1:42 ` [U-Boot] [PATCH 1/3] stv0991: configure clock & pad muxing for qspi Vikas Manocha
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Vikas Manocha @ 2015-05-28  1:42 UTC (permalink / raw)
  To: u-boot

This patchset enables cadence qspi controller for stv0991 soc.

Vikas Manocha (3):
  stv0991: configure clock & pad muxing for qspi
  stv0991: enable cadence qspi controller & spi flash
  stv0991: configure device tree for cadence qspi & flash

 arch/arm/cpu/armv7/stv0991/clock.c                 |    4 ++-
 arch/arm/cpu/armv7/stv0991/pinmux.c                |    5 +++
 arch/arm/dts/stv0991.dts                           |   34 ++++++++++++++++++++
 arch/arm/include/asm/arch-stv0991/stv0991_cgu.h    |   15 +++++++++
 arch/arm/include/asm/arch-stv0991/stv0991_creg.h   |    9 ++++++
 arch/arm/include/asm/arch-stv0991/stv0991_periph.h |    2 ++
 board/st/stv0991/stv0991.c                         |    8 +++++
 include/configs/stv0991.h                          |   18 +++++++++++
 8 files changed, 94 insertions(+), 1 deletion(-)

-- 
1.7.9.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH 1/3] stv0991: configure clock & pad muxing for qspi
  2015-05-28  1:42 [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
@ 2015-05-28  1:42 ` Vikas Manocha
  2015-05-28  1:42 ` [U-Boot] [PATCH 2/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Vikas Manocha @ 2015-05-28  1:42 UTC (permalink / raw)
  To: u-boot

stv0991 has cadence qspi controller for flash interfacing, this
patch configures the device pads & clock for the controller.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
---
 arch/arm/cpu/armv7/stv0991/clock.c                 |    4 +++-
 arch/arm/cpu/armv7/stv0991/pinmux.c                |    5 +++++
 arch/arm/include/asm/arch-stv0991/stv0991_cgu.h    |   15 +++++++++++++++
 arch/arm/include/asm/arch-stv0991/stv0991_creg.h   |    9 +++++++++
 arch/arm/include/asm/arch-stv0991/stv0991_periph.h |    2 ++
 board/st/stv0991/stv0991.c                         |    8 ++++++++
 6 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/stv0991/clock.c b/arch/arm/cpu/armv7/stv0991/clock.c
index 70b8a8d..26c0d36 100644
--- a/arch/arm/cpu/armv7/stv0991/clock.c
+++ b/arch/arm/cpu/armv7/stv0991/clock.c
@@ -33,7 +33,9 @@ void clock_setup(int peripheral)
 		/* Clock selection for ethernet tx_clk & rx_clk*/
 		writel((readl(&stv0991_cgu_regs->eth_ctrl) & ETH_CLK_MASK)
 				| ETH_CLK_CTRL, &stv0991_cgu_regs->eth_ctrl);
-
+		break;
+	case QSPI_CLOCK_CFG:
+		writel(QSPI_CLK_CTRL, &stv0991_cgu_regs->qspi_freq);
 		break;
 	default:
 		break;
diff --git a/arch/arm/cpu/armv7/stv0991/pinmux.c b/arch/arm/cpu/armv7/stv0991/pinmux.c
index 1d086a2..24c67fa 100644
--- a/arch/arm/cpu/armv7/stv0991/pinmux.c
+++ b/arch/arm/cpu/armv7/stv0991/pinmux.c
@@ -55,6 +55,11 @@ int stv0991_pinmux_config(int peripheral)
 				ETH_M_VDD_CFG, &stv0991_creg->vdd_pad1);
 
 		break;
+	case QSPI_CS_CLK_PAD:
+		writel((readl(&stv0991_creg->mux13) & FLASH_CS_NC_MASK) |
+				CFG_FLASH_CS_NC, &stv0991_creg->mux13);
+		writel((readl(&stv0991_creg->mux13) & FLASH_CLK_MASK) |
+				CFG_FLASH_CLK, &stv0991_creg->mux13);
 	default:
 		break;
 	}
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
index ddcbb57..f0045f3 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
@@ -113,4 +113,19 @@ struct stv0991_cgu_regs {
 
 #define ETH_CLK_CTRL			(ETH_CLK_RX_EXT_PHY << RX_CLK_SHIFT \
 					| ETH_CLK_TX_EXT_PHY)
+/* CGU qspi clock */
+#define DIV_HCLK1_SHIFT			9
+#define DIV_CRYP_SHIFT			6
+#define MDIV_QSPI_SHIFT			3
+
+#define CLK_QSPI_OSC			0
+#define CLK_QSPI_MCLK			1
+#define CLK_QSPI_PLL1			2
+#define CLK_QSPI_PLL2			3
+
+#define QSPI_CLK_CTRL			(3 << DIV_HCLK1_SHIFT \
+					| 1 << DIV_CRYP_SHIFT \
+					| 0 << MDIV_QSPI_SHIFT \
+					| CLK_QSPI_OSC)
+
 #endif
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
index c804eb5..cc3c0fb 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
@@ -49,6 +49,15 @@ struct stv0991_creg {
 	u32 vdd_comp1;		/* offset 0x400 */
 };
 
+/* CREG MUX 13 register */
+#define FLASH_CS_NC_SHIFT	4
+#define FLASH_CS_NC_MASK 	~(7 << FLASH_CS_NC_SHIFT)
+#define CFG_FLASH_CS_NC		(0 << FLASH_CS_NC_SHIFT)
+
+#define FLASH_CLK_SHIFT		0
+#define FLASH_CLK_MASK		~(7 << FLASH_CLK_SHIFT)
+#define CFG_FLASH_CLK		(0 << FLASH_CLK_SHIFT)
+
 /* CREG MUX 12 register */
 #define GPIOC_30_MUX_SHIFT	24
 #define GPIOC_30_MUX_MASK	~(1 << GPIOC_30_MUX_SHIFT)
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
index f728c83..725da83 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
@@ -18,6 +18,7 @@ enum periph_id {
 	UART_GPIOC_30_31 = 0,
 	UART_GPIOB_16_17,
 	ETH_GPIOB_10_31_C_0_4,
+	QSPI_CS_CLK_PAD,
 	PERIPH_ID_I2C0,
 	PERIPH_ID_I2C1,
 	PERIPH_ID_I2C2,
@@ -39,6 +40,7 @@ enum periph_id {
 enum periph_clock {
 	UART_CLOCK_CFG = 0,
 	ETH_CLOCK_CFG,
+	QSPI_CLOCK_CFG,
 };
 
 #endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c
index 09f973f..add1ce1 100644
--- a/board/st/stv0991/stv0991.c
+++ b/board/st/stv0991/stv0991.c
@@ -55,12 +55,20 @@ int board_eth_enable(void)
 	return 0;
 }
 
+int board_qspi_enable(void)
+{
+	stv0991_pinmux_config(QSPI_CS_CLK_PAD);
+	clock_setup(QSPI_CLOCK_CFG);
+	return 0;
+}
+
 /*
  * Miscellaneous platform dependent initialisations
  */
 int board_init(void)
 {
 	board_eth_enable();
+	board_qspi_enable();
 	return 0;
 }
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH 2/3] stv0991: enable cadence qspi controller & spi flash
  2015-05-28  1:42 [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
  2015-05-28  1:42 ` [U-Boot] [PATCH 1/3] stv0991: configure clock & pad muxing for qspi Vikas Manocha
@ 2015-05-28  1:42 ` Vikas Manocha
  2015-05-28  1:42 ` [U-Boot] [PATCH 3/3] stv0991: configure device tree for cadence qspi & flash Vikas Manocha
  2015-06-15 20:54 ` [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas MANOCHA
  3 siblings, 0 replies; 6+ messages in thread
From: Vikas Manocha @ 2015-05-28  1:42 UTC (permalink / raw)
  To: u-boot

This patch does all the board configurations required to use the qspi
controller & attached spi flash memory.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
---
 include/configs/stv0991.h |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index df40361..4138b32 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -82,5 +82,23 @@
 #define CONFIG_OF_SEPARATE
 #define CONFIG_OF_CONTROL
 #define CONFIG_OF_LIBFDT
+
+/*
+ * QSPI support
+ */
+#ifdef CONFIG_OF_CONTROL		/* QSPI is controlled via DT */
+#define CONFIG_DM_SPI
+#define CONFIG_CADENCE_QSPI
+#define CONFIG_CQSPI_DECODER		0
+#define CONFIG_CQSPI_REF_CLK		((30/4)/2)*1000*1000
+#define CONFIG_CMD_SPI
+
+#define CONFIG_SPI_FLASH		/* SPI flash subsystem */
+#define CONFIG_SPI_FLASH_STMICRO	/* Micron/Numonyx flash */
+#define CONFIG_SPI_FLASH_WINBOND	/* WINBOND */
+#define CONFIG_CMD_SF
+#define CONFIG_DM_SPI_FLASH
+#endif
+
 #undef CONFIG_HAS_VBAR
 #endif /* __CONFIG_H */
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH 3/3] stv0991: configure device tree for cadence qspi & flash
  2015-05-28  1:42 [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
  2015-05-28  1:42 ` [U-Boot] [PATCH 1/3] stv0991: configure clock & pad muxing for qspi Vikas Manocha
  2015-05-28  1:42 ` [U-Boot] [PATCH 2/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
@ 2015-05-28  1:42 ` Vikas Manocha
  2015-06-15 20:54 ` [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas MANOCHA
  3 siblings, 0 replies; 6+ messages in thread
From: Vikas Manocha @ 2015-05-28  1:42 UTC (permalink / raw)
  To: u-boot

This patch add the device tree entry for qspi controller & spi flash
memory.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
---
 arch/arm/dts/stv0991.dts |   34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts
index b25c48b..3b1efca 100644
--- a/arch/arm/dts/stv0991.dts
+++ b/arch/arm/dts/stv0991.dts
@@ -20,4 +20,38 @@
 		reg = <0x80406000 0x1000>;
 		clock = <2700000>;
 	};
+
+	aliases {
+		spi0 = "/spi at 80203000";		/* QSPI */
+	};
+
+	qspi: spi at 80203000 {
+			compatible = "cadence,qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x80203000 0x100>,
+				<0x40000000 0x1000000>;
+			clocks = <3750000>;
+			ext-decoder = <0>; /* external decoder */
+			num-cs = <4>;
+			fifo-depth = <256>;
+			bus-num = <0>;
+			status = "okay";
+
+			flash0: n25q32 at 0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "spi-flash";
+				reg = <0>;		/* chip select */
+				spi-max-frequency = <50000000>;
+				m25p,fast-read;
+				page-size = <256>;
+				block-size = <16>; 	/* 2^16, 64KB */
+				read-delay = <4>;	/* delay value in read data capture register */
+				tshsl-ns = <50>;
+				tsd2d-ns = <50>;
+				tchsh-ns = <4>;
+				tslch-ns = <4>;
+			};
+	};
 };
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash
  2015-05-28  1:42 [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
                   ` (2 preceding siblings ...)
  2015-05-28  1:42 ` [U-Boot] [PATCH 3/3] stv0991: configure device tree for cadence qspi & flash Vikas Manocha
@ 2015-06-15 20:54 ` Vikas MANOCHA
  2015-06-16 10:49   ` Jagan Teki
  3 siblings, 1 reply; 6+ messages in thread
From: Vikas MANOCHA @ 2015-06-15 20:54 UTC (permalink / raw)
  To: u-boot

Hi Tom,

Can you please apply the stv0991 patchset.

Rgds,
Vikas

> -----Original Message-----
> From: Vikas MANOCHA
> Sent: Wednesday, May 27, 2015 6:43 PM
> To: u-boot at lists.denx.de
> Cc: Vikas MANOCHA
> Subject: [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash
> 
> This patchset enables cadence qspi controller for stv0991 soc.
> 
> Vikas Manocha (3):
>   stv0991: configure clock & pad muxing for qspi
>   stv0991: enable cadence qspi controller & spi flash
>   stv0991: configure device tree for cadence qspi & flash
> 
>  arch/arm/cpu/armv7/stv0991/clock.c                 |    4 ++-
>  arch/arm/cpu/armv7/stv0991/pinmux.c                |    5 +++
>  arch/arm/dts/stv0991.dts                           |   34 ++++++++++++++++++++
>  arch/arm/include/asm/arch-stv0991/stv0991_cgu.h    |   15 +++++++++
>  arch/arm/include/asm/arch-stv0991/stv0991_creg.h   |    9 ++++++
>  arch/arm/include/asm/arch-stv0991/stv0991_periph.h |    2 ++
>  board/st/stv0991/stv0991.c                         |    8 +++++
>  include/configs/stv0991.h                          |   18 +++++++++++
>  8 files changed, 94 insertions(+), 1 deletion(-)
> 
> --
> 1.7.9.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash
  2015-06-15 20:54 ` [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas MANOCHA
@ 2015-06-16 10:49   ` Jagan Teki
  0 siblings, 0 replies; 6+ messages in thread
From: Jagan Teki @ 2015-06-16 10:49 UTC (permalink / raw)
  To: u-boot

On 16 June 2015 at 02:24, Vikas MANOCHA <vikas.manocha@st.com> wrote:
> Hi Tom,
>
> Can you please apply the stv0991 patchset.

As these were new feature additions I will take these into spi-next.

>
>> -----Original Message-----
>> From: Vikas MANOCHA
>> Sent: Wednesday, May 27, 2015 6:43 PM
>> To: u-boot at lists.denx.de
>> Cc: Vikas MANOCHA
>> Subject: [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash
>>
>> This patchset enables cadence qspi controller for stv0991 soc.
>>
>> Vikas Manocha (3):
>>   stv0991: configure clock & pad muxing for qspi
>>   stv0991: enable cadence qspi controller & spi flash
>>   stv0991: configure device tree for cadence qspi & flash
>>
>>  arch/arm/cpu/armv7/stv0991/clock.c                 |    4 ++-
>>  arch/arm/cpu/armv7/stv0991/pinmux.c                |    5 +++
>>  arch/arm/dts/stv0991.dts                           |   34 ++++++++++++++++++++
>>  arch/arm/include/asm/arch-stv0991/stv0991_cgu.h    |   15 +++++++++
>>  arch/arm/include/asm/arch-stv0991/stv0991_creg.h   |    9 ++++++
>>  arch/arm/include/asm/arch-stv0991/stv0991_periph.h |    2 ++
>>  board/st/stv0991/stv0991.c                         |    8 +++++
>>  include/configs/stv0991.h                          |   18 +++++++++++
>>  8 files changed, 94 insertions(+), 1 deletion(-)
>>
>> --

thanks!
-- 
Jagan | openedev.

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2015-06-16 10:49 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-05-28  1:42 [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
2015-05-28  1:42 ` [U-Boot] [PATCH 1/3] stv0991: configure clock & pad muxing for qspi Vikas Manocha
2015-05-28  1:42 ` [U-Boot] [PATCH 2/3] stv0991: enable cadence qspi controller & spi flash Vikas Manocha
2015-05-28  1:42 ` [U-Boot] [PATCH 3/3] stv0991: configure device tree for cadence qspi & flash Vikas Manocha
2015-06-15 20:54 ` [U-Boot] [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash Vikas MANOCHA
2015-06-16 10:49   ` Jagan Teki

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