[PATCH v4 0/3] Add soundcard support for sc7280 based platforms.

[PATCH v4 0/3] Add soundcard support for sc7280 based platforms.

[Srinivasa Rao Mandadapu]

This patch set is to add bolero digital macros, WCD and maxim codecs nodes
for audio on sc7280 based platforms.

This patch set depends on:
	-- https://patchwork.kernel.org/project/alsa-devel/patch/1639503391-10715-10-git-send-email-quic_srivasam@quicinc.com/
	-- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=613100
	-- https://patchwork.kernel.org/project/linux-arm-msm/patch/20220202053207.14256-1-tdas@codeaurora.org/.
	-- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=601249

Changes Since V3:
    -- Move digital codec macro nodes to board specific dtsi file.
    -- Update pin controls in lpass cpu node.
    -- Update dependency patch list.
    -- Create patches on latest kernel.
Changes Since V2:
    -- Add power domains to digital codec macro nodes.
    -- Change clock node usage in lpass cpu node.
    -- Add codec mem clock to lpass cpu node.
    -- Modify the node names to be generic.
    -- Move sound and codec nodes to root node.
    -- sort dai links as per reg.
    -- Fix typo errors
Changes Since V1:
    -- Update the commit message of cpu node patch.
    -- Add gpio control property to support Euro headset in wcd938x node.
    -- Fix clock properties in lpass cpu and digital codec macro node.

Srinivasa Rao Mandadapu (3):
  arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and
    external codecs
  arm64: dts: qcom: sc7280: Add lpass cpu node
  arm64: dts: qcom: sc7280: add sound card support

 arch/arm64/boot/dts/qcom/sc7280-crd.dts  |  12 ++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 299 +++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi     |  59 ++++++
 3 files changed, 370 insertions(+)

-- 
2.7.4

[PATCH v4 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs

[Srinivasa Rao Mandadapu]

SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
codecs like WCD938x, max98360a using soundwire masters and i2s bus.
Add these nodes for sc7280 based platforms audio use case.
Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-crd.dts  |   4 +
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 178 +++++++++++++++++++++++++++++++
 2 files changed, 182 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index e2efbdd..dd23b63 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -84,6 +84,10 @@ ap_ts_pen_1v8: &i2c13 {
 	pins = "gpio51";
 };
 
+&wcd938x {
+	us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+};
+
 &tlmm {
 	tp_int_odl: tp-int-odl {
 		pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 1089fa0..07f8b1e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -38,6 +38,14 @@
 		};
 	};
 
+	max98360a: audio-codec-0 {
+		compatible = "maxim,max98360a";
+		pinctrl-names = "default";
+		pinctrl-0 = <&amp_en>;
+		sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+		#sound-dai-cells = <0>;
+	};
+
 	nvme_3v3_regulator: nvme-3v3-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "VLDO_3V3";
@@ -49,6 +57,31 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&nvme_pwren>;
 	};
+
+	wcd938x: codec {
+		compatible = "qcom,wcd9380-codec";
+		#sound-dai-cells = <1>;
+
+		reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+
+		qcom,rx-device = <&wcd_rx>;
+		qcom,tx-device = <&wcd_tx>;
+
+		vdd-rxtx-supply = <&vreg_l18b_1p8>;
+		vdd-io-supply = <&vreg_l18b_1p8>;
+		vdd-buck-supply = <&vreg_l17b_1p8>;
+		vdd-mic-bias-supply = <&vreg_bob>;
+
+		qcom,micbias1-microvolt = <1800000>;
+		qcom,micbias2-microvolt = <1800000>;
+		qcom,micbias3-microvolt = <1800000>;
+		qcom,micbias4-microvolt = <1800000>;
+
+		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
+							  500000 500000 500000>;
+		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+	};
 };
 
 &apps_rsc {
@@ -496,6 +529,148 @@
 	drive-strength = <6>;
 };
 
+&soc {
+	rxmacro: rxmacro@3200000 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&rx_swr_active>;
+		compatible = "qcom,sc7280-lpass-rx-macro";
+		reg = <0 0x3200000 0 0x1000>;
+
+		clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+			 <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+			 <&vamacro>;
+		clock-names = "mclk", "npl", "fsgen";
+
+		power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+				<&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+		power-domain-names ="macro", "dcodec";
+
+		#clock-cells = <0>;
+		clock-frequency = <9600000>;
+		clock-output-names = "mclk";
+		#sound-dai-cells = <1>;
+	};
+
+	swr0: soundwire@3210000 {
+		reg = <0 0x3210000 0 0x2000>;
+		compatible = "qcom,soundwire-v1.6.0";
+		interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&rxmacro>;
+		clock-names = "iface";
+		label = "RX";
+
+		qcom,din-ports = <0>;
+		qcom,dout-ports = <5>;
+		qcom,swrm-hctl-reg = <0x032a90a0>;
+
+		qcom,ports-word-length =	/bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
+		qcom,ports-sinterval-low =	/bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
+		qcom,ports-offset1 =		/bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
+		qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
+		qcom,ports-lane-control =	/bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
+		qcom,ports-block-pack-mode =	/bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
+		qcom,ports-hstart =		/bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
+		qcom,ports-hstop =		/bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
+		qcom,ports-block-group-count =	/bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
+
+		#sound-dai-cells = <1>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+	};
+
+	txmacro: txmacro@3220000 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&tx_swr_active>;
+		compatible = "qcom,sc7280-lpass-tx-macro";
+		reg = <0 0x3220000 0 0x1000>;
+
+		clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+			 <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+			 <&vamacro>;
+		clock-names = "mclk", "npl", "fsgen";
+
+		power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+				<&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+		power-domain-names ="macro", "dcodec";
+
+		#clock-cells = <0>;
+		clock-frequency = <9600000>;
+		clock-output-names = "mclk";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		#sound-dai-cells = <1>;
+	};
+
+	swr1: soundwire@3230000 {
+		reg = <0 0x3230000 0 0x2000>;
+		compatible = "qcom,soundwire-v1.6.0";
+
+		interrupts-extended =
+				<&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+				<&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "swr_master_irq", "swr_wake_irq";
+		clocks = <&txmacro>;
+		clock-names = "iface";
+		label = "TX";
+
+		qcom,din-ports = <3>;
+		qcom,dout-ports = <0>;
+		qcom,swrm-hctl-reg = <0x032a90a8>;
+
+		qcom,ports-sinterval-low =	/bits/ 8 <0x01 0x03 0x03>;
+		qcom,ports-offset1 =		/bits/ 8 <0x01 0x00 0x02>;
+		qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x00>;
+		qcom,ports-hstart =		/bits/ 8 <0xFF 0xFF 0xFF>;
+		qcom,ports-hstop =		/bits/ 8 <0xFF 0xFF 0xFF>;
+		qcom,ports-word-length =	/bits/ 8 <0xFF 0x0 0xFF>;
+		qcom,ports-block-pack-mode =	/bits/ 8 <0xFF 0xFF 0xFF>;
+		qcom,ports-block-group-count =	/bits/ 8 <0xFF 0xFF 0xFF>;
+		qcom,ports-lane-control =	/bits/ 8 <0x00 0x01 0x00>;
+		qcom,port-offset = <1>;
+
+		#sound-dai-cells = <1>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+	};
+
+	vamacro: codec@3370000 {
+		compatible = "qcom,sc7280-lpass-va-macro";
+		pinctrl-0 = <&dmic01_active>;
+		pinctrl-names = "default";
+
+		reg = <0 0x3370000 0 0x1000>;
+		clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
+		clock-names = "mclk";
+
+		power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+				<&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+		power-domain-names ="macro", "dcodec";
+
+		#clock-cells = <0>;
+		clock-frequency = <9600000>;
+		clock-output-names = "fsgen";
+		#sound-dai-cells = <1>;
+	};
+};
+
+&swr0 {
+	wcd_rx: wcd938x-hph-playback {
+		compatible = "sdw20217010d00";
+		reg = <0 4>;
+		#sound-dai-cells = <1>;
+		qcom,rx-port-mapping = <1 2 3 4 5>;
+	};
+};
+
+&swr1 {
+	wcd_tx: wcd938x-hph-capture {
+		compatible = "sdw20217010d00";
+		reg = <0 3>;
+		#sound-dai-cells = <1>;
+		qcom,tx-port-mapping = <1 2 3 4>;
+	};
+};
+
 &tlmm {
 	amp_en: amp-en {
 		pins = "gpio63";
@@ -588,3 +763,6 @@
 	};
 };
 
+&vamacro {
+	vdd-micb-supply = <&vreg_bob>;
+};
-- 
2.7.4

[PATCH v4 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node

[Srinivasa Rao Mandadapu]

Add lpass cpu node for audio on sc7280 based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi     | 59 ++++++++++++++++++++++++++++++++
 2 files changed, 87 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 07f8b1e..4339483 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -271,6 +271,34 @@
 	modem-init;
 };
 
+&lpass_cpu {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&sec_mi2s_data0>, <&sec_mi2s_sclk>, <&sec_mi2s_ws>;
+
+	mi2s-secondary@1 {
+		reg = <MI2S_SECONDARY>;
+		qcom,playback-sd-lines = <0>;
+	};
+
+	hdmi-primary@5 {
+		reg = <LPASS_DP_RX>;
+	};
+
+	wcd-rx@6 {
+		reg = <LPASS_CDC_DMA_RX0>;
+	};
+
+	wcd-tx@19 {
+		reg = <LPASS_CDC_DMA_TX3>;
+	};
+
+	va-tx@25 {
+		reg = <LPASS_CDC_DMA_VA_TX0>;
+	};
+};
+
 &pcie1 {
 	status = "okay";
 	perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index daae5bc..2c90ed1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -18,6 +18,7 @@
 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,lpass.h>
 #include <dt-bindings/thermal/thermal.h>
 
 / {
@@ -1750,6 +1751,64 @@
 			#clock-cells = <1>;
 		};
 
+		lpass_cpu: audio-subsystem@3260000 {
+			compatible = "qcom,sc7280-lpass-cpu";
+			reg = <0 0x3260000 0 0xC000>,
+			      <0 0x3280000 0 0x29000>,
+			      <0 0x3340000 0 0x29000>,
+			      <0 0x336C000 0 0x3000>,
+			      <0 0x3987000 0 0x68000>,
+			      <0 0x3B00000 0 0x29000>;
+			reg-names = "lpass-rxtx-cdc-dma-lpm",
+				    "lpass-rxtx-lpaif",
+				    "lpass-va-lpaif",
+				    "lpass-va-cdc-dma-lpm",
+				    "lpass-hdmiif",
+				    "lpass-lpaif";
+
+			iommus = <&apps_smmu 0x1820 0>,
+				 <&apps_smmu 0x1821 0>,
+				 <&apps_smmu 0x1832 0>;
+			status = "disabled";
+
+			power-domains =	<&rpmhpd SC7280_LCX>;
+			power-domain-names = "lcx";
+			required-opps = <&rpmhpd_opp_nom>;
+
+			clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
+				 <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
+				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
+				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
+				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
+				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
+				 <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
+				 <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
+				 <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
+			clock-names = "aon_cc_audio_hm_h",
+				      "core_cc_sysnoc_mport_core",
+				      "audio_cc_codec_mem",
+				      "audio_cc_codec_mem0",
+				      "audio_cc_codec_mem1",
+				      "audio_cc_codec_mem2",
+				      "core_cc_ext_if0_ibit",
+				      "core_cc_ext_if1_ibit",
+				      "aon_cc_va_mem0";
+
+			#sound-dai-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+
+			interrupt-names = "lpass-irq-lpaif",
+					  "lpass-irq-vaif",
+					  "lpass-irq-rxtxif",
+					  "lpass-irq-hdmi";
+		};
+
 		lpass_ag_noc: interconnect@3c40000 {
 			reg = <0 0x03c40000 0 0xf080>;
 			compatible = "qcom,sc7280-lpass-ag-noc";
-- 
2.7.4

[PATCH v4 3/3] arm64: dts: qcom: sc7280: add sound card support

[Srinivasa Rao Mandadapu]

This patch adds sound card support for MTP using WCD938x headset playback,
capture, I2S Speaker Playback and DMICs via VA macro.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-crd.dts  |  8 +++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 93 ++++++++++++++++++++++++++++++++
 2 files changed, 101 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index dd23b63..fa84fa8 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -88,6 +88,14 @@ ap_ts_pen_1v8: &i2c13 {
 	us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
 };
 
+&sound {
+	audio-routing =
+		"VA DMIC0", "MIC BIAS1",
+		"VA DMIC1", "MIC BIAS1",
+		"VA DMIC2", "MIC BIAS3",
+		"VA DMIC3", "MIC BIAS3";
+};
+
 &tlmm {
 	tp_int_odl: tp-int-odl {
 		pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 4339483..d3db2e2 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -58,6 +58,99 @@
 		pinctrl-0 = <&nvme_pwren>;
 	};
 
+	sound: sound-card {
+		compatible = "google,sc7280-herobrine";
+		model = "sc7280-wcd938x-max98360a-1mic";
+		status = "okay";
+		audio-routing =
+				"IN1_HPHL", "HPHL_OUT",
+				"IN2_HPHR", "HPHR_OUT",
+				"AMIC1", "MIC BIAS1",
+				"AMIC2", "MIC BIAS2",
+				"VA DMIC0", "MIC BIAS3",
+				"VA DMIC1", "MIC BIAS3",
+				"VA DMIC2", "MIC BIAS1",
+				"VA DMIC3", "MIC BIAS1",
+				"TX SWR_ADC0", "ADC1_OUTPUT",
+				"TX SWR_ADC1", "ADC2_OUTPUT",
+				"TX SWR_ADC2", "ADC3_OUTPUT",
+				"TX SWR_DMIC0", "DMIC1_OUTPUT",
+				"TX SWR_DMIC1", "DMIC2_OUTPUT",
+				"TX SWR_DMIC2", "DMIC3_OUTPUT",
+				"TX SWR_DMIC3", "DMIC4_OUTPUT",
+				"TX SWR_DMIC4", "DMIC5_OUTPUT",
+				"TX SWR_DMIC5", "DMIC6_OUTPUT",
+				"TX SWR_DMIC6", "DMIC7_OUTPUT",
+				"TX SWR_DMIC7", "DMIC8_OUTPUT";
+
+		qcom,msm-mbhc-hphl-swh = <1>;
+		qcom,msm-mbhc-gnd-swh = <1>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#sound-dai-cells = <0>;
+
+		dai-link@1 {
+			link-name = "Secondary MI2S Playback";
+			reg = <MI2S_SECONDARY>;
+			cpu {
+				sound-dai = <&lpass_cpu MI2S_SECONDARY>;
+			};
+
+			codec {
+				sound-dai = <&max98360a>;
+			};
+		};
+
+		dai-link@5 {
+			link-name = "DP Playback";
+			reg = <LPASS_DP_RX>;
+			cpu {
+				sound-dai = <&lpass_cpu LPASS_DP_RX>;
+			};
+
+			codec {
+				sound-dai = <&msm_dp>;
+			};
+		};
+
+		dai-link@6 {
+			link-name = "WCD Playback";
+			reg = <LPASS_CDC_DMA_RX0>;
+			cpu {
+				sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
+			};
+
+			codec {
+				sound-dai = <&wcd938x 0>, <&swr0 0>, <&rxmacro 0>;
+			};
+		};
+
+		dai-link@19 {
+			link-name = "WCD Capture";
+			reg = <LPASS_CDC_DMA_TX3>;
+			cpu {
+				sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
+			};
+
+			codec {
+				sound-dai = <&wcd938x 1>, <&swr1 0>, <&txmacro 0>;
+			};
+		};
+
+		dai-link@25 {
+			link-name = "DMIC Capture";
+			reg = <LPASS_CDC_DMA_VA_TX0>;
+			cpu {
+				sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
+			};
+
+			codec {
+				sound-dai = <&vamacro 0>;
+			};
+		};
+	};
+
 	wcd938x: codec {
 		compatible = "qcom,wcd9380-codec";
 		#sound-dai-cells = <1>;
-- 
2.7.4

Re: [PATCH v4 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs

[Doug Anderson]

Hi,

On Fri, Feb 11, 2022 at 6:57 AM Srinivasa Rao Mandadapu
<quic_srivasam@quicinc.com> wrote:
>
> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
> Add these nodes for sc7280 based platforms audio use case.
> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sc7280-crd.dts  |   4 +
>  arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 178 +++++++++++++++++++++++++++++++
>  2 files changed, 182 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> index e2efbdd..dd23b63 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> @@ -84,6 +84,10 @@ ap_ts_pen_1v8: &i2c13 {
>         pins = "gpio51";
>  };
>
> +&wcd938x {
> +       us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;

Probably need GPIO 81 pinctrl entry?


> +};
> +
>  &tlmm {
>         tp_int_odl: tp-int-odl {
>                 pins = "gpio7";
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index 1089fa0..07f8b1e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -38,6 +38,14 @@
>                 };
>         };
>
> +       max98360a: audio-codec-0 {

nit that sorting should be based on node name here, so "audio" should
sort before "gpio-keys"


> +               compatible = "maxim,max98360a";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&amp_en>;

You refer to "amp_en", but I don't see it defined anywhere except in
"herobrine" files, so I don't think this will compile for you, will
it?


> +               sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
> +               #sound-dai-cells = <0>;
> +       };
> +
>         nvme_3v3_regulator: nvme-3v3-regulator {
>                 compatible = "regulator-fixed";
>                 regulator-name = "VLDO_3V3";
> @@ -49,6 +57,31 @@
>                 pinctrl-names = "default";
>                 pinctrl-0 = <&nvme_pwren>;
>         };
> +
> +       wcd938x: codec {

This is also sorted wrong.


> +               compatible = "qcom,wcd9380-codec";
> +               #sound-dai-cells = <1>;
> +
> +               reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;

Where's the pinctrl for GPIO 83?


> +               qcom,rx-device = <&wcd_rx>;
> +               qcom,tx-device = <&wcd_tx>;
> +
> +               vdd-rxtx-supply = <&vreg_l18b_1p8>;
> +               vdd-io-supply = <&vreg_l18b_1p8>;
> +               vdd-buck-supply = <&vreg_l17b_1p8>;
> +               vdd-mic-bias-supply = <&vreg_bob>;

"vdd-mic-bias-supply" doesn't appear to be in your bindings.


> +               qcom,micbias1-microvolt = <1800000>;
> +               qcom,micbias2-microvolt = <1800000>;
> +               qcom,micbias3-microvolt = <1800000>;
> +               qcom,micbias4-microvolt = <1800000>;
> +
> +               qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
> +                                                         500000 500000 500000>;
> +               qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
> +               qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
> +       };
>  };
>
>  &apps_rsc {
> @@ -496,6 +529,148 @@
>         drive-strength = <6>;
>  };
>
> +&soc {
> +       rxmacro: rxmacro@3200000 {

From the bindings document, I believe the node name should be
"codec@3200000", not "rxmacro@..."


> +               pinctrl-names = "default";
> +               pinctrl-0 = <&rx_swr_active>;
> +               compatible = "qcom,sc7280-lpass-rx-macro";
> +               reg = <0 0x3200000 0 0x1000>;

The first two entries should be compatible and reg. Same for many places below.

> +
> +               clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> +                        <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> +                        <&vamacro>;
> +               clock-names = "mclk", "npl", "fsgen";

Bindings document shows 5 clocks. You only specify 3. You either need
the extra clocks or you need to change the binding to allow for fewer.


> +               power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
> +                               <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> +               power-domain-names ="macro", "dcodec";

Why is power-domain stuff not in the bindings? Oh, I see. It's listed
as clocks there? You need to sort that out in the bindings.


> +               #clock-cells = <0>;
> +               clock-frequency = <9600000>;
> +               clock-output-names = "mclk";
> +               #sound-dai-cells = <1>;
> +       };
> +
> +       swr0: soundwire@3210000 {
> +               reg = <0 0x3210000 0 0x2000>;
> +               compatible = "qcom,soundwire-v1.6.0";
> +               interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> +               clocks = <&rxmacro>;
> +               clock-names = "iface";
> +               label = "RX";

label is not in the bindings.


> +               qcom,din-ports = <0>;
> +               qcom,dout-ports = <5>;
> +               qcom,swrm-hctl-reg = <0x032a90a0>;

qcom,swrm-hctl-reg is not in the bindings, right? It also looks like a
magic value and probably should be broken out into something more
meaningful.


> +               qcom,ports-word-length =        /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
> +               qcom,ports-sinterval-low =      /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
> +               qcom,ports-offset1 =            /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
> +               qcom,ports-offset2 =            /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
> +               qcom,ports-lane-control =       /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
> +               qcom,ports-block-pack-mode =    /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
> +               qcom,ports-hstart =             /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
> +               qcom,ports-hstop =              /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
> +               qcom,ports-block-group-count =  /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
> +
> +               #sound-dai-cells = <1>;
> +               #address-cells = <2>;
> +               #size-cells = <0>;
> +       };
> +
> +       txmacro: txmacro@3220000 {
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&tx_swr_active>;
> +               compatible = "qcom,sc7280-lpass-tx-macro";
> +               reg = <0 0x3220000 0 0x1000>;
> +
> +               clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> +                        <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> +                        <&vamacro>;
> +               clock-names = "mclk", "npl", "fsgen";
> +
> +               power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
> +                               <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> +               power-domain-names ="macro", "dcodec";

Again you've got mismatch w/ the bindings on clocks and power-domains.


> +               #clock-cells = <0>;
> +               clock-frequency = <9600000>;
> +               clock-output-names = "mclk";
> +               #address-cells = <2>;
> +               #size-cells = <2>;

Why address and size cells of 2???


> +               #sound-dai-cells = <1>;
> +       };
> +
> +       swr1: soundwire@3230000 {
> +               reg = <0 0x3230000 0 0x2000>;
> +               compatible = "qcom,soundwire-v1.6.0";
> +
> +               interrupts-extended =
> +                               <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
> +                               <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
> +               interrupt-names = "swr_master_irq", "swr_wake_irq";
> +               clocks = <&txmacro>;
> +               clock-names = "iface";
> +               label = "TX";
> +
> +               qcom,din-ports = <3>;
> +               qcom,dout-ports = <0>;
> +               qcom,swrm-hctl-reg = <0x032a90a8>;
> +
> +               qcom,ports-sinterval-low =      /bits/ 8 <0x01 0x03 0x03>;
> +               qcom,ports-offset1 =            /bits/ 8 <0x01 0x00 0x02>;
> +               qcom,ports-offset2 =            /bits/ 8 <0x00 0x00 0x00>;
> +               qcom,ports-hstart =             /bits/ 8 <0xFF 0xFF 0xFF>;
> +               qcom,ports-hstop =              /bits/ 8 <0xFF 0xFF 0xFF>;
> +               qcom,ports-word-length =        /bits/ 8 <0xFF 0x0 0xFF>;
> +               qcom,ports-block-pack-mode =    /bits/ 8 <0xFF 0xFF 0xFF>;
> +               qcom,ports-block-group-count =  /bits/ 8 <0xFF 0xFF 0xFF>;
> +               qcom,ports-lane-control =       /bits/ 8 <0x00 0x01 0x00>;
> +               qcom,port-offset = <1>;
> +
> +               #sound-dai-cells = <1>;
> +               #address-cells = <2>;
> +               #size-cells = <0>;
> +       };

Same comments as with swr0.


> +       vamacro: codec@3370000 {
> +               compatible = "qcom,sc7280-lpass-va-macro";
> +               pinctrl-0 = <&dmic01_active>;
> +               pinctrl-names = "default";
> +
> +               reg = <0 0x3370000 0 0x1000>;
> +               clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
> +               clock-names = "mclk";
> +
> +               power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
> +                               <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> +               power-domain-names ="macro", "dcodec";

Again mismatch w/ bindings on clocks / power-domains.


> +               #clock-cells = <0>;
> +               clock-frequency = <9600000>;
> +               clock-output-names = "fsgen";
> +               #sound-dai-cells = <1>;
> +       };
> +};
> +
> +&swr0 {

This is in the same file, right? Just put it above right under the node.


> +       wcd_rx: wcd938x-hph-playback {

Please follow the bindings. Use the node name "codec" and include the
unit address, so this should be codec@0,4.


> +               compatible = "sdw20217010d00";
> +               reg = <0 4>;
> +               #sound-dai-cells = <1>;
> +               qcom,rx-port-mapping = <1 2 3 4 5>;
> +       };
> +};
> +
> +&swr1 {
> +       wcd_tx: wcd938x-hph-capture {
> +               compatible = "sdw20217010d00";
> +               reg = <0 3>;
> +               #sound-dai-cells = <1>;
> +               qcom,tx-port-mapping = <1 2 3 4>;
> +       };

Same comments as with swr0.

Re: [PATCH v4 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node

[Doug Anderson]

Hi,

On Fri, Feb 11, 2022 at 6:57 AM Srinivasa Rao Mandadapu
<quic_srivasam@quicinc.com> wrote:
>
> @@ -1750,6 +1751,64 @@
>                         #clock-cells = <1>;
>                 };
>
> +               lpass_cpu: audio-subsystem@3260000 {
> +                       compatible = "qcom,sc7280-lpass-cpu";
> +                       reg = <0 0x3260000 0 0xC000>,
> +                             <0 0x3280000 0 0x29000>,
> +                             <0 0x3340000 0 0x29000>,
> +                             <0 0x336C000 0 0x3000>,
> +                             <0 0x3987000 0 0x68000>,
> +                             <0 0x3B00000 0 0x29000>;

Lower case hex, please. ...and pad the address to 8 digits here (just
don't do it in the unit address in the node name).


> +                       reg-names = "lpass-rxtx-cdc-dma-lpm",
> +                                   "lpass-rxtx-lpaif",
> +                                   "lpass-va-lpaif",
> +                                   "lpass-va-cdc-dma-lpm",
> +                                   "lpass-hdmiif",
> +                                   "lpass-lpaif";

The order of "reg" and "reg-names" needs to match the bindings
exactly. It's almost certainly easier to change your device tree since
the bindings have already landed.

That means that "lpass-hdmiif" will be first. ...and it will also
change your node name since the first "reg" listed will now be
3987000.


> +                       iommus = <&apps_smmu 0x1820 0>,
> +                                <&apps_smmu 0x1821 0>,
> +                                <&apps_smmu 0x1832 0>;
> +                       status = "disabled";
> +
> +                       power-domains = <&rpmhpd SC7280_LCX>;
> +                       power-domain-names = "lcx";

power-domain-names is not in the bindings.


> +                       required-opps = <&rpmhpd_opp_nom>;
> +
> +                       clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
> +                                <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
> +                                <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
> +                                <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
> +                                <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
> +                       clock-names = "aon_cc_audio_hm_h",
> +                                     "core_cc_sysnoc_mport_core",
> +                                     "audio_cc_codec_mem",
> +                                     "audio_cc_codec_mem0",
> +                                     "audio_cc_codec_mem1",
> +                                     "audio_cc_codec_mem2",
> +                                     "core_cc_ext_if0_ibit",
> +                                     "core_cc_ext_if1_ibit",
> +                                     "aon_cc_va_mem0";

Clocks do not match bindings.


> +                       #sound-dai-cells = <1>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +
> +                       interrupt-names = "lpass-irq-lpaif",
> +                                         "lpass-irq-vaif",
> +                                         "lpass-irq-rxtxif",
> +                                         "lpass-irq-hdmi";

interrupt-names ordering does not match bindings.


-Doug

Re: [PATCH v4 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs

[Srinivasa Rao Mandadapu]

On 3/1/2022 6:19 AM, Doug Anderson wrote:
Thanks for Your Time Doug!!!
> Hi,
>
> On Fri, Feb 11, 2022 at 6:57 AM Srinivasa Rao Mandadapu
> <quic_srivasam@quicinc.com> wrote:
>> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
>> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
>> Add these nodes for sc7280 based platforms audio use case.
>> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280-crd.dts  |   4 +
>>   arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 178 +++++++++++++++++++++++++++++++
>>   2 files changed, 182 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> index e2efbdd..dd23b63 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> @@ -84,6 +84,10 @@ ap_ts_pen_1v8: &i2c13 {
>>          pins = "gpio51";
>>   };
>>
>> +&wcd938x {
>> +       us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
> Probably need GPIO 81 pinctrl entry?
Okay. Will add it.
>
>
>> +};
>> +
>>   &tlmm {
>>          tp_int_odl: tp-int-odl {
>>                  pins = "gpio7";
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index 1089fa0..07f8b1e 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -38,6 +38,14 @@
>>                  };
>>          };
>>
>> +       max98360a: audio-codec-0 {
> nit that sorting should be based on node name here, so "audio" should
> sort before "gpio-keys"
Okay. will sort acordingly.
>
>
>> +               compatible = "maxim,max98360a";
>> +               pinctrl-names = "default";
>> +               pinctrl-0 = <&amp_en>;
> You refer to "amp_en", but I don't see it defined anywhere except in
> "herobrine" files, so I don't think this will compile for you, will
> it?
It's in dependent patch, which is in review state.
>
>
>> +               sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
>> +               #sound-dai-cells = <0>;
>> +       };
>> +
>>          nvme_3v3_regulator: nvme-3v3-regulator {
>>                  compatible = "regulator-fixed";
>>                  regulator-name = "VLDO_3V3";
>> @@ -49,6 +57,31 @@
>>                  pinctrl-names = "default";
>>                  pinctrl-0 = <&nvme_pwren>;
>>          };
>> +
>> +       wcd938x: codec {
> This is also sorted wrong.
Okay.
>
>
>> +               compatible = "qcom,wcd9380-codec";
>> +               #sound-dai-cells = <1>;
>> +
>> +               reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
> Where's the pinctrl for GPIO 83?
Okay. Will add it.
>
>
>> +               qcom,rx-device = <&wcd_rx>;
>> +               qcom,tx-device = <&wcd_tx>;
>> +
>> +               vdd-rxtx-supply = <&vreg_l18b_1p8>;
>> +               vdd-io-supply = <&vreg_l18b_1p8>;
>> +               vdd-buck-supply = <&vreg_l17b_1p8>;
>> +               vdd-mic-bias-supply = <&vreg_bob>;
> "vdd-mic-bias-supply" doesn't appear to be in your bindings.
Okay. will add it.
>
>
>> +               qcom,micbias1-microvolt = <1800000>;
>> +               qcom,micbias2-microvolt = <1800000>;
>> +               qcom,micbias3-microvolt = <1800000>;
>> +               qcom,micbias4-microvolt = <1800000>;
>> +
>> +               qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
>> +                                                         500000 500000 500000>;
>> +               qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
>> +               qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
>> +       };
>>   };
>>
>>   &apps_rsc {
>> @@ -496,6 +529,148 @@
>>          drive-strength = <6>;
>>   };
>>
>> +&soc {
>> +       rxmacro: rxmacro@3200000 {
>  From the bindings document, I believe the node name should be
> "codec@3200000", not "rxmacro@..."
Okay.
>
>
>> +               pinctrl-names = "default";
>> +               pinctrl-0 = <&rx_swr_active>;
>> +               compatible = "qcom,sc7280-lpass-rx-macro";
>> +               reg = <0 0x3200000 0 0x1000>;
> The first two entries should be compatible and reg. Same for many places below.
Okay. will sort it.
>
>> +
>> +               clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
>> +                        <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
>> +                        <&vamacro>;
>> +               clock-names = "mclk", "npl", "fsgen";
> Bindings document shows 5 clocks. You only specify 3. You either need
> the extra clocks or you need to change the binding to allow for fewer.
Okay. will fix it.
>
>
>> +               power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
>> +                               <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
>> +               power-domain-names ="macro", "dcodec";
> Why is power-domain stuff not in the bindings? Oh, I see. It's listed
> as clocks there? You need to sort that out in the bindings.
Okay.
>
>
>> +               #clock-cells = <0>;
>> +               clock-frequency = <9600000>;
>> +               clock-output-names = "mclk";
>> +               #sound-dai-cells = <1>;
>> +       };
>> +
>> +       swr0: soundwire@3210000 {
>> +               reg = <0 0x3210000 0 0x2000>;
>> +               compatible = "qcom,soundwire-v1.6.0";
>> +               interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
>> +               clocks = <&rxmacro>;
>> +               clock-names = "iface";
>> +               label = "RX";
> label is not in the bindings.
Okay. Will remove it as it's not being used.
>
>
>> +               qcom,din-ports = <0>;
>> +               qcom,dout-ports = <5>;
>> +               qcom,swrm-hctl-reg = <0x032a90a0>;
> qcom,swrm-hctl-reg is not in the bindings, right? It also looks like a
> magic value and probably should be broken out into something more
> meaningful.
We have changed it as reset control. will update accordingly.
>
>
>> +               qcom,ports-word-length =        /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
>> +               qcom,ports-sinterval-low =      /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
>> +               qcom,ports-offset1 =            /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
>> +               qcom,ports-offset2 =            /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
>> +               qcom,ports-lane-control =       /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
>> +               qcom,ports-block-pack-mode =    /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
>> +               qcom,ports-hstart =             /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
>> +               qcom,ports-hstop =              /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
>> +               qcom,ports-block-group-count =  /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
>> +
>> +               #sound-dai-cells = <1>;
>> +               #address-cells = <2>;
>> +               #size-cells = <0>;
>> +       };
>> +
>> +       txmacro: txmacro@3220000 {
>> +               pinctrl-names = "default";
>> +               pinctrl-0 = <&tx_swr_active>;
>> +               compatible = "qcom,sc7280-lpass-tx-macro";
>> +               reg = <0 0x3220000 0 0x1000>;
>> +
>> +               clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
>> +                        <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
>> +                        <&vamacro>;
>> +               clock-names = "mclk", "npl", "fsgen";
>> +
>> +               power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
>> +                               <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
>> +               power-domain-names ="macro", "dcodec";
> Again you've got mismatch w/ the bindings on clocks and power-domains.
Okay.
>
>
>> +               #clock-cells = <0>;
>> +               clock-frequency = <9600000>;
>> +               clock-output-names = "mclk";
>> +               #address-cells = <2>;
>> +               #size-cells = <2>;
> Why address and size cells of 2???
Okay. It seems not required here. will remove it.
>
>
>> +               #sound-dai-cells = <1>;
>> +       };
>> +
>> +       swr1: soundwire@3230000 {
>> +               reg = <0 0x3230000 0 0x2000>;
>> +               compatible = "qcom,soundwire-v1.6.0";
>> +
>> +               interrupts-extended =
>> +                               <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
>> +               interrupt-names = "swr_master_irq", "swr_wake_irq";
>> +               clocks = <&txmacro>;
>> +               clock-names = "iface";
>> +               label = "TX";
>> +
>> +               qcom,din-ports = <3>;
>> +               qcom,dout-ports = <0>;
>> +               qcom,swrm-hctl-reg = <0x032a90a8>;
>> +
>> +               qcom,ports-sinterval-low =      /bits/ 8 <0x01 0x03 0x03>;
>> +               qcom,ports-offset1 =            /bits/ 8 <0x01 0x00 0x02>;
>> +               qcom,ports-offset2 =            /bits/ 8 <0x00 0x00 0x00>;
>> +               qcom,ports-hstart =             /bits/ 8 <0xFF 0xFF 0xFF>;
>> +               qcom,ports-hstop =              /bits/ 8 <0xFF 0xFF 0xFF>;
>> +               qcom,ports-word-length =        /bits/ 8 <0xFF 0x0 0xFF>;
>> +               qcom,ports-block-pack-mode =    /bits/ 8 <0xFF 0xFF 0xFF>;
>> +               qcom,ports-block-group-count =  /bits/ 8 <0xFF 0xFF 0xFF>;
>> +               qcom,ports-lane-control =       /bits/ 8 <0x00 0x01 0x00>;
>> +               qcom,port-offset = <1>;
>> +
>> +               #sound-dai-cells = <1>;
>> +               #address-cells = <2>;
>> +               #size-cells = <0>;
>> +       };
> Same comments as with swr0.
Okay.
>
>
>> +       vamacro: codec@3370000 {
>> +               compatible = "qcom,sc7280-lpass-va-macro";
>> +               pinctrl-0 = <&dmic01_active>;
>> +               pinctrl-names = "default";
>> +
>> +               reg = <0 0x3370000 0 0x1000>;
>> +               clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
>> +               clock-names = "mclk";
>> +
>> +               power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
>> +                               <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
>> +               power-domain-names ="macro", "dcodec";
> Again mismatch w/ bindings on clocks / power-domains.

Okay. will update bindings accordingly

>
>
>> +               #clock-cells = <0>;
>> +               clock-frequency = <9600000>;
>> +               clock-output-names = "fsgen";
>> +               #sound-dai-cells = <1>;
>> +       };
>> +};
>> +
>> +&swr0 {
> This is in the same file, right? Just put it above right under the node.
Okay.
>
>
>> +       wcd_rx: wcd938x-hph-playback {
> Please follow the bindings. Use the node name "codec" and include the
> unit address, so this should be codec@0,4.
Okay.
>
>
>> +               compatible = "sdw20217010d00";
>> +               reg = <0 4>;
>> +               #sound-dai-cells = <1>;
>> +               qcom,rx-port-mapping = <1 2 3 4 5>;
>> +       };
>> +};
>> +
>> +&swr1 {
>> +       wcd_tx: wcd938x-hph-capture {
>> +               compatible = "sdw20217010d00";
>> +               reg = <0 3>;
>> +               #sound-dai-cells = <1>;
>> +               qcom,tx-port-mapping = <1 2 3 4>;
>> +       };
> Same comments as with swr0.
Okay.

Re: [PATCH v4 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node

[Srinivasa Rao Mandadapu]

On 3/1/2022 6:40 AM, Doug Anderson wrote:
Thanks for your time Doug!!!
> Hi,
>
> On Fri, Feb 11, 2022 at 6:57 AM Srinivasa Rao Mandadapu
> <quic_srivasam@quicinc.com> wrote:
>> @@ -1750,6 +1751,64 @@
>>                          #clock-cells = <1>;
>>                  };
>>
>> +               lpass_cpu: audio-subsystem@3260000 {
>> +                       compatible = "qcom,sc7280-lpass-cpu";
>> +                       reg = <0 0x3260000 0 0xC000>,
>> +                             <0 0x3280000 0 0x29000>,
>> +                             <0 0x3340000 0 0x29000>,
>> +                             <0 0x336C000 0 0x3000>,
>> +                             <0 0x3987000 0 0x68000>,
>> +                             <0 0x3B00000 0 0x29000>;
> Lower case hex, please. ...and pad the address to 8 digits here (just
> don't do it in the unit address in the node name).
Okay.
>
>
>> +                       reg-names = "lpass-rxtx-cdc-dma-lpm",
>> +                                   "lpass-rxtx-lpaif",
>> +                                   "lpass-va-lpaif",
>> +                                   "lpass-va-cdc-dma-lpm",
>> +                                   "lpass-hdmiif",
>> +                                   "lpass-lpaif";
> The order of "reg" and "reg-names" needs to match the bindings
> exactly. It's almost certainly easier to change your device tree since
> the bindings have already landed.
>
> That means that "lpass-hdmiif" will be first. ...and it will also
> change your node name since the first "reg" listed will now be
> 3987000.
Okay. will sort it accordingly.
>
>
>> +                       iommus = <&apps_smmu 0x1820 0>,
>> +                                <&apps_smmu 0x1821 0>,
>> +                                <&apps_smmu 0x1832 0>;
>> +                       status = "disabled";
>> +
>> +                       power-domains = <&rpmhpd SC7280_LCX>;
>> +                       power-domain-names = "lcx";
> power-domain-names is not in the bindings.
Okay. will update it.
>
>
>> +                       required-opps = <&rpmhpd_opp_nom>;
>> +
>> +                       clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
>> +                                <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
>> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
>> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
>> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
>> +                                <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
>> +                                <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
>> +                                <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
>> +                                <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
>> +                       clock-names = "aon_cc_audio_hm_h",
>> +                                     "core_cc_sysnoc_mport_core",
>> +                                     "audio_cc_codec_mem",
>> +                                     "audio_cc_codec_mem0",
>> +                                     "audio_cc_codec_mem1",
>> +                                     "audio_cc_codec_mem2",
>> +                                     "core_cc_ext_if0_ibit",
>> +                                     "core_cc_ext_if1_ibit",
>> +                                     "aon_cc_va_mem0";
> Clocks do not match bindings.
Okay. Will change accordingly.
>
>
>> +                       #sound-dai-cells = <1>;
>> +                       #address-cells = <1>;
>> +                       #size-cells = <0>;
>> +
>> +                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
>> +                                    <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
>> +                                    <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
>> +                                    <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> +                       interrupt-names = "lpass-irq-lpaif",
>> +                                         "lpass-irq-vaif",
>> +                                         "lpass-irq-rxtxif",
>> +                                         "lpass-irq-hdmi";
> interrupt-names ordering does not match bindings.
Okay. will sort it.
>
>
> -Doug