From: Milan Boberic <milanboberic94@gmail.com>
To: stefano.stabellini@xilinx.com
Cc: sstabellini@kernel.org, andrii_anisov@epam.com,
Dario Faggioli <dfaggioli@suse.com>,
julien.grall@arm.com, Meng Xu <xumengpanda@gmail.com>,
xen-devel@lists.xenproject.org
Subject: Re: Xen optimization
Date: Mon, 15 Oct 2018 14:27:21 +0200 [thread overview]
Message-ID: <CADJ6SV1n2YcUzz9WrPn1Dtp+AWQ_VJQPQ447Ys7+OsoTsXqb4A@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1810141301420.4859@sstabellini-ThinkPad-X260>
[-- Attachment #1: Type: text/plain, Size: 6347 bytes --]
In attachment are device-tree files I found in my project:
device-tree.bbappend - under
<path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/
xen-overlay.dtsi , system-user.dtsi and zunqmp-qemu-arm.dts - under
<path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/files
zynqmp-qemu-multiarch-arm and zynqmp-qemu-pmu - under
<path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/files/multi-arch
pcw.dtsi , pl.dtsi , system-conf.dtsi , sistem-top.dts ,
zynqmp-clk-ccf.dtsi and zynqmp.dtsi -
under<path_to_project>/uz3eg_iocc_2018_2/components/plnx_workspace/device-tree/device-tree/
In system-conf.dtsi file first line says:
/*
* CAUTION: This file is automatically generated by PetaLinux SDK.
* DO NOT modify this file
*/
and there is no sigh of timer.
If you could take a look at this and other files in attachment it
would be great.
I also tried to run bare-metal app with this changes and it worked, added:
&ttc0 {
status = "okay";
compatible = "cdns,ttc";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
in xen-overlay.dtsi file, because it's overlay it shouldn't duplicate
timer nod, right?
After build I ran:
dtc -I dtb -O dts -o system.dts system.dtb
and checked for ttc0, it seems okay except interrupt-parent is <0x4>
not <0x2> like in your example:
timer@ff110000 {
compatible = "cdns,ttc";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
xen,passthrough;
};
status was "disable" before.
system.dts is also added in attachment.
Is this the working passthrough?Because jitter is the same .
When legit, working passthrough is set correctly, jitter should be
smaller, right?
Thanks in advance!
Milan
On Mon, Oct 15, 2018 at 12:50 AM Stefano Stabellini
<stefano.stabellini@xilinx.com> wrote:
>
> On Sat, 13 Oct 2018, Milan Boberic wrote:
> > > This is definitely wrong. Can you please also post the full host device
> > > tree with your modifications that you are using for Xen and Dom0? You
> > > should have something like:
> > >
> > > timer@ff110000 {
> > > compatible = "cdns,ttc";
> > > interrupt-parent = <0x2>;
> > > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > > reg = <0x0 0xff110000 0x0 0x1000>;
> > > timer-width = <0x20>;
> > > power-domains = <0x3b>;
> > > xen,passthrough;
> > > };
> > > For each of the nodes of the devices you are assigning to the DomU.
> >
> > I put
> > &ttc0 {
> > xen,passthrough = <0x1>;
> > };
> > because when I was making bm app I was following this guide. Now I see
> > it's wrong. When I copied directly:
> > timer@ff110000 {
> > compatible = "cdns,ttc";
> > interrupt-parent = <0x2>;
> > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > reg = <0x0 0xff110000 0x0 0x1000>;
> > timer-width = <0x20>;
> > power-domains = <0x3b>;
> > xen,passthrough;
> > };
> > in to the xen-overlay.dtsi file it resulted an error during
> > device-tree build. I modified it a little bit so I can get successful
> > build, there are all device-tree files included in attachment. I'm not
> > sure how to set this passthrough properly, if you could take a look at
> > those files in attachment I'd be more then grateful.
> >
> > > It's here: https://github.com/Xilinx/xen/blob/xilinx/stable-4.9/xen/arch/arm/vgic.c#L462
> > Oh, about that. I sent you wrong branch, I was using Xen 4.10. Anyway
> > now I moved to Xen 4.11 like you suggested and applied your patch and
> > Dario's also.
> >
> > Okay, now when I want to xl create my domU (bare-metal app) I get error:
> >
> > Parsing config from timer.cfg
> > (XEN) IRQ 68 is already used by domain 0
> > libxl: error: libxl_create.c:1354:domcreate_launch_dm: Domain 1:failed
> > give domain access to irq 68: Device or resource busy
> > libxl: error: libxl_domain.c:1034:libxl__destroy_domid: Domain
> > 1:Non-existant domain
> > libxl: error: libxl_domain.c:993:domain_destroy_callback: Domain
> > 1:Unable to destroy guest
> > libxl: error: libxl_domain.c:920:domain_destroy_cb: Domain
> > 1:Destruction of domain failed
>
> That means that the "xen,passthrough" addition to the host device tree went wrong.
>
>
> > I guess my modifications of:
> > timer@ff110000 {
> > compatible = "cdns,ttc";
> > interrupt-parent = <0x2>;
> > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > reg = <0x0 0xff110000 0x0 0x1000>;
> > timer-width = <0x20>;
> > power-domains = <0x3b>;
> > xen,passthrough;
> > };
> > are not correct.
>
> Right
>
>
> > I tried to change interrupts to:
> > interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x46 0x4>;
> > because if you check here on page 310 interrupts for TTC0 are 68:70.
> > But that didn't work either I still get same error.
>
> The interrupt numbers specified in the DTS are the real interrupt minus
> 32: 68-32 = 36 = 0x24. The DTS was correct.
>
>
> > I also tried to change xen,passthrough; line with:
> > xen,passthrough = <0x1>;
> > but also without success, still the same error.
> >
> > Are you sure about this line:
> > reg = <0x0 0xff110000 0x0 0x1000>; ?
> > Or it should be like this?
> > reg = <0x0 0xff110000 0x1000>;
>
> Yes, that could be a problem. The format depends on the #address-cells
> and #size-cells parameters. You didn't send me system-conf.dtsi, so I
> don't know for sure which one of the two is right. In any case, you
> should not duplicate the timer@ff110000 node in device tree. You should
> only add "xen,passthrough;" to the existing timer@ff110000 node, which
> is probably in system-conf.dtsi. So, avoid adding a new timer node to
> xen-overlay.dtsi, and instead modify system-conf.dtsi.
>
>
> > I also included xl dmesg and dmesg in attachments (after xl create of bm app).
> >
> > Thanks in advance!
> >
> > Milan
> >
[-- Attachment #2: pl.dtsi.txt --]
[-- Type: text/plain, Size: 2357 bytes --]
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 15 10:35:07 2018
*/
/ {
amba_pl: amba_pl@0 {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
ranges ;
axi_gpio_0: gpio@80000000 {
#gpio-cells = <3>;
clock-names = "s_axi_aclk";
clocks = <&clk 71>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x0 0x80000000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x00000000>;
xlnx,dout-default-2 = <0x00000000>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xFFFFFFFF>;
xlnx,tri-default-2 = <0xFFFFFFFF>;
};
axi_gpio_1: gpio@80001000 {
#gpio-cells = <3>;
clock-names = "s_axi_aclk";
clocks = <&clk 71>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x0 0x80001000 0x0 0x1000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x1>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x00000000>;
xlnx,dout-default-2 = <0x00000000>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xFFFFFFFF>;
xlnx,tri-default-2 = <0xFFFFFFFF>;
};
axi_gpio_2: gpio@80002000 {
#gpio-cells = <3>;
clock-names = "s_axi_aclk";
clocks = <&clk 71>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x0 0x80002000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x00000000>;
xlnx,dout-default-2 = <0x00000000>;
xlnx,gpio-width = <0x3>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xFFFFFFFF>;
xlnx,tri-default-2 = <0xFFFFFFFF>;
};
psu_ctrl_ipi: PERIPHERAL@ff380000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff380000 0x0 0x80000>;
};
psu_message_buffers: PERIPHERAL@ff990000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff990000 0x0 0x10000>;
};
};
};
[-- Attachment #3: device-tree.bbappend.txt --]
[-- Type: text/plain, Size: 124 bytes --]
FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
SRC_URI += "file://system-user.dtsi"
SRC_URI += "file://xen-overlay.dtsi"
[-- Attachment #4: pcw.dtsi.txt --]
[-- Type: text/plain, Size: 2965 bytes --]
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 15 10:35:07 2018
*/
&lpd_dma_chan1 {
status = "okay";
};
&lpd_dma_chan2 {
status = "okay";
};
&lpd_dma_chan3 {
status = "okay";
};
&lpd_dma_chan4 {
status = "okay";
};
&lpd_dma_chan5 {
status = "okay";
};
&lpd_dma_chan6 {
status = "okay";
};
&lpd_dma_chan7 {
status = "okay";
};
&lpd_dma_chan8 {
status = "okay";
};
&xilinx_ams {
status = "okay";
};
&perf_monitor_ocm {
xlnx,enable-32bit-filter-id = <0x1>;
xlnx,enable-advanced = <0x1>;
xlnx,enable-event-count = <0x1>;
xlnx,enable-event-log = <0x0>;
xlnx,enable-profile = <0x0>;
xlnx,enable-trace = <0x0>;
xlnx,fifo-axis-depth = <0x20>;
xlnx,fifo-axis-tdata-width = <0x38>;
xlnx,fifo-axis-tid-width = <0x1>;
xlnx,global-count-width = <0x20>;
xlnx,have-sampled-metric-cnt = <0x1>;
xlnx,metric-count-scale = <0x1>;
xlnx,metrics-sample-count-width = <0x20>;
xlnx,num-monitor-slots = <0x1>;
xlnx,num-of-counters = <0x3>;
};
&gem3 {
phy-mode = "rgmii-id";
status = "okay";
xlnx,ptp-enet-clock = <0x0>;
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&gpio {
emio-gpio-width = <32>;
gpio-mask-high = <0x0>;
gpio-mask-low = <0x5600>;
status = "okay";
};
&gpu {
status = "okay";
};
&i2c1 {
clock-frequency = <400000>;
status = "okay";
};
&pinctrl0 {
status = "okay";
};
&qspi {
is-dual = <1>;
num-cs = <1>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
status = "okay";
};
&rtc {
status = "okay";
};
&sata {
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
status = "okay";
};
&sdhci0 {
clock-frequency = <199998000>;
status = "okay";
xlnx,mio_bank = <0x0>;
};
&sdhci1 {
clock-frequency = <199998000>;
status = "okay";
xlnx,mio_bank = <0x1>;
};
&serdes {
status = "okay";
};
&uart0 {
device_type = "serial";
port-number = <0>;
status = "okay";
u-boot,dm-pre-reloc ;
};
&uart1 {
device_type = "serial";
port-number = <1>;
status = "okay";
u-boot,dm-pre-reloc ;
};
&usb0 {
status = "okay";
xlnx,usb-reset = <0x2faf080>;
};
&dwc3_0 {
status = "okay";
};
&watchdog0 {
status = "okay";
};
&ams_ps {
status = "okay";
};
&ams_pl {
status = "okay";
};
[-- Attachment #5: system-conf.dtsi.txt --]
[-- Type: text/plain, Size: 834 bytes --]
/*
* CAUTION: This file is automatically generated by PetaLinux SDK.
* DO NOT modify this file
*/
/ {
chosen {
bootargs = "earlycon clk_ignore_unused root=/dev/ram rw";
stdout-path = "serial0:115200n8";
};
};
&gem3 {
local-mac-address = [00 0a 35 00 22 01];
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
flash0: flash@0 {
compatible = "n25q512a","micron,m25p80";
spi-tx-bus-width=<1>;
spi-rx-bus-width=<4>;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <108000000>;
partition@0x00000000 {
label = "boot";
reg = <0x00000000 0x01360000>;
};
partition@0x01360000 {
label = "bootenv";
reg = <0x01360000 0x00040000>;
};
partition@0x013a0000 {
label = "kernel";
reg = <0x013a0000 0x01700000>;
};
};
};
[-- Attachment #6: system-top.dts.txt --]
[-- Type: text/plain, Size: 566 bytes --]
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 15 10:35:07 2018
*/
/dts-v1/;
/include/ "zynqmp.dtsi"
/include/ "zynqmp-clk-ccf.dtsi"
/include/ "pl.dtsi"
/include/ "pcw.dtsi"
/ {
chosen {
bootargs = "earlycon clk_ignore_unused";
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &gem3;
i2c0 = &i2c1;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &qspi;
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x7ff00000>;
};
};
#include "system-user.dtsi"
[-- Attachment #7: system-user.dtsi.txt --]
[-- Type: text/plain, Size: 1828 bytes --]
/include/ "system-conf.dtsi"
/include/ "xen-overlay.dtsi"
/ {
};
&gem3 {
status = "okay";
local-mac-address = [00 0a 35 00 02 90];
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
phy0: phy@9 {
reg = <0x9>;
ti,rx-internal-delay = <0x5>;
ti,tx-internal-delay = <0x5>;
ti,fifo-depth = <0x1>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
i2cswitch@70 { /* U7 on UZ3EG SOM */
compatible = "nxp,pca9542";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c@0 { /* i2c mw 70 0 1 */
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* IIC_EEPROM */
eeprom@51 { /* U5 on UZ3EG IOCC and U7 on the UZ7EV EVCC*/
compatible = "at,24c08";
reg = <0x51>;
};
};
};
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
is-dual = <1>; /* Set for dual-parallel QSPI config */
num-cs = <2>;
xlnx,fb-clk = <0x1>;
flash0: flash@0 {
/* The Flash described below doesn't match our board ("micron,n25qu256a"), but is needed */
/* so the Flash MTD partitions are correctly identified in /proc/mtd */
compatible = "micron,m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Set to 108000000 Based on DC1 spec */
};
};
/* SD0 eMMC, 8-bit wide data bus */
&sdhci0 {
status = "okay";
bus-width = <8>;
max-frequency = <50000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
max-frequency = <50000000>;
no-1-8-v; /* for 1.0 silicon */
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
phy-names = "usb3-phy";
};
[-- Attachment #8: xen-overlay.dtsi.txt --]
[-- Type: text/plain, Size: 1475 bytes --]
/ {
chosen {
#address-cells = <2>;
#size-cells = <1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
};
&smmu {
status = "okay";
mmu-masters = < &gem0 0x874
&gem1 0x875
&gem2 0x876
&gem3 0x877
&dwc3_0 0x860
&dwc3_1 0x861
&qspi 0x873
&lpd_dma_chan1 0x868
&lpd_dma_chan2 0x869
&lpd_dma_chan3 0x86a
&lpd_dma_chan4 0x86b
&lpd_dma_chan5 0x86c
&lpd_dma_chan6 0x86d
&lpd_dma_chan7 0x86e
&lpd_dma_chan8 0x86f
&fpd_dma_chan1 0x14e8
&fpd_dma_chan2 0x14e9
&fpd_dma_chan3 0x14ea
&fpd_dma_chan4 0x14eb
&fpd_dma_chan5 0x14ec
&fpd_dma_chan6 0x14ed
&fpd_dma_chan7 0x14ee
&fpd_dma_chan8 0x14ef
&sdhci0 0x870
&sdhci1 0x871
&nand0 0x872>;
};
&ttc0 {
status = "okay";
compatible = "cdns,ttc";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
&uart1 {
xen,passthrough = <0x1>;
};
&gpio {
xen,passthrough = <0x1>;
};
[-- Attachment #9: zynqmp-clk-ccf.dtsi.txt --]
[-- Type: text/plain, Size: 4559 bytes --]
// SPDX-License-Identifier: GPL-2.0+
/*
* Clock specification for Xilinx ZynqMP
*
* (C) Copyright 2017, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/ {
fclk0: fclk0 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 71>;
};
fclk1: fclk1 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 72>;
};
fclk2: fclk2 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 73>;
};
fclk3: fclk3 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 74>;
};
pss_ref_clk: pss_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>;
};
video_clk: video_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
pss_alt_ref_clk: pss_alt_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
gt_crx_ref_clk: gt_crx_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <108000000>;
};
aux_ref_clk: aux_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
clk: clk {
u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,zynqmp-clk";
clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <>_crx_ref_clk>;
clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
};
dp_aclk: dp_aclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-accuracy = <100>;
};
};
&can0 {
clocks = <&clk 63>, <&clk 31>;
};
&can1 {
clocks = <&clk 64>, <&clk 31>;
};
&cpu0 {
clocks = <&clk 10>;
};
&fpd_dma_chan1 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan2 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan3 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan4 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan5 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan6 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan7 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan8 {
clocks = <&clk 19>, <&clk 31>;
};
&gpu {
clocks = <&clk 24>, <&clk 25>, <&clk 26>;
};
&lpd_dma_chan1 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan2 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan3 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan4 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan5 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan6 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan7 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan8 {
clocks = <&clk 68>, <&clk 31>;
};
&nand0 {
clocks = <&clk 60>, <&clk 31>;
};
&gem0 {
clocks = <&clk 31>, <&clk 49>, <&clk 45>, <&clk 49>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem1 {
clocks = <&clk 31>, <&clk 50>, <&clk 46>, <&clk 50>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem2 {
clocks = <&clk 31>, <&clk 51>, <&clk 47>, <&clk 51>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem3 {
clocks = <&clk 31>, <&clk 52>, <&clk 48>, <&clk 52>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gpio {
clocks = <&clk 31>;
};
&i2c0 {
clocks = <&clk 61>;
};
&i2c1 {
clocks = <&clk 62>;
};
&perf_monitor_ocm {
clocks = <&clk 31>;
};
&pcie {
clocks = <&clk 23>;
};
&qspi {
clocks = <&clk 53>, <&clk 31>;
};
&sata {
clocks = <&clk 22>;
};
&sdhci0 {
clocks = <&clk 54>, <&clk 31>;
};
&sdhci1 {
clocks = <&clk 55>, <&clk 31>;
};
&spi0 {
clocks = <&clk 58>, <&clk 31>;
};
&spi1 {
clocks = <&clk 59>, <&clk 31>;
};
&ttc0 {
clocks = <&clk 31>;
};
&ttc1 {
clocks = <&clk 31>;
};
&ttc2 {
clocks = <&clk 31>;
};
&ttc3 {
clocks = <&clk 31>;
};
&uart0 {
clocks = <&clk 56>, <&clk 31>;
};
&uart1 {
clocks = <&clk 57>, <&clk 31>;
};
&usb0 {
clocks = <&clk 32>, <&clk 34>;
};
&usb1 {
clocks = <&clk 33>, <&clk 34>;
};
&watchdog0 {
clocks = <&clk 75>;
};
&xilinx_ams {
clocks = <&clk 70>;
};
&zynqmp_dpsub {
clocks = <&dp_aclk>, <&clk 17>, <&clk 16>;
};
&xlnx_dpdma {
clocks = <&clk 20>;
};
&zynqmp_dp_snd_codec0 {
clocks = <&clk 17>;
};
[-- Attachment #10: zynqmp.dtsi.txt --]
[-- Type: text/plain, Size: 30180 bytes --]
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP
*
* (C) Copyright 2014 - 2015, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
/ {
compatible = "xlnx,zynqmp";
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
operating-points-v2 = <&cpu_opp_table>;
reg = <0x0>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <600>;
min-residency-us = <10000>;
};
};
};
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <1199999988>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp01 {
opp-hz = /bits/ 64 <599999994>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp02 {
opp-hz = /bits/ 64 <399999996>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp03 {
opp-hz = /bits/ 64 <299999997>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
};
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
power-domains {
compatible = "xlnx,zynqmp-genpd";
pd_usb0: pd-usb0 {
#power-domain-cells = <0x0>;
pd-id = <0x16>;
};
pd_usb1: pd-usb1 {
#power-domain-cells = <0x0>;
pd-id = <0x17>;
};
pd_sata: pd-sata {
#power-domain-cells = <0x0>;
pd-id = <0x1c>;
};
pd_spi0: pd-spi0 {
#power-domain-cells = <0x0>;
pd-id = <0x23>;
};
pd_spi1: pd-spi1 {
#power-domain-cells = <0x0>;
pd-id = <0x24>;
};
pd_uart0: pd-uart0 {
#power-domain-cells = <0x0>;
pd-id = <0x21>;
};
pd_uart1: pd-uart1 {
#power-domain-cells = <0x0>;
pd-id = <0x22>;
};
pd_eth0: pd-eth0 {
#power-domain-cells = <0x0>;
pd-id = <0x1d>;
};
pd_eth1: pd-eth1 {
#power-domain-cells = <0x0>;
pd-id = <0x1e>;
};
pd_eth2: pd-eth2 {
#power-domain-cells = <0x0>;
pd-id = <0x1f>;
};
pd_eth3: pd-eth3 {
#power-domain-cells = <0x0>;
pd-id = <0x20>;
};
pd_i2c0: pd-i2c0 {
#power-domain-cells = <0x0>;
pd-id = <0x25>;
};
pd_i2c1: pd-i2c1 {
#power-domain-cells = <0x0>;
pd-id = <0x26>;
};
pd_dp: pd-dp {
#power-domain-cells = <0x0>;
pd-id = <0x29>;
};
pd_gdma: pd-gdma {
#power-domain-cells = <0x0>;
pd-id = <0x2a>;
};
pd_adma: pd-adma {
#power-domain-cells = <0x0>;
pd-id = <0x2b>;
};
pd_ttc0: pd-ttc0 {
#power-domain-cells = <0x0>;
pd-id = <0x18>;
};
pd_ttc1: pd-ttc1 {
#power-domain-cells = <0x0>;
pd-id = <0x19>;
};
pd_ttc2: pd-ttc2 {
#power-domain-cells = <0x0>;
pd-id = <0x1a>;
};
pd_ttc3: pd-ttc3 {
#power-domain-cells = <0x0>;
pd-id = <0x1b>;
};
pd_sd0: pd-sd0 {
#power-domain-cells = <0x0>;
pd-id = <0x27>;
};
pd_sd1: pd-sd1 {
#power-domain-cells = <0x0>;
pd-id = <0x28>;
};
pd_nand: pd-nand {
#power-domain-cells = <0x0>;
pd-id = <0x2c>;
};
pd_qspi: pd-qspi {
#power-domain-cells = <0x0>;
pd-id = <0x2d>;
};
pd_gpio: pd-gpio {
#power-domain-cells = <0x0>;
pd-id = <0x2e>;
};
pd_can0: pd-can0 {
#power-domain-cells = <0x0>;
pd-id = <0x2f>;
};
pd_can1: pd-can1 {
#power-domain-cells = <0x0>;
pd-id = <0x30>;
};
pd_pcie: pd-pcie {
#power-domain-cells = <0x0>;
pd-id = <0x3b>;
};
pd_gpu: pd-gpu {
#power-domain-cells = <0x0>;
pd-id = <0x3a 0x14 0x15>;
};
};
/* PMU1<->APU IPI mailbox controller */
ipi_mailbox_pmu1: mailbox@ff990400 {
compatible = "xlnx,zynqmp-ipi-mailbox";
reg = <0x0 0xff9905c0 0x0 0x20>,
<0x0 0xff9905e0 0x0 0x20>,
<0x0 0xff990e80 0x0 0x20>,
<0x0 0xff990ea0 0x0 0x20>;
reg-names = "local_request_region", "local_response_region",
"remote_request_region", "remote_response_region";
#mbox-cells = <1>;
xlnx,ipi-ids = <0 4>;
interrupt-parent = <&gic>;
interrupts = <0 35 4>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
interrupts = <0 143 4>,
<0 144 4>,
<0 145 4>,
<0 146 4>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
firmware {
zynqmp_firmware: zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
method = "smc";
};
};
zynqmp_power: zynqmp-power {
compatible = "xlnx,zynqmp-power";
mboxes = <&ipi_mailbox_pmu1 0>,
<&ipi_mailbox_pmu1 1>;
mbox-names = "tx", "rx";
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
};
edac {
compatible = "arm,cortex-a53-edac";
};
fpga_full: fpga-full {
compatible = "fpga-region";
fpga-mgr = <&pcap>;
#address-cells = <2>;
#size-cells = <2>;
};
nvmem_firmware {
compatible = "xlnx,zynqmp-nvmem-fw";
#address-cells = <1>;
#size-cells = <1>;
soc_revision: soc_revision@0 {
reg = <0x0 0x4>;
};
};
pcap: pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
};
rst: reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <1>;
};
xlnx_rsa: zynqmp_rsa {
compatible = "xlnx,zynqmp-rsa";
};
xlnx_keccak_384: sha384 {
compatible = "xlnx,zynqmp-keccak-384";
};
amba_apu: amba_apu@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0 0 0xffffffff>;
gic: interrupt-controller@f9010000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
reg = <0x0 0xf9010000 0x10000>,
<0x0 0xf9020000 0x20000>,
<0x0 0xf9040000 0x20000>,
<0x0 0xf9060000 0x20000>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <1 9 0xf04>;
};
};
amba: amba {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
#address-cells = <2>;
#size-cells = <2>;
ranges;
can0: can@ff060000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff060000 0x0 0x1000>;
interrupts = <0 23 4>;
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&pd_can0>;
};
can1: can@ff070000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff070000 0x0 0x1000>;
interrupts = <0 24 4>;
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&pd_can1>;
};
cci: cci@fd6e0000 {
compatible = "arm,cci-400";
reg = <0x0 0xfd6e0000 0x0 0x9000>;
ranges = <0x0 0x0 0xfd6e0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
pmu@9000 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupt-parent = <&gic>;
interrupts = <0 123 4>,
<0 123 4>,
<0 123 4>,
<0 123 4>,
<0 123 4>;
};
};
/* GDMA */
fpd_dma_chan1: dma@fd500000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd500000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 124 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e8>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan2: dma@fd510000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd510000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 125 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e9>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan3: dma@fd520000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd520000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 126 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ea>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan4: dma@fd530000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd530000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 127 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14eb>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan5: dma@fd540000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd540000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 128 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ec>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan6: dma@fd550000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd550000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 129 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ed>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan7: dma@fd560000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd560000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 130 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ee>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan8: dma@fd570000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd570000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 131 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ef>;
power-domains = <&pd_gdma>;
};
gpu: gpu@fd4b0000 {
status = "disabled";
compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <&gic>;
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
power-domains = <&pd_gpu>;
};
/* LPDDMA default allows only secured access. inorder to enable
* These dma channels, Users should ensure that these dma
* Channels are allowed for non secure access.
*/
lpd_dma_chan1: dma@ffa80000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x868>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan2: dma@ffa90000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x869>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan3: dma@ffaa0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 79 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86a>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan4: dma@ffab0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 80 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86b>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan5: dma@ffac0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 81 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86c>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan6: dma@ffad0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 82 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86d>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan7: dma@ffae0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 83 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86e>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan8: dma@ffaf0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 84 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86f>; */
power-domains = <&pd_adma>;
};
mc: memory-controller@fd070000 {
compatible = "xlnx,zynqmp-ddrc-2.40a";
reg = <0x0 0xfd070000 0x0 0x30000>;
interrupt-parent = <&gic>;
interrupts = <0 112 4>;
};
nand0: nand@ff100000 {
compatible = "arasan,nfc-v3p10";
status = "disabled";
reg = <0x0 0xff100000 0x0 0x1000>;
clock-names = "clk_sys", "clk_flash";
interrupt-parent = <&gic>;
interrupts = <0 14 4>;
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x872>;
power-domains = <&pd_nand>;
};
gem0: ethernet@ff0b0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 57 4>, <0 57 4>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x874>;
power-domains = <&pd_eth0>;
};
gem1: ethernet@ff0c0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 59 4>, <0 59 4>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x875>;
power-domains = <&pd_eth1>;
};
gem2: ethernet@ff0d0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 61 4>, <0 61 4>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x876>;
power-domains = <&pd_eth2>;
};
gem3: ethernet@ff0e0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 63 4>, <0 63 4>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x877>;
power-domains = <&pd_eth3>;
};
gpio: gpio@ff0a0000 {
compatible = "xlnx,zynqmp-gpio-1.0";
status = "disabled";
#gpio-cells = <0x2>;
interrupt-parent = <&gic>;
interrupts = <0 16 4>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
gpio-controller;
power-domains = <&pd_gpio>;
};
i2c0: i2c@ff020000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 17 4>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_i2c0>;
};
i2c1: i2c@ff030000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 18 4>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_i2c1>;
};
ocm: memory-controller@ff960000 {
compatible = "xlnx,zynqmp-ocmc-1.0";
reg = <0x0 0xff960000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 10 4>;
};
perf_monitor_ocm: perf-monitor@ffa00000 {
compatible = "xlnx,axi-perf-monitor";
reg = <0x0 0xffa00000 0x0 0x10000>;
interrupts = <0 25 4>;
interrupt-parent = <&gic>;
xlnx,enable-profile = <0>;
xlnx,enable-trace = <0>;
xlnx,num-monitor-slots = <4>;
xlnx,enable-event-count = <1>;
xlnx,enable-event-log = <1>;
xlnx,have-sampled-metric-cnt = <1>;
xlnx,num-of-counters = <8>;
xlnx,metric-count-width = <32>;
xlnx,metrics-sample-count-width = <32>;
xlnx,global-count-width = <32>;
xlnx,metric-count-scale = <1>;
};
pcie: pcie@fd0e0000 {
compatible = "xlnx,nwl-pcie-2.11";
status = "disabled";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
msi-controller;
device_type = "pci";
interrupt-parent = <&gic>;
interrupts = <0 118 4>,
<0 117 4>,
<0 116 4>,
<0 115 4>, /* MSI_1 [63...32] */
<0 114 4>; /* MSI_0 [31...0] */
interrupt-names = "misc", "dummy", "intx",
"msi1", "msi0";
msi-parent = <&pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
<0x80 0x00000000 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
bus-range = <0x00 0xff>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
power-domains = <&pd_pcie>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
qspi: spi@ff0f0000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-qspi-1.0";
status = "disabled";
clock-names = "ref_clk", "pclk";
interrupts = <0 15 4>;
interrupt-parent = <&gic>;
num-cs = <1>;
reg = <0x0 0xff0f0000 0x0 0x1000>,
<0x0 0xc0000000 0x0 0x8000000>;
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x873>;
power-domains = <&pd_qspi>;
};
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
status = "disabled";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 26 4>, <0 27 4>;
interrupt-names = "alarm", "sec";
calibration = <0x8000>;
};
serdes: zynqmp_phy@fd400000 {
compatible = "xlnx,zynqmp-psgtr-v1.1";
status = "disabled";
reg = <0x0 0xfd400000 0x0 0x40000>,
<0x0 0xfd3d0000 0x0 0x1000>;
reg-names = "serdes", "siou";
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
resets = <&rst 16>, <&rst 59>, <&rst 60>,
<&rst 61>, <&rst 62>, <&rst 63>,
<&rst 64>, <&rst 3>, <&rst 29>,
<&rst 30>, <&rst 31>, <&rst 32>;
reset-names = "sata_rst", "usb0_crst", "usb1_crst",
"usb0_hibrst", "usb1_hibrst", "usb0_apbrst",
"usb1_apbrst", "dp_rst", "gem0_rst",
"gem1_rst", "gem2_rst", "gem3_rst";
lane0: lane0 {
#phy-cells = <4>;
};
lane1: lane1 {
#phy-cells = <4>;
};
lane2: lane2 {
#phy-cells = <4>;
};
lane3: lane3 {
#phy-cells = <4>;
};
};
sata: ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
status = "disabled";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
power-domains = <&pd_sata>;
#stream-id-cells = <4>;
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
<&smmu 0x4c2>, <&smmu 0x4c3>;
};
sdhci0: sdhci@ff160000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 48 4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x870>;
power-domains = <&pd_sd0>;
};
sdhci1: sdhci@ff170000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 49 4>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <1>;
#stream-id-cells = <1>;
iommus = <&smmu 0x871>;
power-domains = <&pd_sd1>;
};
pinctrl0: pinctrl@ff180000 {
compatible = "xlnx,zynqmp-pinctrl";
status = "disabled";
reg = <0x0 0xff180000 0x0 0x1000>;
};
smmu: smmu@fd800000 {
compatible = "arm,mmu-500";
reg = <0x0 0xfd800000 0x0 0x20000>;
#iommu-cells = <1>;
status = "disabled";
#global-interrupts = <1>;
interrupt-parent = <&gic>;
interrupts = <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
};
spi0: spi@ff040000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 19 4>;
reg = <0x0 0xff040000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_spi0>;
};
spi1: spi@ff050000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 20 4>;
reg = <0x0 0xff050000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_spi1>;
};
ttc0: timer@ff110000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc0>;
};
ttc1: timer@ff120000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc1>;
};
ttc2: timer@ff130000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc2>;
};
ttc3: timer@ff140000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc3>;
};
uart0: serial@ff000000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 21 4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&pd_uart0>;
};
uart1: serial@ff010000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 22 4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&pd_uart1>;
};
usb0: usb0@ff9d0000 {
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <&pd_usb0>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
dwc3_0: dwc3@fe200000 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
#stream-id-cells = <1>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
/* snps,enable-hibernation; */
};
};
usb1: usb1@ff9e0000 {
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <&pd_usb1>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
dwc3_1: dwc3@fe300000 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <0 70 4>, <0 74 4>, <0 76 4>;
#stream-id-cells = <1>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
};
};
watchdog0: watchdog@fd4d0000 {
compatible = "cdns,wdt-r1p2";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 113 1>;
reg = <0x0 0xfd4d0000 0x0 0x1000>;
timeout-sec = <10>;
};
xilinx_ams: ams@ffa50000 {
compatible = "xlnx,zynqmp-ams";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 56 4>;
interrupt-names = "ams-irq";
reg = <0x0 0xffa50000 0x0 0x800>;
reg-names = "ams-base";
#address-cells = <2>;
#size-cells = <2>;
#io-channel-cells = <1>;
ranges;
ams_ps: ams_ps@ffa50800 {
compatible = "xlnx,zynqmp-ams-ps";
status = "disabled";
reg = <0x0 0xffa50800 0x0 0x400>;
};
ams_pl: ams_pl@ffa50c00 {
compatible = "xlnx,zynqmp-ams-pl";
status = "disabled";
reg = <0x0 0xffa50c00 0x0 0x400>;
};
};
xlnx_dpdma: dma@fd4c0000 {
compatible = "xlnx,dpdma";
status = "disabled";
reg = <0x0 0xfd4c0000 0x0 0x1000>;
interrupts = <0 122 4>;
interrupt-parent = <&gic>;
clock-names = "axi_clk";
power-domains = <&pd_dp>;
dma-channels = <6>;
#dma-cells = <1>;
dma-video0channel {
compatible = "xlnx,video0";
};
dma-video1channel {
compatible = "xlnx,video1";
};
dma-video2channel {
compatible = "xlnx,video2";
};
dma-graphicschannel {
compatible = "xlnx,graphics";
};
dma-audio0channel {
compatible = "xlnx,audio0";
};
dma-audio1channel {
compatible = "xlnx,audio1";
};
};
zynqmp_dpsub: zynqmp-display@fd4a0000 {
compatible = "xlnx,zynqmp-dpsub-1.7";
status = "disabled";
reg = <0x0 0xfd4a0000 0x0 0x1000>,
<0x0 0xfd4aa000 0x0 0x1000>,
<0x0 0xfd4ab000 0x0 0x1000>,
<0x0 0xfd4ac000 0x0 0x1000>;
reg-names = "dp", "blend", "av_buf", "aud";
interrupts = <0 119 4>;
interrupt-parent = <&gic>;
clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
power-domains = <&pd_dp>;
vid-layer {
dma-names = "vid0", "vid1", "vid2";
dmas = <&xlnx_dpdma 0>,
<&xlnx_dpdma 1>,
<&xlnx_dpdma 2>;
};
gfx-layer {
dma-names = "gfx0";
dmas = <&xlnx_dpdma 3>;
};
/* dummy node to to indicate there's no child i2c device */
i2c-bus {
};
zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 {
compatible = "xlnx,dp-snd-codec";
clock-names = "aud_clk";
};
zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 {
compatible = "xlnx,dp-snd-pcm";
dmas = <&xlnx_dpdma 4>;
dma-names = "tx";
};
zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 {
compatible = "xlnx,dp-snd-pcm";
dmas = <&xlnx_dpdma 5>;
dma-names = "tx";
};
zynqmp_dp_snd_card0: zynqmp_dp_snd_card {
compatible = "xlnx,dp-snd-card";
xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>,
<&zynqmp_dp_snd_pcm1>;
xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>;
};
};
};
};
[-- Attachment #11: zynqmp-qemu-arm.dts.txt --]
[-- Type: text/plain, Size: 75645 bytes --]
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x1>;
model = "ZynqMP ZCU102 RevA";
compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
ddr_bank1_1: ddr_bank1_1@0x0 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x30000>;
};
ddr_bank1_2: ddr_bank1_2@0x30000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x30000 0x10000>;
linux,phandle = <0x65>;
phandle = <0x65>;
};
ddr_bank1_3: ddr_bank1_3@0x40000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x40000 0x3ffc0000>;
};
ddr_bank2: ddr_bank2@0x40000000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x40000000 0x40000000>;
};
ddr_bank3: ddr_bank3@0x800000000 {
compatible = "qemu:memory-region-spec";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x8 0x0 0x8 0x0>;
};
amba: amba@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
interrupt-map-mask = <0x0 0x0 0xffff>;
interrupt-map = <0x0 0x0 0x8 0x2 0x0 0x8 0x4 0x0 0x0 0x9 0x2 0x0 0x9 0x4 0x0 0x0 0xa 0x2 0x0 0xa 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xc 0x2 0x0 0xc 0x4 0x0 0x0 0xd 0x2 0x0 0xd 0x4 0x0 0x0 0xe 0x2 0x0 0xe 0x4 0x0 0x0 0xf 0x2 0x0 0xf 0x4 0x0 0x0 0x10 0x2 0x0 0x10 0x4 0x0 0x0 0x11 0x2 0x0 0x11 0x4 0x0 0x0 0x12 0x2 0x0 0x12 0x4 0x0 0x0 0x13 0x2 0x0 0x13 0x4 0x0 0x0 0x14 0x2 0x0 0x14 0x4 0x0 0x0 0x15 0x2 0x0 0x15 0x4 0x0 0x0 0x16 0x2 0x0 0x16 0x4 0x0 0x0 0x17 0x2 0x0 0x17 0x4 0x0 0x0 0x18 0x2 0x0 0x18 0x4 0x0 0x0 0x19 0x2 0x0 0x19 0x4 0x0 0x0 0x19 0x2 0x0 0x19 0x4 0x0 0x0 0x1a 0x2 0x0 0x1a 0x4 0x0 0x0 0x1b 0x2 0x0 0x1b 0x4 0x0 0x0 0x1c 0x2 0x0 0x1c 0x4 0x0 0x0 0x1d 0x2 0x0 0x1d 0x4 0x0 0x0 0x1e 0x2 0x0 0x1e 0x4 0x0 0x0 0x1f 0x2 0x0 0x1f 0x4 0x0 0x0 0x20 0x2 0x0 0x20 0x4 0x0 0x0 0x21 0x2 0x0 0x21 0x4 0x0 0x0 0x22 0x2 0x0 0x22 0x4 0x0 0x0 0x23 0x2 0x0 0x23 0x4 0x0 0x0 0x24 0x2 0x0 0x24 0x4 0x0 0x0 0x25 0x2 0x0 0x25 0x4 0x0 0x0 0x26 0x2 0x0 0x26 0x4 0x0 0x0 0x27 0x2 0x0 0x27 0x4 0x0 0x0 0x28 0x2 0x0 0x28 0x4 0x0 0x0 0x29 0x2 0x0 0x29 0x4 0x0 0x0 0x2a 0x2 0x0 0x2a 0x4 0x0 0x0 0x2b 0x2 0x0 0x2b 0x4 0x0 0x0 0x2c 0x2 0x0 0x2c 0x4 0x0 0x0 0x2d 0x2 0x0 0x2d 0x4 0x0 0x0 0x2e 0x2 0x0 0x2e 0x4 0x0 0x0 0x2f 0x2 0x0 0x2f 0x4 0x0 0x0 0x30 0x2 0x0 0x30 0x4 0x0 0x0 0x31 0x2 0x0 0x31 0x4 0x0 0x0 0x32 0x2 0x0 0x32 0x4 0x0 0x0 0x33 0x2 0x0 0x33 0x4 0x0 0x0 0x34 0x2 0x0 0x34 0x4 0x0 0x0 0x35 0x2 0x0 0x35 0x4 0x0 0x0 0x36 0x2 0x0 0x36 0x4 0x0 0x0 0x37 0x2 0x0 0x37 0x4 0x0 0x0 0x38 0x2 0x0 0x38 0x4 0x0 0x0 0x39 0x2 0x0 0x39 0x4 0x0 0x0 0x3a 0x2 0x0 0x3a 0x4 0x0 0x0 0x3b 0x2 0x0 0x3b 0x4 0x0 0x0 0x3c 0x2 0x0 0x3c 0x4 0x0 0x0 0x3d 0x2 0x0 0x3d 0x4 0x0 0x0 0x3e 0x2 0x0 0x3e 0x4 0x0 0x0 0x3f 0x2 0x0 0x3f 0x4 0x0 0x0 0x40 0x2 0x0 0x40 0x4 0x0 0x0 0x41 0x2 0x0 0x41 0x4 0x0 0x0 0x42 0x2 0x0 0x42 0x4 0x0 0x0 0x43 0x2 0x0 0x43 0x4 0x0 0x0 0x44 0x2 0x0 0x44 0x4 0x0 0x0 0x45 0x2 0x0 0x45 0x4 0x0 0x0 0x46 0x2 0x0 0x46 0x4 0x0 0x0 0x47 0x2 0x0 0x47 0x4 0x0 0x0 0x48 0x2 0x0 0x48 0x4 0x0 0x0 0x49 0x2 0x0 0x49 0x4 0x0 0x0 0x4a 0x2 0x0 0x4a 0x4 0x0 0x0 0x4b 0x2 0x0 0x4b 0x4 0x0 0x0 0x4c 0x2 0x0 0x4c 0x4 0x0 0x0 0x4d 0x2 0x0 0x4d 0x4 0x0 0x0 0x4e 0x2 0x0 0x4e 0x4 0x0 0x0 0x4f 0x2 0x0 0x4f 0x4 0x0 0x0 0x50 0x2 0x0 0x50 0x4 0x0 0x0 0x51 0x2 0x0 0x51 0x4 0x0 0x0 0x52 0x2 0x0 0x52 0x4 0x0 0x0 0x53 0x2 0x0 0x53 0x4 0x0 0x0 0x54 0x2 0x0 0x54 0x4 0x0 0x0 0x55 0x2 0x0 0x55 0x4 0x0 0x0 0x56 0x2 0x0 0x56 0x4 0x0 0x0 0x57 0x2 0x0 0x57 0x4 0x0 0x0 0x58 0x2 0x0 0x58 0x4 0x0 0x0 0x58 0x2 0x0 0x58 0x4 0x0 0x0 0x59 0x2 0x0 0x59 0x4 0x0 0x0 0x5a 0x2 0x0 0x5a 0x4 0x0 0x0 0x5b 0x2 0x0 0x5b 0x4 0x0 0x0 0x5c 0x2 0x0 0x5c 0x4 0x0 0x0 0x5d 0x2 0x0 0x5d 0x4 0x0 0x0 0x5e 0x2 0x0 0x5e 0x4 0x0 0x0 0x5f 0x2 0x0 0x5f 0x4 0x0 0x0 0x60 0x2 0x0 0x60 0x4 0x0 0x0 0x68 0x2 0x0 0x68 0x4 0x0 0x0 0x69 0x2 0x0 0x69 0x4 0x0 0x0 0x6a 0x2 0x0 0x6a 0x4 0x0 0x0 0x6b 0x2 0x0 0x6b 0x4 0x0 0x0 0x6c 0x2 0x0 0x6c 0x4 0x0 0x0 0x6d 0x2 0x0 0x6d 0x4 0x0 0x0 0x6e 0x2 0x0 0x6e 0x4 0x0 0x0 0x6f 0x2 0x0 0x6f 0x4 0x0 0x0 0x70 0x2 0x0 0x70 0x4 0x0 0x0 0x71 0x2 0x0 0x71 0x4 0x0 0x0 0x72 0x2 0x0 0x72 0x4 0x0 0x0 0x73 0x2 0x0 0x73 0x4 0x0 0x0 0x74 0x2 0x0 0x74 0x4 0x0 0x0 0x75 0x2 0x0 0x75 0x4 0x0 0x0 0x76 0x2 0x0 0x76 0x4 0x0 0x0 0x77 0x2 0x0 0x77 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x79 0x2 0x0 0x79 0x4 0x0 0x0 0x7a 0x2 0x0 0x7a 0x4 0x0 0x0 0x7b 0x2 0x0 0x7b 0x4 0x0 0x0 0x7b 0x2 0x0 0x7b 0x4 0x0 0x0 0x7c 0x2 0x0 0x7c 0x4 0x0 0x0 0x7d 0x2 0x0 0x7d 0x4 0x0 0x0 0x7e 0x2 0x0 0x7e 0x4 0x0 0x0 0x7f 0x2 0x0 0x7f 0x4 0x0 0x0 0x80 0x2 0x0 0x80 0x4 0x0 0x0 0x81 0x2 0x0 0x81 0x4 0x0 0x0 0x82 0x2 0x0 0x82 0x4 0x0 0x0 0x83 0x2 0x0 0x83 0x4 0x0 0x0 0x84 0x2 0x0 0x84 0x4 0x0 0x0 0x85 0x2 0x0 0x85 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x87 0x2 0x0 0x87 0x4 0x0 0x0 0x88 0x2 0x0 0x88 0x4 0x0 0x0 0x89 0x2 0x0 0x89 0x4 0x0 0x0 0x8a 0x2 0x0 0x8a 0x4 0x0 0x0 0x8b 0x2 0x0 0x8b 0x4 0x0 0x0 0x8c 0x2 0x0 0x8c 0x4 0x0 0x0 0x8d 0x2 0x0 0x8d 0x4 0x0 0x0 0x8e 0x2 0x0 0x8e 0x4 0x0 0x0 0x8f 0x2 0x0 0x8f 0x4 0x0 0x0 0x90 0x2 0x0 0x90 0x4 0x0 0x0 0x91 0x2 0x0 0x91 0x4 0x0 0x0 0x92 0x2 0x0 0x92 0x4 0x0 0x0 0x93 0x2 0x0 0x93 0x4 0x0 0x0 0x94 0x2 0x0 0x94 0x4 0x0 0x0 0x95 0x2 0x0 0x95 0x4 0x0 0x0 0x96 0x2 0x0 0x96 0x4 0x0 0x0 0x97 0x2 0x0 0x97 0x4 0x0 0x0 0x98 0x2 0x0 0x98 0x4 0x0 0x0 0x99 0x2 0x0 0x99 0x4 0x0 0x0 0x9a 0x2 0x0 0x9a 0x4 0x0 0x0 0x9b 0x2 0x0 0x9b 0x4 0x0 0x0 0x8 0x3 0x0 0x8 0x4 0x0 0x0 0x9 0x3 0x0 0x9 0x4 0x0 0x0 0xa 0x3 0x0 0xa 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xc 0x3 0x0 0xc 0x4 0x0 0x0 0xd 0x3 0x0 0xd 0x4 0x0 0x0 0xe 0x3 0x0 0xe 0x4 0x0 0x0 0xf 0x3 0x0 0xf 0x4 0x0 0x0 0x10 0x3 0x0 0x10 0x4 0x0 0x0 0x11 0x3 0x0 0x11 0x4 0x0 0x0 0x12 0x3 0x0 0x12 0x4 0x0 0x0 0x13 0x3 0x0 0x13 0x4 0x0 0x0 0x14 0x3 0x0 0x14 0x4 0x0 0x0 0x15 0x3 0x0 0x15 0x4 0x0 0x0 0x16 0x3 0x0 0x16 0x4 0x0 0x0 0x17 0x3 0x0 0x17 0x4 0x0 0x0 0x18 0x3 0x0 0x18 0x4 0x0 0x0 0x19 0x3 0x0 0x19 0x4 0x0 0x0 0x19 0x3 0x0 0x19 0x4 0x0 0x0 0x1a 0x3 0x0 0x1a 0x4 0x0 0x0 0x1b 0x3 0x0 0x1b 0x4 0x0 0x0 0x1c 0x3 0x0 0x1c 0x4 0x0 0x0 0x1d 0x3 0x0 0x1d 0x4 0x0 0x0 0x1e 0x3 0x0 0x1e 0x4 0x0 0x0 0x1f 0x3 0x0 0x1f 0x4 0x0 0x0 0x20 0x3 0x0 0x20 0x4 0x0 0x0 0x21 0x3 0x0 0x21 0x4 0x0 0x0 0x22 0x3 0x0 0x22 0x4 0x0 0x0 0x23 0x3 0x0 0x23 0x4 0x0 0x0 0x24 0x3 0x0 0x24 0x4 0x0 0x0 0x25 0x3 0x0 0x25 0x4 0x0 0x0 0x26 0x3 0x0 0x26 0x4 0x0 0x0 0x27 0x3 0x0 0x27 0x4 0x0 0x0 0x28 0x3 0x0 0x28 0x4 0x0 0x0 0x29 0x3 0x0 0x29 0x4 0x0 0x0 0x2a 0x3 0x0 0x2a 0x4 0x0 0x0 0x2b 0x3 0x0 0x2b 0x4 0x0 0x0 0x2c 0x3 0x0 0x2c 0x4 0x0 0x0 0x2d 0x3 0x0 0x2d 0x4 0x0 0x0 0x2e 0x3 0x0 0x2e 0x4 0x0 0x0 0x2f 0x3 0x0 0x2f 0x4 0x0 0x0 0x30 0x3 0x0 0x30 0x4 0x0 0x0 0x31 0x3 0x0 0x31 0x4 0x0 0x0 0x32 0x3 0x0 0x32 0x4 0x0 0x0 0x33 0x3 0x0 0x33 0x4 0x0 0x0 0x34 0x3 0x0 0x34 0x4 0x0 0x0 0x35 0x3 0x0 0x35 0x4 0x0 0x0 0x36 0x3 0x0 0x36 0x4 0x0 0x0 0x37 0x3 0x0 0x37 0x4 0x0 0x0 0x38 0x3 0x0 0x38 0x4 0x0 0x0 0x39 0x3 0x0 0x39 0x4 0x0 0x0 0x3a 0x3 0x0 0x3a 0x4 0x0 0x0 0x3b 0x3 0x0 0x3b 0x4 0x0 0x0 0x3c 0x3 0x0 0x3c 0x4 0x0 0x0 0x3d 0x3 0x0 0x3d 0x4 0x0 0x0 0x3e 0x3 0x0 0x3e 0x4 0x0 0x0 0x3f 0x3 0x0 0x3f 0x4 0x0 0x0 0x40 0x3 0x0 0x40 0x4 0x0 0x0 0x41 0x3 0x0 0x41 0x4 0x0 0x0 0x42 0x3 0x0 0x42 0x4 0x0 0x0 0x43 0x3 0x0 0x43 0x4 0x0 0x0 0x44 0x3 0x0 0x44 0x4 0x0 0x0 0x45 0x3 0x0 0x45 0x4 0x0 0x0 0x46 0x3 0x0 0x46 0x4 0x0 0x0 0x47 0x3 0x0 0x47 0x4 0x0 0x0 0x48 0x3 0x0 0x48 0x4 0x0 0x0 0x49 0x3 0x0 0x49 0x4 0x0 0x0 0x4a 0x3 0x0 0x4a 0x4 0x0 0x0 0x4b 0x3 0x0 0x4b 0x4 0x0 0x0 0x4c 0x3 0x0 0x4c 0x4 0x0 0x0 0x4d 0x3 0x0 0x4d 0x4 0x0 0x0 0x4e 0x3 0x0 0x4e 0x4 0x0 0x0 0x4f 0x3 0x0 0x4f 0x4 0x0 0x0 0x50 0x3 0x0 0x50 0x4 0x0 0x0 0x51 0x3 0x0 0x51 0x4 0x0 0x0 0x52 0x3 0x0 0x52 0x4 0x0 0x0 0x53 0x3 0x0 0x53 0x4 0x0 0x0 0x54 0x3 0x0 0x54 0x4 0x0 0x0 0x55 0x3 0x0 0x55 0x4 0x0 0x0 0x56 0x3 0x0 0x56 0x4 0x0 0x0 0x57 0x3 0x0 0x57 0x4 0x0 0x0 0x58 0x3 0x0 0x58 0x4 0x0 0x0 0x58 0x3 0x0 0x58 0x4 0x0 0x0 0x59 0x3 0x0 0x59 0x4 0x0 0x0 0x5a 0x3 0x0 0x5a 0x4 0x0 0x0 0x5b 0x3 0x0 0x5b 0x4 0x0 0x0 0x5c 0x3 0x0 0x5c 0x4 0x0 0x0 0x5d 0x3 0x0 0x5d 0x4 0x0 0x0 0x5e 0x3 0x0 0x5e 0x4 0x0 0x0 0x5f 0x3 0x0 0x5f 0x4 0x0 0x0 0x60 0x3 0x0 0x60 0x4 0x0 0x0 0x68 0x3 0x0 0x68 0x4 0x0 0x0 0x69 0x3 0x0 0x69 0x4 0x0 0x0 0x6a 0x3 0x0 0x6a 0x4 0x0 0x0 0x6b 0x3 0x0 0x6b 0x4 0x0 0x0 0x6c 0x3 0x0 0x6c 0x4 0x0 0x0 0x6d 0x3 0x0 0x6d 0x4 0x0 0x0 0x6e 0x3 0x0 0x6e 0x4 0x0 0x0 0x6f 0x3 0x0 0x6f 0x4 0x0 0x0 0x70 0x3 0x0 0x70 0x4 0x0 0x0 0x71 0x3 0x0 0x71 0x4 0x0 0x0 0x72 0x3 0x0 0x72 0x4 0x0 0x0 0x73 0x3 0x0 0x73 0x4 0x0 0x0 0x74 0x3 0x0 0x74 0x4 0x0 0x0 0x75 0x3 0x0 0x75 0x4 0x0 0x0 0x76 0x3 0x0 0x76 0x4 0x0 0x0 0x77 0x3 0x0 0x77 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x79 0x3 0x0 0x79 0x4 0x0 0x0 0x7a 0x3 0x0 0x7a 0x4 0x0 0x0 0x7b 0x3 0x0 0x7b 0x4 0x0 0x0 0x7b 0x3 0x0 0x7b 0x4 0x0 0x0 0x7c 0x3 0x0 0x7c 0x4 0x0 0x0 0x7d 0x3 0x0 0x7d 0x4 0x0 0x0 0x7e 0x3 0x0 0x7e 0x4 0x0 0x0 0x7f 0x3 0x0 0x7f 0x4 0x0 0x0 0x80 0x3 0x0 0x80 0x4 0x0 0x0 0x81 0x3 0x0 0x81 0x4 0x0 0x0 0x82 0x3 0x0 0x82 0x4 0x0 0x0 0x83 0x3 0x0 0x83 0x4 0x0 0x0 0x84 0x3 0x0 0x84 0x4 0x0 0x0 0x85 0x3 0x0 0x85 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x87 0x3 0x0 0x87 0x4 0x0 0x0 0x88 0x3 0x0 0x88 0x4 0x0 0x0 0x89 0x3 0x0 0x89 0x4 0x0 0x0 0x8a 0x3 0x0 0x8a 0x4 0x0 0x0 0x8b 0x3 0x0 0x8b 0x4 0x0 0x0 0x8c 0x3 0x0 0x8c 0x4 0x0 0x0 0x8d 0x3 0x0 0x8d 0x4 0x0 0x0 0x8e 0x3 0x0 0x8e 0x4 0x0 0x0 0x8f 0x3 0x0 0x8f 0x4 0x0 0x0 0x90 0x3 0x0 0x90 0x4 0x0 0x0 0x91 0x3 0x0 0x91 0x4 0x0 0x0 0x92 0x3 0x0 0x92 0x4 0x0 0x0 0x93 0x3 0x0 0x93 0x4 0x0 0x0 0x94 0x3 0x0 0x94 0x4 0x0 0x0 0x95 0x3 0x0 0x95 0x4 0x0 0x0 0x96 0x3 0x0 0x96 0x4 0x0 0x0 0x97 0x3 0x0 0x97 0x4 0x0 0x0 0x98 0x3 0x0 0x98 0x4 0x0 0x0 0x99 0x3 0x0 0x99 0x4 0x0 0x0 0x9a 0x3 0x0 0x9a 0x4 0x0 0x0 0x9b 0x3 0x0 0x9b 0x4>;
#address-cells = <0x2>;
#size-cells = <0x1>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
apu: apu@0xFD5C0000 {
compatible = "xlnx,apu";
#gpio-cells = <0x1>;
reg = <0x0 0xfd5c0000 0x1000>;
cpu0 = <0x4>;
cpu1 = <0x5>;
cpu2 = <0x6>;
cpu3 = <0x7>;
};
rpu_ctrl: rpu_control@0xFF9A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,rpu-control";
reg = <0x0 0xff9a0000 0x400>;
gpio-controller;
atcm1-for-rpu0 = <0x8>;
btcm1-for-rpu0 = <0x9>;
icache-for-rpu1 = <0xa>;
dcache-for-rpu1 = <0xb>;
gic-for-rpu = <0x3>;
gpios = <0xc 0x6 0xc 0x7>;
ddr-mem-for-rpu = <0xd>;
linux,phandle = <0x5d>;
phandle = <0x5d>;
};
apu_ipi: apu_ipi@0xFF300000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x23 0x4 0x0 0x0 0x0 0x3 0x0 0x23 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff300000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x0 0x0 0xf 0x0 0x0 0x10 0x0 0x0 0x11 0x0 0x0 0x12 0x0 0x0 0x13 0x0 0x0 0x14 0x0 0x0 0x15 0x0 0x0 0x16 0x0 0x0 0x17 0x0 0x0 0x18 0x0 0x0>;
gpios = <0xe 0x20 0x0 0xf 0x20 0x0 0x10 0x20 0x0 0x11 0x20 0x0 0x12 0x20 0x0 0x13 0x20 0x0 0x14 0x20 0x0 0x15 0x20 0x0 0x16 0x20 0x0 0x17 0x20 0x0 0x18 0x20 0x0>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
rpu_0_ipi: rpu_0_ipi@0xFF310000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x21 0x4 0x0 0x0 0x0 0x3 0x0 0x21 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff310000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x8 0x0 0xf 0x8 0x0 0x10 0x8 0x0 0x11 0x8 0x0 0x12 0x8 0x0 0x13 0x8 0x0 0x14 0x8 0x0 0x15 0x8 0x0 0x16 0x8 0x0 0x17 0x8 0x0 0x18 0x8 0x0>;
gpios = <0xe 0x28 0x0 0xf 0x28 0x0 0x10 0x28 0x0 0x11 0x28 0x0 0x12 0x28 0x0 0x13 0x28 0x0 0x14 0x28 0x0 0x15 0x28 0x0 0x16 0x28 0x0 0x17 0x28 0x0 0x18 0x28 0x0>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
rpu_1_ipi: rpu_1_ipi@0xFF320000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x22 0x4 0x0 0x0 0x0 0x3 0x0 0x22 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff320000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x9 0x0 0xf 0x9 0x0 0x10 0x9 0x0 0x11 0x9 0x0 0x12 0x9 0x0 0x13 0x9 0x0 0x14 0x9 0x0 0x15 0x9 0x0 0x16 0x9 0x0 0x17 0x9 0x0 0x18 0x9 0x0>;
gpios = <0xe 0x29 0x0 0xf 0x29 0x0 0x10 0x29 0x0 0x11 0x29 0x0 0x12 0x29 0x0 0x13 0x29 0x0 0x14 0x29 0x0 0x15 0x29 0x0 0x16 0x29 0x0 0x17 0x29 0x0 0x18 0x29 0x0>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
pmu_0_ipi: pmu_0_ipi@0xFF330000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x13 0x0>;
reg = <0x0 0xff330000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x10 0x0 0xf 0x10 0x0 0x10 0x10 0x0 0x11 0x10 0x0 0x12 0x10 0x0 0x13 0x10 0x0 0x14 0x10 0x0 0x15 0x10 0x0 0x16 0x10 0x0 0x17 0x10 0x0 0x18 0x10 0x0>;
gpios = <0xe 0x30 0x0 0xf 0x30 0x0 0x10 0x30 0x0 0x11 0x30 0x0 0x12 0x30 0x0 0x13 0x30 0x0 0x14 0x30 0x0 0x15 0x30 0x0 0x16 0x30 0x0 0x17 0x30 0x0 0x18 0x30 0x0>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
pmu_1_ipi: pmu_1_ipi@0xFF331000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x14 0x0>;
reg = <0x0 0xff331000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x11 0x0 0xf 0x11 0x0 0x10 0x11 0x0 0x11 0x11 0x0 0x12 0x11 0x0 0x13 0x11 0x0 0x14 0x11 0x0 0x15 0x11 0x0 0x16 0x11 0x0 0x17 0x11 0x0 0x18 0x11 0x0>;
gpios = <0xe 0x31 0x0 0xf 0x31 0x0 0x10 0x31 0x0 0x11 0x31 0x0 0x12 0x31 0x0 0x13 0x31 0x0 0x14 0x31 0x0 0x15 0x31 0x0 0x16 0x31 0x0 0x17 0x31 0x0 0x18 0x31 0x0>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
pmu_2_ipi: pmu_2_ipi@0xFF332000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x15 0x0>;
reg = <0x0 0xff332000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x12 0x0 0xf 0x12 0x0 0x10 0x12 0x0 0x11 0x12 0x0 0x12 0x12 0x0 0x13 0x12 0x0 0x14 0x12 0x0 0x15 0x12 0x0 0x16 0x12 0x0 0x17 0x12 0x0 0x18 0x12 0x0>;
gpios = <0xe 0x32 0x0 0xf 0x32 0x0 0x10 0x32 0x0 0x11 0x32 0x0 0x12 0x32 0x0 0x13 0x32 0x0 0x14 0x32 0x0 0x15 0x32 0x0 0x16 0x32 0x0 0x17 0x32 0x0 0x18 0x32 0x0>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
pmu_3_ipi: pmu_3_ipi@0xFF333000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x16 0x0>;
reg = <0x0 0xff333000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x13 0x0 0xf 0x13 0x0 0x10 0x13 0x0 0x11 0x13 0x0 0x12 0x13 0x0 0x13 0x13 0x0 0x14 0x13 0x0 0x15 0x13 0x0 0x16 0x13 0x0 0x17 0x13 0x0 0x18 0x13 0x0>;
gpios = <0xe 0x33 0x0 0xf 0x33 0x0 0x10 0x33 0x0 0x11 0x33 0x0 0x12 0x33 0x0 0x13 0x33 0x0 0x14 0x33 0x0 0x15 0x33 0x0 0x16 0x33 0x0 0x17 0x33 0x0 0x18 0x33 0x0>;
linux,phandle = <0x14>;
phandle = <0x14>;
};
pl_0_ipi: pl_0_ipi@0xFF340000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1d 0x4 0x0 0x0 0x0 0x3 0x0 0x1d 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff340000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x18 0x0 0xf 0x18 0x0 0x10 0x18 0x0 0x11 0x18 0x0 0x12 0x18 0x0 0x13 0x18 0x0 0x14 0x18 0x0 0x15 0x18 0x0 0x16 0x18 0x0 0x17 0x18 0x0 0x18 0x18 0x0>;
gpios = <0xe 0x34 0x0 0xf 0x34 0x0 0x10 0x34 0x0 0x11 0x34 0x0 0x12 0x34 0x0 0x13 0x34 0x0 0x14 0x34 0x0 0x15 0x34 0x0 0x16 0x34 0x0 0x17 0x34 0x0 0x18 0x34 0x0>;
linux,phandle = <0x15>;
phandle = <0x15>;
};
pl_1_ipi: pl_1_ipi@0xFF350000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1e 0x4 0x0 0x0 0x0 0x3 0x0 0x1e 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff350000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x19 0x0 0xf 0x19 0x0 0x10 0x19 0x0 0x11 0x19 0x0 0x12 0x19 0x0 0x13 0x19 0x0 0x14 0x19 0x0 0x15 0x19 0x0 0x16 0x19 0x0 0x17 0x19 0x0 0x18 0x19 0x0>;
gpios = <0xe 0x35 0x0 0xf 0x35 0x0 0x10 0x35 0x0 0x11 0x35 0x0 0x12 0x35 0x0 0x13 0x35 0x0 0x14 0x35 0x0 0x15 0x35 0x0 0x16 0x35 0x0 0x17 0x35 0x0 0x18 0x35 0x0>;
linux,phandle = <0x16>;
phandle = <0x16>;
};
pl_2_ipi: pl_2_ipi@0xFF360000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1f 0x4 0x0 0x0 0x0 0x3 0x0 0x1f 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff360000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x1a 0x0 0xf 0x1a 0x0 0x10 0x1a 0x0 0x11 0x1a 0x0 0x12 0x1a 0x0 0x13 0x1a 0x0 0x14 0x1a 0x0 0x15 0x1a 0x0 0x16 0x1a 0x0 0x17 0x1a 0x0 0x18 0x1a 0x0>;
gpios = <0xe 0x36 0x0 0xf 0x36 0x0 0x10 0x36 0x0 0x11 0x36 0x0 0x12 0x36 0x0 0x13 0x36 0x0 0x14 0x36 0x0 0x15 0x36 0x0 0x16 0x36 0x0 0x17 0x36 0x0 0x18 0x36 0x0>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
pl_3_ipi: pl_3_ipi@0xFF370000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x20 0x4 0x0 0x0 0x0 0x3 0x0 0x20 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff370000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x1b 0x0 0xf 0x1b 0x0 0x10 0x1b 0x0 0x11 0x1b 0x0 0x12 0x1b 0x0 0x13 0x1b 0x0 0x14 0x1b 0x0 0x15 0x1b 0x0 0x16 0x1b 0x0 0x17 0x1b 0x0 0x18 0x1b 0x0>;
gpios = <0xe 0x37 0x0 0xf 0x37 0x0 0x10 0x37 0x0 0x11 0x37 0x0 0x12 0x37 0x0 0x13 0x37 0x0 0x14 0x37 0x0 0x15 0x37 0x0 0x16 0x37 0x0 0x17 0x37 0x0 0x18 0x37 0x0>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
xlnx_zynqmp_csu_core: csu_core {
compatible = "xlnx,zynqmp-csu-core";
reg = <0x0 0xffca0000 0x100>;
};
lpd_slcr_0: zynqmp_lpd_slcr@0xFF410000 {
compatible = "xlnx,lpd-slcr";
reg = <0x0 0xff410000 0x9000>;
gic-for-rpu = <0x3>;
gic-for-apu = <0x2>;
};
lpd_slcr_secure: zynqmp_lpd_slcr_secure@0xFF4B0000 {
compatible = "xlnx.lpd-slcr-secure";
reg = <0x0 0xff4b0000 0x38>;
};
xppu: xppu@0 {
compatible = "xlnx,xppu";
reg-extended = <0x1a 0x0 0xff980000 0x10000 0x1b 0x0 0xff990000 0x0 0x1000 0x3 0x1b 0x0 0xff000000 0x0 0xfc0000 0x2 0x1b 0x0 0xfe000000 0x0 0x1000000 0x2 0x1b 0x0 0xc0000000 0x0 0x20000000 0x2>;
mr = <0x1a>;
interrupts = <0x58>;
};
smmu0: smmu0@0xFD800000 {
compatible = "arm,mmu-500";
reg-extended = <0x1a 0x0 0xfd800000 0x10000 0x1c 0x0 0x0 0xffffffff 0xffffffff 0x1d 0x0 0x0 0xffffffff 0xffffffff 0x1e 0x0 0x0 0xffffffff 0xffffffff 0x1f 0x0 0x0 0xffffffff 0xffffffff 0x20 0x0 0x0 0xffffffff 0xffffffff 0x21 0x0 0x0 0xffffffff 0xffffffff>;
interrupt-parent = <0x22>;
interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11>;
dma = <0x23>;
mr-0 = <0x23>;
mr-1 = <0x23>;
mr-2 = <0x23>;
mr-3 = <0x24>;
mr-4 = <0x25>;
mr-5 = <0x26>;
};
smmu_reg: smmu0@0xFD5F0000 {
compatible = "xlnx,smmu-reg";
reg = <0x0 0xfd5f0000 0x1000>;
interrupt-controller;
interrupts = <0x9b>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
cci_mem1: cci_mem1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x27>;
phandle = <0x27>;
};
cci_mem2: cci_mem2@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x28>;
phandle = <0x28>;
};
cci: cci@0xFD6E0000 {
compatible = "arm,cci-400";
gpio-controller;
#gpio-cells = <0x1>;
reg-extended = <0x1a 0x0 0xfd6e0000 0xf000 0x23 0x0 0x0 0xffffffff 0xffffffff 0x2>;
M0 = <0x1b>;
M1 = <0x27>;
M2 = <0x28>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
ocm_xmpu: ocm_xmpu@0xFFA70000 {
compatible = "xlnx,xmpu";
interrupts = <0x58>;
reg-extended = <0x1a 0x0 0xffa70000 0x1000 0x1a 0x0 0xfffc0000 0x40000>;
protected-mr = <0x29>;
mr-0 = <0x1a>;
protected-base = <0xfffc0000>;
};
ddr_xmpu0: ddr_xmpu0_@_DDR_XMPU0_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd000000 0x1000 0x2a 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2a>;
};
ddr_xmpu1: ddr_xmpu1_@_DDR_XMPU1_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd010000 0x1000 0x27 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x27>;
gpios = <0x2b 0x0>;
};
ddr_xmpu2: ddr_xmpu2_@_DDR_XMPU2_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd020000 0x1000 0x28 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x28>;
gpios = <0x2b 0x1>;
};
ddr_xmpu3: ddr_xmpu3_@_DDR_XMPU3_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd030000 0x1000 0x24 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x24>;
};
ddr_xmpu4: ddr_xmpu4_@_DDR_XMPU4_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd040000 0x1000 0x25 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x25>;
};
ddr_xmpu5: ddr_xmpu5_@_DDR_XMPU5_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd050000 0x1000 0x26 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x26>;
};
ps7_afi_0: ps7-afi@0xFD360000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd360000 0x1000>;
};
ps7_afi_1: ps7-afi@0xFD370000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd370000 0x1000>;
};
ps7_afi_2: ps7-afi@0xFD380000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd380000 0x1000>;
};
ps7_afi_3: ps7-afi@0xFD390000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd390000 0x1000>;
};
ps7_afi_4: ps7-afi@0xFD3A0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3a0000 0x1000>;
};
ps7_afi_5: ps7-afi@0xFD3B0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3b0000 0x1000>;
};
gdma0_mr: gdma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma0_mattr: gdma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e8>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
gdma0: gdma0@0xFD500000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd500000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7c>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2c>;
};
gdma1_mr: gdma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma1_mattr: gdma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e9>;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};
gdma1: gdma1@0xFD510000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd510000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7d>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2d>;
};
gdma2_mr: gdma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma2_mattr: gdma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ea>;
linux,phandle = <0x2e>;
phandle = <0x2e>;
};
gdma2: gdma2@0xFD520000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd520000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7e>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2e>;
};
gdma3_mr: gdma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma3_mattr: gdma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14eb>;
linux,phandle = <0x2f>;
phandle = <0x2f>;
};
gdma3: gdma3@0xFD530000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd530000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7f>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2f>;
};
gdma4_mr: gdma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma4_mattr: gdma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ec>;
linux,phandle = <0x30>;
phandle = <0x30>;
};
gdma4: gdma4@0xFD540000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd540000 0x1000>;
bus-width = <0x80>;
interrupts = <0x80>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x30>;
};
gdma5_mr: gdma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma5_mattr: gdma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ed>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
gdma5: gdma5@0xFD550000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd550000 0x1000>;
bus-width = <0x80>;
interrupts = <0x81>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x31>;
};
gdma6_mr: gdma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma6_mattr: gdma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ee>;
linux,phandle = <0x32>;
phandle = <0x32>;
};
gdma6: gdma6@0xFD560000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd560000 0x1000>;
bus-width = <0x80>;
interrupts = <0x82>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x32>;
};
gdma7_mr: gdma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma7_mattr: gdma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ef>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
gdma7: gdma7@0xFD570000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd570000 0x1000>;
bus-width = <0x80>;
interrupts = <0x83>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x33>;
};
crf: crf@0xFD1A0000 {
compatible = "xlnx,zynqmp_crf";
reg = <0x0 0xfd1a0000 0x110>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x53>;
phandle = <0x53>;
};
xlnx_dpdma: axidpdma@0xFD4C0000 {
compatible = "xlnx,axi-dpdma-1.0";
reg = <0x0 0xfd4c0000 0x1000>;
clocks = <0x34>;
clock-names = "axi_clk";
xlnx,axi-clock-freq = <0xbebc200>;
interrupts = <0x7a>;
dma = <0x1b>;
dma-channels = <0x6>;
#dma-cells = <0x1>;
linux,phandle = <0x36>;
phandle = <0x36>;
dma-video0channel@fe4c0000 {
compatible = "xlnx,video0";
};
dma-video1channel@fe4c0000 {
compatible = "xlnx,video1";
};
dma-video2channel@fe4c0000 {
compatible = "xlnx,video2";
};
dma-graphicschannel@fe4c0000 {
compatible = "xlnx,graphics";
};
dma-audio0channel@fe4c0000 {
compatible = "xlnx,audio0";
};
dma-audio1channel@fe4c0000 {
compatible = "xlnx,audio1";
};
};
dp_aclk: clock0 {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
clock-accuracy = <0x64>;
linux,phandle = <0x35>;
phandle = <0x35>;
};
dummy_clk: clock1 {
compatible = "dummy-clk";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
xlnx_dp_sub: dp_sub@fd4aa000 {
compatible = "xlnx,v-dp-sub-1.6";
reg = <0x0 0xfd4aa000 0x4000>;
xlnx,output-fmt = "rgb";
linux,phandle = <0x37>;
phandle = <0x37>;
};
xlnx_dp: dp@0xFD4A0000 {
compatible = "xlnx,v-dp-4.1";
reg = <0x0 0xfd4a0000 0x1000>;
interrupts = <0x77>;
clock-names = "aclk";
clocks = <0x35>;
dpdma = <0x36>;
xlnx,dp-version = "v1.2";
xlnx,max-lanes = <0x2>;
xlnx,max-link-rate = <0x278d0>;
xlnx,max-bpc = <0x10>;
xlnx,max-pclock = <0x7530>;
xlnx,enable-ycrcb;
xlnx,colormetry = "rgb";
xlnx,bpc = <0x8>;
xlnx,dp-sub = <0x37>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
xilinx_drm {
compatible = "xlnx,drm";
xlnx,encoder-slave = <0x38>;
clocks = <0x34 0x0>;
xlnx,connector-type = "DisplayPort";
xlnx,dp-sub = <0x37>;
planes {
xlnx,pixel-format = "rgb565";
plane0 {
dmas = <0x36 0x3>;
dma-names = "dma";
};
plane1 {
dmas = <0x36 0x0>;
dma-names = "dma";
};
};
};
ddrphy_0: ddr-phy@0xFD080000 {
compatible = "xlnx,zynqmp-ddr-phy";
reg = <0x0 0xfd080000 0x2000>;
};
ddrc_0: memory-controller@0xFD070000 {
compatible = "xlnx,zynqmp-ddrc";
reg = <0x0 0xfd070000 0x1000>;
};
swdt@0xFF150000 {
compatible = "xlnx,swdt";
reg = <0x0 0xff150000 0x10>;
pclk = <0xf4240>;
};
wdt@0xFD4D0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xfd4d0000 0x10>;
pclk = <0xf4240>;
};
csu_wdt@0xFFCB0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xffcb0000 0x10>;
pclk = <0xf4240>;
};
iou_slcr_0: zynqmp_iou_slcr@0xFF180000 {
compatible = "xilinx,zynqmp-iou-slcr";
reg = <0x0 0xff180000 0x1000>;
gpio-controller;
#gpio-cells = <0x2>;
mio-bank0-1.8v = <0x1>;
mio-bank1-1.8v = <0x1>;
mio-bank2-1.8v = <0x1>;
linux,phandle = <0x42>;
phandle = <0x42>;
};
ps7_can_0: ps7-can@0xFF060000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x17>;
reg = <0x0 0xff060000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
ps7_can_1: ps7-can@0xFF070000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x18>;
reg = <0x0 0xff070000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
serdes_0: serdes@0xFD400000 {
compatible = "xlnx,zynqmp-serdes";
reg = <0x0 0xfd400000 0x20000>;
};
gem0: ethernet@0xFF0B0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x39 0x39>;
dma = <0x1e>;
memattr = <0x3a>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0b0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem1: ethernet@0xFF0C0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3b 0x3b>;
dma = <0x1e>;
memattr = <0x3b>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0c0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem2: ethernet@0xFF0D0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3d 0x3d>;
dma = <0x1e>;
memattr = <0x3c>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0d0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem3: ethernet@0xFF0E0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3f 0x3f>;
dma = <0x1e>;
memattr = <0x3d>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0e0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
mdio = <0x3e>;
};
sata: ahci@0xFD0C0000 {
compatible = "generic-ahci", "sysbus-ahci";
reg = <0x0 0xfd0c0000 0x2000>;
interrupts = <0x85>;
num-ports = <0x2>;
dma = <0x1b>;
};
lpd_gpv@0xFE100000 {
compatible = "xlnx,lpd-gpv";
reg = <0x0 0xfe100000 0xc8130>;
};
usb3_0: usb3@0xFE200000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe200000 0x4000>;
interrupts = <0x4b>;
};
usb3_1: usb3@0xFE300000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe300000 0x4000>;
interrupts = <0x4c>;
};
nand: arasan_nfc@0xFF100000 {
compatible = "arasan,nfc";
reg = <0x0 0xff100000 0x1000>;
interrupts = <0xe>;
dma = <0x1b>;
has-mdma = <0x1>;
nand {
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "all";
reg = <0x0 0x100000>;
};
};
};
psu_gpio: psu_gpio@0xFF0A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,zynqmp-gpio";
gpio-controller;
interrupts = <0x10>;
reg = <0x0 0xff0a0000 0x1000>;
};
qspi_dma_0: csu_dma@0xFF0F0800 {
compatible = "zynqmp,csu-dma";
interrupts = <0xf>;
#stream-id-cells = <0x1>;
reg = <0x0 0xff0f0800 0x800>;
dma = <0x1e>;
memattr = <0x3f>;
is-dst = <0x1>;
linux,phandle = <0x40>;
phandle = <0x40>;
};
ps7_qspi_0: ps7-qspi@0xFF0F0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
#bus-cells = <0x1>;
clock-names = "ref_clk", "pclk";
compatible = "xlnx,usmp-gqspi", "cdns,spi-r1p6";
stream-connected-dma = <0x40>;
clocks = <0x39 0x39>;
dma = <0x1b>;
interrupts = <0xf>;
num-ss-bits = <0x2>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
speed-hz = <0x989680>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-clk-freq-hz = <0xbebc200>;
xlnx,qspi-mode = <0x2>;
qspi_flash_lcs_lb: qspi_flash_lcs_lb@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
qspi_flash_lcs_lb@0x00000000 {
label = "qspi_flash_lcs_lb";
reg = <0x0 0x2000000>;
};
};
qspi_flash_ucs_ub: qspi_flash_ucs_ub@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x1>;
qspi_flash_ucs_ub@0x00000000 {
label = "qspi_flash_ucs_ub";
reg = <0x0 0x2000000>;
};
};
};
sd_clk: sd_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x41>;
phandle = <0x41>;
};
ps7_sd_0: ps7-sdio@0xFF160000 {
clock-names = "ref_clk", "aper_clk";
clock-frequency = <0x17d7840>;
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x41 0x41>;
drive-index = <0x0>;
interrupts = <0x30>;
reg = <0x0 0xff160000 0x1000>;
dma = <0x1b>;
gpios = <0x42 0x0 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x0>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_sd_1: ps7-sdio@0xFF170000 {
clock-names = "ref_clk", "aper_clk";
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x39 0x39>;
drive-index = <0x1>;
interrupts = <0x31>;
reg = <0x0 0xff170000 0x1000>;
dma = <0x1b>;
gpios = <0x42 0x1 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x1>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_spi_0: ps7-spi@0xFF040000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x39 0x39>;
compatible = "cdns,spi-r1p6";
interrupts = <0x13>;
num-ss-bits = <0x4>;
reg = <0x0 0xff040000 0x1000>;
spi0_flash0: spi0_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi0_flash0@0x00000000 {
label = "spi0_flash0";
reg = <0x0 0x100000>;
};
};
spi0_flash1: spi0_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi0_flash1@0x00000000 {
label = "spi0_flash1";
reg = <0x0 0x100000>;
};
};
spi0_flash2: spi0_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi0_flash2@0x00000000 {
label = "spi0_flash2";
reg = <0x0 0x100000>;
};
};
spi0_flash3: spi0_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi0_flash3@0x00000000 {
label = "spi0_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_spi_1: ps7-spi@0xFF050000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x39 0x39>;
compatible = "cdns,spi-r1p6";
interrupts = <0x14>;
num-ss-bits = <0x4>;
reg = <0x0 0xff050000 0x1000>;
spi1_flash0: spi1_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi1_flash0@0x00000000 {
label = "spi1_flash0";
reg = <0x0 0x100000>;
};
};
spi1_flash1: spi1_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi1_flash1@0x00000000 {
label = "spi1_flash1";
reg = <0x0 0x100000>;
};
};
spi1_flash2: spi1_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi1_flash2@0x00000000 {
label = "spi1_flash2";
reg = <0x0 0x100000>;
};
};
spi1_flash3: spi1_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi1_flash3@0x00000000 {
label = "spi1_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_ttc_0: ps7-ttc@0xFF110000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x24 0x25 0x26>;
reg = <0x0 0xff110000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_1: ps7-ttc@0xFF120000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x27 0x28 0x29>;
reg = <0x0 0xff120000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_2: ps7-ttc@0xFF130000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2a 0x2b 0x2c>;
reg = <0x0 0xff130000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_3: ps7-ttc@0xFF140000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2d 0x2e 0x2f>;
reg = <0x0 0xff140000 0x1000>;
timer-width = <0x20>;
};
uart_clk: uart_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x43>;
phandle = <0x43>;
};
ps7_uart_0: serial@0xFF000000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x15>;
port-number = <0x1>;
reg = <0x0 0xff000000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x43 0x43>;
ttrig-polarity = <0x1>;
};
ps7_uart_1: serial@0xFF010000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x16>;
port-number = <0x0>;
reg = <0x0 0xff010000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x43 0x43>;
ttrig-polarity = <0x1>;
status = "disabled";
};
ocm_ctrl0: ocm_ctrl@0xFF960000 {
compatible = "xlnx,zynqmp-ocmc";
memsize = <0x40000>;
reg = <0x0 0xff960000 0x1000>;
};
adma0_mr: adma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma0_mattr: adma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x868>;
linux,phandle = <0x44>;
phandle = <0x44>;
};
adma0: adma0@0xFFA80000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa80000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4d>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x44>;
};
adma1_mr: adma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma1_mattr: adma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x869>;
linux,phandle = <0x45>;
phandle = <0x45>;
};
adma1: adma1@0xFFA90000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa90000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4e>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x45>;
};
adma2_mr: adma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma2_mattr: adma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86a>;
linux,phandle = <0x46>;
phandle = <0x46>;
};
adma2: adma2@0xFFAA0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaa0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4f>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x46>;
};
adma3_mr: adma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma3_mattr: adma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86b>;
linux,phandle = <0x47>;
phandle = <0x47>;
};
adma3: adma3@0xFFAB0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffab0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x50>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x47>;
};
adma4_mr: adma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma4_mattr: adma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86c>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
adma4: adma4@0xFFAC0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffac0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x51>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x48>;
};
adma5_mr: adma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma5_mattr: adma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86d>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
adma5: adma5@0xFFAD0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffad0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x52>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x49>;
};
adma6_mr: adma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma6_mattr: adma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86e>;
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
adma6: adma6@0xFFAE0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffae0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x53>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x4a>;
};
adma7_mr: adma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma7_mattr: adma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86f>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
adma7: adma7@0xFFAF0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaf0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x54>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x4b>;
};
crl: crl@0xFF5E0000 {
compatible = "xlnx,zynqmp-crl";
reg = <0x0 0xff5e0000 0x1000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x3>;
gpios = <0xc 0x1a>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
zynqmp_anms: zynqmp_anms@0xFFA50000 {
compatible = "xlnx,zynqmp_ams";
reg = <0x0 0xffa50000 0x68>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_ps: zynqmp_sysmon_ps@0xFFA50800 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50800 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_pl: zynqmp_sysmon_pl@0xFFA50C00 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50c00 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_rtc: zynqmp_rtc@0xFFA60000 {
compatible = "xlnx-zynmp.rtc";
reg = <0x0 0xffa60000 0x100>;
};
dummy_gpio: dummy_gpio@0 {
gpio-controller;
#gpio-cells = <0x1>;
};
pmu_global: pmu_global@0xFFD80000 {
compatible = "xlnx,pmu_global";
reg = <0x0 0xffd80000 0x40000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x1a>;
ignore-pwr-req = <0x1>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
cxtsgen: cxtsgen@0xFF250000 {
compatible = "arm.generic-timer";
reg = <0x0 0xff260000 0x1000>;
};
ps_reset@0 {
compatible = "qemu,reset-device";
gpios = <0x4c 0x2 0xc 0x3>;
};
pcie_attrib: pcie_attrib@0xFD480000 {
compatible = "xlnx.nwl-pcie-attrib";
reg = <0x0 0xfd480000 0x1000>;
interrupts = <0x76>;
};
pcie_main: pcie_main@0xFD0E0000 {
compatible = "xlnx.nwl-pcie-main";
reg-extended = <0x1a 0x0 0xfd0e0000 0x1000 0x4d 0x0 0xfd480000 0x0 0x1000 0x2 0x1a 0x80 0x0 0x10000000 0x4e 0x0 0x0 0xffffffff 0xffffffff 0x0>;
interrupts = <0x74 0x72 0x73>;
dma = <0x4d>;
memattr = <0x4f>;
};
zynqmp_boot: zynqmp_boot@0 {
compatible = "xlnx,zynqmp-boot";
dma = <0x1a>;
};
rpu0_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x50>;
reg = <0x0 0xffe00000 0x60000>;
};
rpu1_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x51>;
reg = <0x0 0xffe90000 0x50000>;
};
i2c1: i2c1@0xFF030000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clocks = <0x39>;
compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10";
interrupts = <0x12>;
reg = <0x0 0xff030000 0x1000>;
i2cswitch@74 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "nxp,pca9548";
reg = <0x74>;
i2c@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
eeprom@54 {
compatible = "at,24c08";
reg = <0x54>;
};
eeprom@55 {
compatible = "at,24c08";
reg = <0x55>;
};
eeprom@56 {
compatible = "at,24c08";
reg = <0x56>;
};
eeprom@57 {
compatible = "at,24c08";
reg = <0x57>;
};
};
i2c@2 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x2>;
si570_1: clock-generator@5d {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
i2c@3 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x3>;
si570_2: clock-generator@5e {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
};
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu0: apu_cpu@0 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x0>;
enable-method = "psci";
reg = <0x0>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x0>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #0";
memattr_s = <0x54>;
memattr_ns = <0x55>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
cpu1: apu_cpu@1 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x1>;
enable-method = "psci";
reg = <0x1>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x1>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #1";
memattr_s = <0x56>;
memattr_ns = <0x57>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
cpu2: apu_cpu@2 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x2>;
enable-method = "psci";
reg = <0x2>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x2>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #2";
memattr_s = <0x58>;
memattr_ns = <0x59>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
cpu3: apu_cpu@3 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x3>;
enable-method = "psci";
reg = <0x3>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x3>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #3";
memattr_s = <0x5a>;
memattr_ns = <0x5b>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
rpu_cpu0: rpu_cpu@0 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x100>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x0>;
mr = <0x5c>;
memory = <0x5c>;
gpios = <0x4c 0x0 0x5d 0x0 0x5d 0x5>;
gpio-names = "reset", "ncpuhalt", "vinithi";
gdb-id = "Cortex-R5 #0";
memattr_ns = <0x5e>;
linux,phandle = <0x63>;
phandle = <0x63>;
};
rpu_cpu1: rpu_cpu@1 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x101>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x1>;
mr = <0x5f>;
memory = <0x5f>;
gpios = <0x4c 0x1 0x5d 0x2 0x5d 0x1 0x5d 0x6>;
gpio-names = "reset", "halt", "ncpuhalt", "vinithi";
gdb-id = "Cortex-R5 #1";
memattr_ns = <0x60>;
linux,phandle = <0x64>;
phandle = <0x64>;
};
};
aliases {
serial0 = "/amba@0/serial@0xFF000000";
serial1 = "/amba@0/serial@0xFF010000";
ethernet0 = "/amba@0/ethernet@0xFF0E0000";
main_bus_for_apu {
compatible = "qemu:memory-region";
container = <0x52>;
alias = <0x23>;
priority = <0xffffffff>;
};
main_bus_for_pl {
compatible = "qemu:memory-region";
container = <0x1a>;
alias = <0x61>;
priority = <0xffffffff>;
};
};
amba_apu: amba_apu@0 {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x52>;
phandle = <0x52>;
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x2>;
interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
clock-frequency = <0x5f5e100>;
};
dummy: dymmy@0 {
interrupt-controller;
#interrupt-cells = <0x1>;
linux,phandle = <0x62>;
phandle = <0x62>;
};
};
amba_apu_gic: amba_apu_gic@0 {
#address-cells = <0x2>;
#priority-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
container = <0x1a>;
priority = <0xffffffff>;
gic: interrupt-controller@0xFD3FF000 {
#address-cells = <0x0>;
#size-cells = <0x0>;
#interrupt-cells = <0x3>;
#gpio-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9010000 0x1000 0x0 0x0 0xf9020000 0x20000 0x0 0x0 0xf9040000 0x20000 0x0 0x0 0xf9060000 0x20000 0x0>;
interrupt-controller;
num-irq = <0xc0>;
interrupts-extended = <0x4 0x0 0x5 0x0 0x6 0x0 0x7 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x2 0x5 0x2 0x6 0x2 0x7 0x2 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x1 0x5 0x1 0x6 0x1 0x7 0x1 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x3 0x5 0x3 0x6 0x3 0x7 0x3 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x2 0x1 0x9 0x104 0x2 0x1 0x9 0x204 0x2 0x1 0x9 0x404 0x2 0x1 0x9 0x804>;
num-cpu = <0x4>;
revision = <0x2>;
map-stride = <0x10000>;
int-id = <0x202143b>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
zynqmp-gic-cpu-alias@0xf9021000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9021000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9022000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9022000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9023000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9023000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9024000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9024000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9025000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9025000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9026000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9026000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9027000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9027000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9028000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9028000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9029000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9029000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902a000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902a000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902b000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902b000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902c000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902c000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902d000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902d000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902e000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902e000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902f000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902f000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9061000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9061000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9062000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9062000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9063000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9063000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9064000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9064000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9065000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9065000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9066000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9066000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9067000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9067000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9068000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9068000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9069000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9069000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906a000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906a000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906b000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906b000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906c000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906c000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906d000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906d000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906e000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906e000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906f000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906f000 0x1000 0x1>;
};
};
amba_rpu: amba_rpu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x2a>;
phandle = <0x2a>;
rpu_gic: interrupt-controller@0xF9000000 {
#address-cells = <0x0>;
#interrupt-cells = <0x3>;
#size-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9000000 0x0 0x1000 0x0 0x0 0xf9001000 0x0 0x100 0x0>;
status = "disabled";
interrupt-controller;
num-irq = <0x100>;
num-cpu = <0x2>;
interrupts-extended = <0x63 0x0 0x64 0x0>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
ddr_memory_2_for_rpu: ddr_memory_2_for_rpu {
compatible = "qemu:memory-region";
alias = <0x65>;
reg = <0x0 0x30000 0x0 0x10000 0x0>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
main_bus_for_rpu {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
pmu_io_intc: dummy_pmu_intc@0 {
#interrupt-cells = <0x2>;
interrupt-controller;
linux,phandle = <0x19>;
phandle = <0x19>;
};
smmu_tbu0: tbu0_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
smmu_tbu1: tbu1_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
smmu_tbu2: tbu2_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
smmu_tbu3: tbu3_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
smmu_tbu4: tbu4_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x20>;
phandle = <0x20>;
};
smmu_tbu5: tbu5_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x21>;
phandle = <0x21>;
};
tbu3_master: tbu3_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x24>;
phandle = <0x24>;
main_bus_for_tbu3 {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu4_master: tbu4_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x25>;
phandle = <0x25>;
main_bus_for_tbu4 {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu5_master: tbu5_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x26>;
phandle = <0x26>;
main_bus_for_tbu5 {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
cci_slave: cci_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x23>;
phandle = <0x23>;
downstream {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
};
misc_clk: misc_clk {
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
compatible = "fixed-clock";
linux,phandle = <0x39>;
phandle = <0x39>;
};
pcie_ingress: pcie_ingress@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
linux,phandle = <0x4d>;
phandle = <0x4d>;
downstream {
compatible = "qemu:memory-region";
alias = <0x1d>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
pcie_overlay: pcie_overlay@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
priority = <0x2>;
compatible = "qemu:memory-region";
container = <0x1a>;
linux,phandle = <0x4e>;
phandle = <0x4e>;
};
ddr_alias: ddr_alias@0 {
compatible = "qemu:memory-region";
container = <0x66>;
alias = <0x1>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
qemu_sysmem: qemu_sysmem@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:system-memory";
linux,phandle = <0x66>;
phandle = <0x66>;
};
pmu_memattr: pmu_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x40>;
};
apu0_s_memattr: apu0_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x80>;
linux,phandle = <0x54>;
phandle = <0x54>;
};
apu0_ns_memattr: apu0_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x80>;
linux,phandle = <0x55>;
phandle = <0x55>;
};
apu1_s_memattr: apu1_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8d>;
linux,phandle = <0x56>;
phandle = <0x56>;
};
apu1_ns_memattr: apu1_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8d>;
linux,phandle = <0x57>;
phandle = <0x57>;
};
apu2_s_memattr: apu2_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8e>;
linux,phandle = <0x58>;
phandle = <0x58>;
};
apu2_ns_memattr: apu2_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8e>;
linux,phandle = <0x59>;
phandle = <0x59>;
};
apu3_s_memattr: apu3_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8f>;
linux,phandle = <0x5a>;
phandle = <0x5a>;
};
apu3_ns_memattr: apu3_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8f>;
linux,phandle = <0x5b>;
phandle = <0x5b>;
};
rpu0_memattr: rpu0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2e>;
linux,phandle = <0x5e>;
phandle = <0x5e>;
};
rpu1_memattr: rpu1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2f>;
linux,phandle = <0x60>;
phandle = <0x60>;
};
gem0_memattr: gem0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x874>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
gem1_memattr: gem1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x875>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
gem2_memattr: gem2_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x876>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
gem3_memattr: gem3_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x877>;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
qspi_dma_memattr: qspi_dma_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x873>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
};
pcie_ns_memattr: pcie_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x4d0>;
linux,phandle = <0x4f>;
phandle = <0x4f>;
};
protected_amba: protected_amba@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x1b>;
phandle = <0x1b>;
downstream {
compatible = "qemu:memory-region";
alias = <0x1a>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
ddr3_ram: memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x1a>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
pmu_ram: pmu_ram@ffdc0000 {
compatible = "qemu:memory-region";
container = <0x1a>;
qemu,ram = <0x1>;
reg = <0x0 0xffdc0000 0x20000>;
};
tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x10000>;
};
tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x20000 0x10000>;
};
tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x67>;
phandle = <0x67>;
};
tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x68>;
phandle = <0x68>;
};
icache_rpu0: icache_rpu0@0x40000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x40000 0x8000>;
};
dcache_rpu0: dcache_rpu0@0x50000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x50000 0x8000>;
};
icache_rpu1: icache_rpu1@0x30000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x30000 0x8000>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
dcache_rpu1: dcache_rpu1@0x40000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x40000 0x8000>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
ipibuf_ram: ipibuf@ff990000 {
compatible = "qemu:memory-region";
container = <0x1a>;
qemu,ram = <0x1>;
reg = <0x0 0xff990000 0x1000>;
};
ocm_ram: ocm_ram@0 {
compatible = "qemu:memory-region";
linux,phandle = <0x29>;
phandle = <0x29>;
};
ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x10000>;
};
ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x10000 0x10000>;
};
ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x20000 0x10000>;
};
ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x30000 0x10000>;
};
tcm_cache_rpu0: tcm_cache_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x50>;
phandle = <0x50>;
atcm1_for_rpu0: atcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x67>;
reg = <0x0 0x10000 0x0 0x10000 0x1>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
btcm1_for_rpu0: btcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x68>;
reg = <0x0 0x30000 0x0 0x10000 0x1>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
};
amba_rpu0: amba_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x5c>;
phandle = <0x5c>;
tcm_cache_rpu0 {
compatible = "qemu:memory-region";
alias = <0x50>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
rpu_bus_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x2a>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tcm_cache_rpu1: tcm_cache_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x51>;
phandle = <0x51>;
};
amba_rpu1: amba_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x5f>;
phandle = <0x5f>;
tcm_cache_rpu1 {
compatible = "qemu:memory-region";
alias = <0x51>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
rpu_bus_for_rpu1 {
compatible = "qemu:memory-region";
alias = <0x2a>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_pl: amba_pl {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x61>;
phandle = <0x61>;
};
mdio0: mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "mdio";
linux,phandle = <0x3e>;
phandle = <0x3e>;
phy0: phy@7 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0x7>;
};
phy1: phy@12 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0xc>;
};
};
};
[-- Attachment #12: zynqmp-qemu-multiarch-arm.dts.txt --]
[-- Type: text/plain, Size: 93285 bytes --]
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x1>;
model = "ZynqMP ZCU102 RevA";
compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
ddr_bank1_1: ddr_bank1_1@0x0 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x30000>;
};
ddr_bank1_2: ddr_bank1_2@0x30000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
linux,phandle = <0x80>;
phandle = <0x80>;
};
ddr_bank1_3: ddr_bank1_3@0x40000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x3ffc0000>;
};
ddr_bank2: ddr_bank2@0x40000000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x40000000 0x40000000>;
};
ddr_bank3: ddr_bank3@0x800000000 {
compatible = "qemu:memory-region-spec";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x8 0x0 0x8 0x0>;
};
pmu_rp_0: pmu@0 {
compatible = "remote-port";
#interrupt-cells = <0x2>;
chrdev-id = "pmu-apu-rp";
linux,phandle = <0x2>;
phandle = <0x2>;
};
rp_memory_slave_pmu: rp_memory_slave_pmu@0 {
compatible = "remote-port-memory-slave";
remote-ports = <0x2 0x0>;
mr = <0x3>;
};
rp_gpio_pmu_intr: rp_gpio_pmu_intr@0 {
#interrupt-cells = <0x1>;
compatible = "remote-port-gpio";
remote-ports = <0x2 0x1>;
interrupt-controller;
num-gpios = <0x1>;
linux,phandle = <0x5e>;
phandle = <0x5e>;
};
rp_gpio_pmu: rp_gpio_pmu@0 {
compatible = "remote-port-gpio";
remote-ports = <0x2 0x2>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x4>;
gpios = <0x4 0x0 0x5 0x2 0x4 0x3>;
linux,phandle = <0x14>;
phandle = <0x14>;
};
amba: amba@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
interrupt-map-mask = <0x0 0x0 0xffff>;
interrupt-map = <0x0 0x0 0x8 0x6 0x0 0x8 0x4 0x0 0x0 0x9 0x6 0x0 0x9 0x4 0x0 0x0 0xa 0x6 0x0 0xa 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xc 0x6 0x0 0xc 0x4 0x0 0x0 0xd 0x6 0x0 0xd 0x4 0x0 0x0 0xe 0x6 0x0 0xe 0x4 0x0 0x0 0xf 0x6 0x0 0xf 0x4 0x0 0x0 0x10 0x6 0x0 0x10 0x4 0x0 0x0 0x11 0x6 0x0 0x11 0x4 0x0 0x0 0x12 0x6 0x0 0x12 0x4 0x0 0x0 0x13 0x6 0x0 0x13 0x4 0x0 0x0 0x14 0x6 0x0 0x14 0x4 0x0 0x0 0x15 0x6 0x0 0x15 0x4 0x0 0x0 0x16 0x6 0x0 0x16 0x4 0x0 0x0 0x17 0x6 0x0 0x17 0x4 0x0 0x0 0x18 0x6 0x0 0x18 0x4 0x0 0x0 0x19 0x6 0x0 0x19 0x4 0x0 0x0 0x19 0x6 0x0 0x19 0x4 0x0 0x0 0x1a 0x6 0x0 0x1a 0x4 0x0 0x0 0x1b 0x6 0x0 0x1b 0x4 0x0 0x0 0x1c 0x6 0x0 0x1c 0x4 0x0 0x0 0x1d 0x6 0x0 0x1d 0x4 0x0 0x0 0x1e 0x6 0x0 0x1e 0x4 0x0 0x0 0x1f 0x6 0x0 0x1f 0x4 0x0 0x0 0x20 0x6 0x0 0x20 0x4 0x0 0x0 0x21 0x6 0x0 0x21 0x4 0x0 0x0 0x22 0x6 0x0 0x22 0x4 0x0 0x0 0x23 0x6 0x0 0x23 0x4 0x0 0x0 0x24 0x6 0x0 0x24 0x4 0x0 0x0 0x25 0x6 0x0 0x25 0x4 0x0 0x0 0x26 0x6 0x0 0x26 0x4 0x0 0x0 0x27 0x6 0x0 0x27 0x4 0x0 0x0 0x28 0x6 0x0 0x28 0x4 0x0 0x0 0x29 0x6 0x0 0x29 0x4 0x0 0x0 0x2a 0x6 0x0 0x2a 0x4 0x0 0x0 0x2b 0x6 0x0 0x2b 0x4 0x0 0x0 0x2c 0x6 0x0 0x2c 0x4 0x0 0x0 0x2d 0x6 0x0 0x2d 0x4 0x0 0x0 0x2e 0x6 0x0 0x2e 0x4 0x0 0x0 0x2f 0x6 0x0 0x2f 0x4 0x0 0x0 0x30 0x6 0x0 0x30 0x4 0x0 0x0 0x31 0x6 0x0 0x31 0x4 0x0 0x0 0x32 0x6 0x0 0x32 0x4 0x0 0x0 0x33 0x6 0x0 0x33 0x4 0x0 0x0 0x34 0x6 0x0 0x34 0x4 0x0 0x0 0x35 0x6 0x0 0x35 0x4 0x0 0x0 0x36 0x6 0x0 0x36 0x4 0x0 0x0 0x37 0x6 0x0 0x37 0x4 0x0 0x0 0x38 0x6 0x0 0x38 0x4 0x0 0x0 0x39 0x6 0x0 0x39 0x4 0x0 0x0 0x3a 0x6 0x0 0x3a 0x4 0x0 0x0 0x3b 0x6 0x0 0x3b 0x4 0x0 0x0 0x3c 0x6 0x0 0x3c 0x4 0x0 0x0 0x3d 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0x4 0x0 0x0 0x13 0x8 0x0 0x13 0x4 0x0 0x0 0x14 0x8 0x0 0x14 0x4 0x0 0x0 0x15 0x8 0x0 0x15 0x4 0x0 0x0 0x16 0x8 0x0 0x16 0x4 0x0 0x0 0x17 0x8 0x0 0x17 0x4 0x0 0x0 0x18 0x8 0x0 0x18 0x4 0x0 0x0 0x19 0x8 0x0 0x19 0x4 0x0 0x0 0x19 0x8 0x0 0x19 0x4 0x0 0x0 0x1a 0x8 0x0 0x1a 0x4 0x0 0x0 0x1b 0x8 0x0 0x1b 0x4 0x0 0x0 0x1c 0x8 0x0 0x1c 0x4 0x0 0x0 0x1d 0x8 0x0 0x1d 0x4 0x0 0x0 0x1e 0x8 0x0 0x1e 0x4 0x0 0x0 0x1f 0x8 0x0 0x1f 0x4 0x0 0x0 0x20 0x8 0x0 0x20 0x4 0x0 0x0 0x21 0x8 0x0 0x21 0x4 0x0 0x0 0x22 0x8 0x0 0x22 0x4 0x0 0x0 0x23 0x8 0x0 0x23 0x4 0x0 0x0 0x24 0x8 0x0 0x24 0x4 0x0 0x0 0x25 0x8 0x0 0x25 0x4 0x0 0x0 0x26 0x8 0x0 0x26 0x4 0x0 0x0 0x27 0x8 0x0 0x27 0x4 0x0 0x0 0x28 0x8 0x0 0x28 0x4 0x0 0x0 0x29 0x8 0x0 0x29 0x4 0x0 0x0 0x2a 0x8 0x0 0x2a 0x4 0x0 0x0 0x2b 0x8 0x0 0x2b 0x4 0x0 0x0 0x2c 0x8 0x0 0x2c 0x4 0x0 0x0 0x2d 0x8 0x0 0x2d 0x4 0x0 0x0 0x2e 0x8 0x0 0x2e 0x4 0x0 0x0 0x2f 0x8 0x0 0x2f 0x4 0x0 0x0 0x30 0x8 0x0 0x30 0x4 0x0 0x0 0x31 0x8 0x0 0x31 0x4 0x0 0x0 0x32 0x8 0x0 0x32 0x4 0x0 0x0 0x33 0x8 0x0 0x33 0x4 0x0 0x0 0x34 0x8 0x0 0x34 0x4 0x0 0x0 0x35 0x8 0x0 0x35 0x4 0x0 0x0 0x36 0x8 0x0 0x36 0x4 0x0 0x0 0x37 0x8 0x0 0x37 0x4 0x0 0x0 0x38 0x8 0x0 0x38 0x4 0x0 0x0 0x39 0x8 0x0 0x39 0x4 0x0 0x0 0x3a 0x8 0x0 0x3a 0x4 0x0 0x0 0x3b 0x8 0x0 0x3b 0x4 0x0 0x0 0x3c 0x8 0x0 0x3c 0x4 0x0 0x0 0x3d 0x8 0x0 0x3d 0x4 0x0 0x0 0x3e 0x8 0x0 0x3e 0x4 0x0 0x0 0x3f 0x8 0x0 0x3f 0x4 0x0 0x0 0x40 0x8 0x0 0x40 0x4 0x0 0x0 0x41 0x8 0x0 0x41 0x4 0x0 0x0 0x42 0x8 0x0 0x42 0x4 0x0 0x0 0x43 0x8 0x0 0x43 0x4 0x0 0x0 0x44 0x8 0x0 0x44 0x4 0x0 0x0 0x45 0x8 0x0 0x45 0x4 0x0 0x0 0x46 0x8 0x0 0x46 0x4 0x0 0x0 0x47 0x8 0x0 0x47 0x4 0x0 0x0 0x48 0x8 0x0 0x48 0x4 0x0 0x0 0x49 0x8 0x0 0x49 0x4 0x0 0x0 0x4a 0x8 0x0 0x4a 0x4 0x0 0x0 0x4b 0x8 0x0 0x4b 0x4 0x0 0x0 0x4c 0x8 0x0 0x4c 0x4 0x0 0x0 0x4d 0x8 0x0 0x4d 0x4 0x0 0x0 0x4e 0x8 0x0 0x4e 0x4 0x0 0x0 0x4f 0x8 0x0 0x4f 0x4 0x0 0x0 0x50 0x8 0x0 0x50 0x4 0x0 0x0 0x51 0x8 0x0 0x51 0x4 0x0 0x0 0x52 0x8 0x0 0x52 0x4 0x0 0x0 0x53 0x8 0x0 0x53 0x4 0x0 0x0 0x54 0x8 0x0 0x54 0x4 0x0 0x0 0x55 0x8 0x0 0x55 0x4 0x0 0x0 0x56 0x8 0x0 0x56 0x4 0x0 0x0 0x57 0x8 0x0 0x57 0x4 0x0 0x0 0x58 0x8 0x0 0x58 0x4 0x0 0x0 0x58 0x8 0x0 0x58 0x4 0x0 0x0 0x59 0x8 0x0 0x59 0x4 0x0 0x0 0x5a 0x8 0x0 0x5a 0x4 0x0 0x0 0x5b 0x8 0x0 0x5b 0x4 0x0 0x0 0x5c 0x8 0x0 0x5c 0x4 0x0 0x0 0x5d 0x8 0x0 0x5d 0x4 0x0 0x0 0x5e 0x8 0x0 0x5e 0x4 0x0 0x0 0x5f 0x8 0x0 0x5f 0x4 0x0 0x0 0x60 0x8 0x0 0x60 0x4 0x0 0x0 0x68 0x8 0x0 0x68 0x4 0x0 0x0 0x69 0x8 0x0 0x69 0x4 0x0 0x0 0x6a 0x8 0x0 0x6a 0x4 0x0 0x0 0x6b 0x8 0x0 0x6b 0x4 0x0 0x0 0x6c 0x8 0x0 0x6c 0x4 0x0 0x0 0x6d 0x8 0x0 0x6d 0x4 0x0 0x0 0x6e 0x8 0x0 0x6e 0x4 0x0 0x0 0x6f 0x8 0x0 0x6f 0x4 0x0 0x0 0x70 0x8 0x0 0x70 0x4 0x0 0x0 0x71 0x8 0x0 0x71 0x4 0x0 0x0 0x72 0x8 0x0 0x72 0x4 0x0 0x0 0x73 0x8 0x0 0x73 0x4 0x0 0x0 0x74 0x8 0x0 0x74 0x4 0x0 0x0 0x75 0x8 0x0 0x75 0x4 0x0 0x0 0x76 0x8 0x0 0x76 0x4 0x0 0x0 0x77 0x8 0x0 0x77 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x79 0x8 0x0 0x79 0x4 0x0 0x0 0x7a 0x8 0x0 0x7a 0x4 0x0 0x0 0x7b 0x8 0x0 0x7b 0x4 0x0 0x0 0x7b 0x8 0x0 0x7b 0x4 0x0 0x0 0x7c 0x8 0x0 0x7c 0x4 0x0 0x0 0x7d 0x8 0x0 0x7d 0x4 0x0 0x0 0x7e 0x8 0x0 0x7e 0x4 0x0 0x0 0x7f 0x8 0x0 0x7f 0x4 0x0 0x0 0x80 0x8 0x0 0x80 0x4 0x0 0x0 0x81 0x8 0x0 0x81 0x4 0x0 0x0 0x82 0x8 0x0 0x82 0x4 0x0 0x0 0x83 0x8 0x0 0x83 0x4 0x0 0x0 0x84 0x8 0x0 0x84 0x4 0x0 0x0 0x85 0x8 0x0 0x85 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x87 0x8 0x0 0x87 0x4 0x0 0x0 0x88 0x8 0x0 0x88 0x4 0x0 0x0 0x89 0x8 0x0 0x89 0x4 0x0 0x0 0x8a 0x8 0x0 0x8a 0x4 0x0 0x0 0x8b 0x8 0x0 0x8b 0x4 0x0 0x0 0x8c 0x8 0x0 0x8c 0x4 0x0 0x0 0x8d 0x8 0x0 0x8d 0x4 0x0 0x0 0x8e 0x8 0x0 0x8e 0x4 0x0 0x0 0x8f 0x8 0x0 0x8f 0x4 0x0 0x0 0x90 0x8 0x0 0x90 0x4 0x0 0x0 0x91 0x8 0x0 0x91 0x4 0x0 0x0 0x92 0x8 0x0 0x92 0x4 0x0 0x0 0x93 0x8 0x0 0x93 0x4 0x0 0x0 0x94 0x8 0x0 0x94 0x4 0x0 0x0 0x95 0x8 0x0 0x95 0x4 0x0 0x0 0x96 0x8 0x0 0x96 0x4 0x0 0x0 0x97 0x8 0x0 0x97 0x4 0x0 0x0 0x98 0x8 0x0 0x98 0x4 0x0 0x0 0x99 0x8 0x0 0x99 0x4 0x0 0x0 0x9a 0x8 0x0 0x9a 0x4 0x0 0x0 0x9b 0x8 0x0 0x9b 0x4>;
#address-cells = <0x2>;
#size-cells = <0x1>;
linux,phandle = <0x23>;
phandle = <0x23>;
apu: apu@0xFD5C0000 {
compatible = "xlnx,apu";
#gpio-cells = <0x1>;
reg = <0x0 0xfd5c0000 0x1000>;
cpu0 = <0x9>;
cpu1 = <0xa>;
cpu2 = <0xb>;
cpu3 = <0xc>;
gpios = <0xd 0x1 0x0 0xd 0x2 0x0 0xd 0x3 0x0 0xd 0x4 0x0>;
linux,phandle = <0x64>;
phandle = <0x64>;
};
rpu_ctrl: rpu_control@0xFF9A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,rpu-control";
reg = <0x0 0xff9a0000 0x400>;
gpio-controller;
atcm1-for-rpu0 = <0xe>;
btcm1-for-rpu0 = <0xf>;
icache-for-rpu1 = <0x10>;
dcache-for-rpu1 = <0x11>;
gic-for-rpu = <0x7>;
gpios = <0x4 0x6 0x4 0x7 0xd 0x5 0xd 0x6>;
ddr-mem-for-rpu = <0x12>;
linux,phandle = <0x6e>;
phandle = <0x6e>;
};
pmu_global: pmu_global@0xFFD80000 {
interrupt-parent = <0x13>;
interrupts = <0x17 0x0 0x18 0x0 0x1a 0x0 0x1b 0x0 0x1c 0x0 0x1d 0x0>;
compatible = "xlnx,pmu_global";
reg = <0x0 0xffd80000 0x40000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x1a>;
gpios = <0x14 0x3>;
gpio-names = "mb_sleep";
error-out-gpios = <0x15 0x1d 0x0 0x15 0x1e 0x0>;
pwr-state-gpios = <0x16 0x1 0x16 0x2 0x16 0x3 0x16 0x4 0x16 0x5 0x16 0x6 0x17 0x0 0x16 0xa 0x17 0x1 0x17 0x2 0x16 0x9 0x16 0x9 0x16 0x14 0x16 0x15 0x16 0x16 0x16 0x17 0x16 0xc 0x16 0xd 0x16 0xe 0x16 0xf 0x16 0x7 0x16 0x8 0x16 0x1c>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
apu_ipi: apu_ipi@0xFF300000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x23 0x4 0x0 0x0 0x0 0x6 0x0 0x23 0x4 0x0 0x0 0x0 0x7 0x0 0x23 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff300000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x0 0x0 0x19 0x0 0x0 0x1a 0x0 0x0 0x1b 0x0 0x0 0x1c 0x0 0x0 0x1d 0x0 0x0 0x1e 0x0 0x0 0x1f 0x0 0x0 0x20 0x0 0x0 0x21 0x0 0x0 0x22 0x0 0x0>;
gpios = <0x18 0x20 0x0 0x19 0x20 0x0 0x1a 0x20 0x0 0x1b 0x20 0x0 0x1c 0x20 0x0 0x1d 0x20 0x0 0x1e 0x20 0x0 0x1f 0x20 0x0 0x20 0x20 0x0 0x21 0x20 0x0 0x22 0x20 0x0>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
rpu_0_ipi: rpu_0_ipi@0xFF310000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x21 0x4 0x0 0x0 0x0 0x6 0x0 0x21 0x4 0x0 0x0 0x0 0x7 0x0 0x21 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff310000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x8 0x0 0x19 0x8 0x0 0x1a 0x8 0x0 0x1b 0x8 0x0 0x1c 0x8 0x0 0x1d 0x8 0x0 0x1e 0x8 0x0 0x1f 0x8 0x0 0x20 0x8 0x0 0x21 0x8 0x0 0x22 0x8 0x0>;
gpios = <0x18 0x28 0x0 0x19 0x28 0x0 0x1a 0x28 0x0 0x1b 0x28 0x0 0x1c 0x28 0x0 0x1d 0x28 0x0 0x1e 0x28 0x0 0x1f 0x28 0x0 0x20 0x28 0x0 0x21 0x28 0x0 0x22 0x28 0x0>;
linux,phandle = <0x19>;
phandle = <0x19>;
};
rpu_1_ipi: rpu_1_ipi@0xFF320000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x22 0x4 0x0 0x0 0x0 0x6 0x0 0x22 0x4 0x0 0x0 0x0 0x7 0x0 0x22 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff320000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x9 0x0 0x19 0x9 0x0 0x1a 0x9 0x0 0x1b 0x9 0x0 0x1c 0x9 0x0 0x1d 0x9 0x0 0x1e 0x9 0x0 0x1f 0x9 0x0 0x20 0x9 0x0 0x21 0x9 0x0 0x22 0x9 0x0>;
gpios = <0x18 0x29 0x0 0x19 0x29 0x0 0x1a 0x29 0x0 0x1b 0x29 0x0 0x1c 0x29 0x0 0x1d 0x29 0x0 0x1e 0x29 0x0 0x1f 0x29 0x0 0x20 0x29 0x0 0x21 0x29 0x0 0x22 0x29 0x0>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
pmu_0_ipi: pmu_0_ipi@0xFF330000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x13 0x0>;
reg = <0x0 0xff330000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x10 0x0 0x19 0x10 0x0 0x1a 0x10 0x0 0x1b 0x10 0x0 0x1c 0x10 0x0 0x1d 0x10 0x0 0x1e 0x10 0x0 0x1f 0x10 0x0 0x20 0x10 0x0 0x21 0x10 0x0 0x22 0x10 0x0>;
gpios = <0x18 0x30 0x0 0x19 0x30 0x0 0x1a 0x30 0x0 0x1b 0x30 0x0 0x1c 0x30 0x0 0x1d 0x30 0x0 0x1e 0x30 0x0 0x1f 0x30 0x0 0x20 0x30 0x0 0x21 0x30 0x0 0x22 0x30 0x0>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
pmu_1_ipi: pmu_1_ipi@0xFF331000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x14 0x0>;
reg = <0x0 0xff331000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x11 0x0 0x19 0x11 0x0 0x1a 0x11 0x0 0x1b 0x11 0x0 0x1c 0x11 0x0 0x1d 0x11 0x0 0x1e 0x11 0x0 0x1f 0x11 0x0 0x20 0x11 0x0 0x21 0x11 0x0 0x22 0x11 0x0>;
gpios = <0x18 0x31 0x0 0x19 0x31 0x0 0x1a 0x31 0x0 0x1b 0x31 0x0 0x1c 0x31 0x0 0x1d 0x31 0x0 0x1e 0x31 0x0 0x1f 0x31 0x0 0x20 0x31 0x0 0x21 0x31 0x0 0x22 0x31 0x0>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
pmu_2_ipi: pmu_2_ipi@0xFF332000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x15 0x0>;
reg = <0x0 0xff332000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x12 0x0 0x19 0x12 0x0 0x1a 0x12 0x0 0x1b 0x12 0x0 0x1c 0x12 0x0 0x1d 0x12 0x0 0x1e 0x12 0x0 0x1f 0x12 0x0 0x20 0x12 0x0 0x21 0x12 0x0 0x22 0x12 0x0>;
gpios = <0x18 0x32 0x0 0x19 0x32 0x0 0x1a 0x32 0x0 0x1b 0x32 0x0 0x1c 0x32 0x0 0x1d 0x32 0x0 0x1e 0x32 0x0 0x1f 0x32 0x0 0x20 0x32 0x0 0x21 0x32 0x0 0x22 0x32 0x0>;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
pmu_3_ipi: pmu_3_ipi@0xFF333000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x16 0x0>;
reg = <0x0 0xff333000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x13 0x0 0x19 0x13 0x0 0x1a 0x13 0x0 0x1b 0x13 0x0 0x1c 0x13 0x0 0x1d 0x13 0x0 0x1e 0x13 0x0 0x1f 0x13 0x0 0x20 0x13 0x0 0x21 0x13 0x0 0x22 0x13 0x0>;
gpios = <0x18 0x33 0x0 0x19 0x33 0x0 0x1a 0x33 0x0 0x1b 0x33 0x0 0x1c 0x33 0x0 0x1d 0x33 0x0 0x1e 0x33 0x0 0x1f 0x33 0x0 0x20 0x33 0x0 0x21 0x33 0x0 0x22 0x33 0x0>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
pl_0_ipi: pl_0_ipi@0xFF340000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x1d 0x4 0x0 0x0 0x0 0x6 0x0 0x1d 0x4 0x0 0x0 0x0 0x7 0x0 0x1d 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff340000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x18 0x0 0x19 0x18 0x0 0x1a 0x18 0x0 0x1b 0x18 0x0 0x1c 0x18 0x0 0x1d 0x18 0x0 0x1e 0x18 0x0 0x1f 0x18 0x0 0x20 0x18 0x0 0x21 0x18 0x0 0x22 0x18 0x0>;
gpios = <0x18 0x34 0x0 0x19 0x34 0x0 0x1a 0x34 0x0 0x1b 0x34 0x0 0x1c 0x34 0x0 0x1d 0x34 0x0 0x1e 0x34 0x0 0x1f 0x34 0x0 0x20 0x34 0x0 0x21 0x34 0x0 0x22 0x34 0x0>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
pl_1_ipi: pl_1_ipi@0xFF350000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x1e 0x4 0x0 0x0 0x0 0x6 0x0 0x1e 0x4 0x0 0x0 0x0 0x7 0x0 0x1e 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff350000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x19 0x0 0x19 0x19 0x0 0x1a 0x19 0x0 0x1b 0x19 0x0 0x1c 0x19 0x0 0x1d 0x19 0x0 0x1e 0x19 0x0 0x1f 0x19 0x0 0x20 0x19 0x0 0x21 0x19 0x0 0x22 0x19 0x0>;
gpios = <0x18 0x35 0x0 0x19 0x35 0x0 0x1a 0x35 0x0 0x1b 0x35 0x0 0x1c 0x35 0x0 0x1d 0x35 0x0 0x1e 0x35 0x0 0x1f 0x35 0x0 0x20 0x35 0x0 0x21 0x35 0x0 0x22 0x35 0x0>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
pl_2_ipi: pl_2_ipi@0xFF360000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x1f 0x4 0x0 0x0 0x0 0x6 0x0 0x1f 0x4 0x0 0x0 0x0 0x7 0x0 0x1f 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff360000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x1a 0x0 0x19 0x1a 0x0 0x1a 0x1a 0x0 0x1b 0x1a 0x0 0x1c 0x1a 0x0 0x1d 0x1a 0x0 0x1e 0x1a 0x0 0x1f 0x1a 0x0 0x20 0x1a 0x0 0x21 0x1a 0x0 0x22 0x1a 0x0>;
gpios = <0x18 0x36 0x0 0x19 0x36 0x0 0x1a 0x36 0x0 0x1b 0x36 0x0 0x1c 0x36 0x0 0x1d 0x36 0x0 0x1e 0x36 0x0 0x1f 0x36 0x0 0x20 0x36 0x0 0x21 0x36 0x0 0x22 0x36 0x0>;
linux,phandle = <0x21>;
phandle = <0x21>;
};
pl_3_ipi: pl_3_ipi@0xFF370000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x20 0x4 0x0 0x0 0x0 0x6 0x0 0x20 0x4 0x0 0x0 0x0 0x7 0x0 0x20 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff370000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x1b 0x0 0x19 0x1b 0x0 0x1a 0x1b 0x0 0x1b 0x1b 0x0 0x1c 0x1b 0x0 0x1d 0x1b 0x0 0x1e 0x1b 0x0 0x1f 0x1b 0x0 0x20 0x1b 0x0 0x21 0x1b 0x0 0x22 0x1b 0x0>;
gpios = <0x18 0x37 0x0 0x19 0x37 0x0 0x1a 0x37 0x0 0x1b 0x37 0x0 0x1c 0x37 0x0 0x1d 0x37 0x0 0x1e 0x37 0x0 0x1f 0x37 0x0 0x20 0x37 0x0 0x21 0x37 0x0 0x22 0x37 0x0>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
xlnx_zynqmp_csu_core: csu_core {
compatible = "xlnx,zynqmp-csu-core";
reg = <0x0 0xffca0000 0x100>;
};
lpd_slcr_0: zynqmp_lpd_slcr@0xFF410000 {
compatible = "xlnx,lpd-slcr";
reg = <0x0 0xff410000 0x9000>;
gic-for-rpu = <0x7>;
gic-for-apu = <0x6>;
};
lpd_slcr_secure: zynqmp_lpd_slcr_secure@0xFF4B0000 {
compatible = "xlnx.lpd-slcr-secure";
reg = <0x0 0xff4b0000 0x38>;
};
xppu: xppu@0 {
compatible = "xlnx,xppu";
reg-extended = <0x23 0x0 0xff980000 0x10000 0x24 0x0 0xff990000 0x0 0x1000 0x3 0x24 0x0 0xff000000 0x0 0xfc0000 0x2 0x24 0x0 0xfe000000 0x0 0x1000000 0x2 0x24 0x0 0xc0000000 0x0 0x20000000 0x2>;
mr = <0x23>;
interrupts = <0x58>;
};
smmu0: smmu0@0xFD800000 {
compatible = "arm,mmu-500";
reg-extended = <0x23 0x0 0xfd800000 0x10000 0x25 0x0 0x0 0xffffffff 0xffffffff 0x26 0x0 0x0 0xffffffff 0xffffffff 0x27 0x0 0x0 0xffffffff 0xffffffff 0x28 0x0 0x0 0xffffffff 0xffffffff 0x29 0x0 0x0 0xffffffff 0xffffffff 0x2a 0x0 0x0 0xffffffff 0xffffffff>;
interrupt-parent = <0x2b>;
interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11>;
dma = <0x2c>;
mr-0 = <0x2c>;
mr-1 = <0x2c>;
mr-2 = <0x2c>;
mr-3 = <0x2d>;
mr-4 = <0x2e>;
mr-5 = <0x2f>;
};
smmu_reg: smmu0@0xFD5F0000 {
compatible = "xlnx,smmu-reg";
reg = <0x0 0xfd5f0000 0x1000>;
interrupt-controller;
interrupts = <0x9b>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
cci_mem1: cci_mem1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x30>;
phandle = <0x30>;
};
cci_mem2: cci_mem2@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x31>;
phandle = <0x31>;
};
cci: cci@0xFD6E0000 {
compatible = "arm,cci-400";
gpio-controller;
#gpio-cells = <0x1>;
reg-extended = <0x23 0x0 0xfd6e0000 0xf000 0x2c 0x0 0x0 0xffffffff 0xffffffff 0x2>;
M0 = <0x24>;
M1 = <0x30>;
M2 = <0x31>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
ocm_xmpu: ocm_xmpu@0xFFA70000 {
compatible = "xlnx,xmpu";
interrupts = <0x58>;
reg-extended = <0x23 0x0 0xffa70000 0x1000 0x23 0x0 0xfffc0000 0x40000>;
protected-mr = <0x32>;
mr-0 = <0x23>;
protected-base = <0xfffc0000>;
};
ddr_xmpu0: ddr_xmpu0_@_DDR_XMPU0_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd000000 0x1000 0x33 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x33>;
};
ddr_xmpu1: ddr_xmpu1_@_DDR_XMPU1_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd010000 0x1000 0x30 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x30>;
gpios = <0x34 0x0>;
};
ddr_xmpu2: ddr_xmpu2_@_DDR_XMPU2_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd020000 0x1000 0x31 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x31>;
gpios = <0x34 0x1>;
};
ddr_xmpu3: ddr_xmpu3_@_DDR_XMPU3_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd030000 0x1000 0x2d 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2d>;
};
ddr_xmpu4: ddr_xmpu4_@_DDR_XMPU4_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd040000 0x1000 0x2e 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2e>;
};
ddr_xmpu5: ddr_xmpu5_@_DDR_XMPU5_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd050000 0x1000 0x2f 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2f>;
};
ps7_afi_0: ps7-afi@0xFD360000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd360000 0x1000>;
};
ps7_afi_1: ps7-afi@0xFD370000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd370000 0x1000>;
};
ps7_afi_2: ps7-afi@0xFD380000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd380000 0x1000>;
};
ps7_afi_3: ps7-afi@0xFD390000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd390000 0x1000>;
};
ps7_afi_4: ps7-afi@0xFD3A0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3a0000 0x1000>;
};
ps7_afi_5: ps7-afi@0xFD3B0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3b0000 0x1000>;
};
gdma0_mr: gdma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma0_mattr: gdma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e8>;
linux,phandle = <0x35>;
phandle = <0x35>;
};
gdma0: gdma0@0xFD500000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd500000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7c>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x35>;
};
gdma1_mr: gdma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma1_mattr: gdma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e9>;
linux,phandle = <0x36>;
phandle = <0x36>;
};
gdma1: gdma1@0xFD510000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd510000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7d>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x36>;
};
gdma2_mr: gdma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma2_mattr: gdma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ea>;
linux,phandle = <0x37>;
phandle = <0x37>;
};
gdma2: gdma2@0xFD520000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd520000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7e>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x37>;
};
gdma3_mr: gdma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma3_mattr: gdma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14eb>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
gdma3: gdma3@0xFD530000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd530000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7f>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x38>;
};
gdma4_mr: gdma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma4_mattr: gdma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ec>;
linux,phandle = <0x39>;
phandle = <0x39>;
};
gdma4: gdma4@0xFD540000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd540000 0x1000>;
bus-width = <0x80>;
interrupts = <0x80>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x39>;
};
gdma5_mr: gdma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma5_mattr: gdma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ed>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
gdma5: gdma5@0xFD550000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd550000 0x1000>;
bus-width = <0x80>;
interrupts = <0x81>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x3a>;
};
gdma6_mr: gdma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma6_mattr: gdma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ee>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
gdma6: gdma6@0xFD560000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd560000 0x1000>;
bus-width = <0x80>;
interrupts = <0x82>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x3b>;
};
gdma7_mr: gdma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma7_mattr: gdma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ef>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
gdma7: gdma7@0xFD570000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd570000 0x1000>;
bus-width = <0x80>;
interrupts = <0x83>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x3c>;
};
crf: crf@0xFD1A0000 {
compatible = "xlnx,zynqmp_crf";
reg = <0x0 0xfd1a0000 0x110>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x63>;
phandle = <0x63>;
};
xlnx_dpdma: axidpdma@0xFD4C0000 {
compatible = "xlnx,axi-dpdma-1.0";
reg = <0x0 0xfd4c0000 0x1000>;
clocks = <0x3d>;
clock-names = "axi_clk";
xlnx,axi-clock-freq = <0xbebc200>;
interrupts = <0x7a>;
dma = <0x24>;
dma-channels = <0x6>;
#dma-cells = <0x1>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
dma-video0channel@fe4c0000 {
compatible = "xlnx,video0";
};
dma-video1channel@fe4c0000 {
compatible = "xlnx,video1";
};
dma-video2channel@fe4c0000 {
compatible = "xlnx,video2";
};
dma-graphicschannel@fe4c0000 {
compatible = "xlnx,graphics";
};
dma-audio0channel@fe4c0000 {
compatible = "xlnx,audio0";
};
dma-audio1channel@fe4c0000 {
compatible = "xlnx,audio1";
};
};
dp_aclk: clock0 {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
clock-accuracy = <0x64>;
linux,phandle = <0x3e>;
phandle = <0x3e>;
};
dummy_clk: clock1 {
compatible = "dummy-clk";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
xlnx_dp_sub: dp_sub@fd4aa000 {
compatible = "xlnx,v-dp-sub-1.6";
reg = <0x0 0xfd4aa000 0x4000>;
xlnx,output-fmt = "rgb";
linux,phandle = <0x40>;
phandle = <0x40>;
};
xlnx_dp: dp@0xFD4A0000 {
compatible = "xlnx,v-dp-4.1";
reg = <0x0 0xfd4a0000 0x1000>;
interrupts = <0x77>;
clock-names = "aclk";
clocks = <0x3e>;
dpdma = <0x3f>;
xlnx,dp-version = "v1.2";
xlnx,max-lanes = <0x2>;
xlnx,max-link-rate = <0x278d0>;
xlnx,max-bpc = <0x10>;
xlnx,max-pclock = <0x7530>;
xlnx,enable-ycrcb;
xlnx,colormetry = "rgb";
xlnx,bpc = <0x8>;
xlnx,dp-sub = <0x40>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
xilinx_drm {
compatible = "xlnx,drm";
xlnx,encoder-slave = <0x41>;
clocks = <0x3d 0x0>;
xlnx,connector-type = "DisplayPort";
xlnx,dp-sub = <0x40>;
planes {
xlnx,pixel-format = "rgb565";
plane0 {
dmas = <0x3f 0x3>;
dma-names = "dma";
};
plane1 {
dmas = <0x3f 0x0>;
dma-names = "dma";
};
};
};
ddrphy_0: ddr-phy@0xFD080000 {
compatible = "xlnx,zynqmp-ddr-phy";
reg = <0x0 0xfd080000 0x2000>;
};
ddrc_0: memory-controller@0xFD070000 {
compatible = "xlnx,zynqmp-ddrc";
reg = <0x0 0xfd070000 0x1000>;
};
swdt@0xFF150000 {
compatible = "xlnx,swdt";
reg = <0x0 0xff150000 0x10>;
pclk = <0xf4240>;
};
wdt@0xFD4D0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xfd4d0000 0x10>;
pclk = <0xf4240>;
};
csu_wdt@0xFFCB0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xffcb0000 0x10>;
pclk = <0xf4240>;
};
iou_slcr_0: zynqmp_iou_slcr@0xFF180000 {
compatible = "xilinx,zynqmp-iou-slcr";
reg = <0x0 0xff180000 0x1000>;
gpio-controller;
#gpio-cells = <0x2>;
mio-bank0-1.8v = <0x1>;
mio-bank1-1.8v = <0x1>;
mio-bank2-1.8v = <0x1>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
ps7_can_0: ps7-can@0xFF060000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x17>;
reg = <0x0 0xff060000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
ps7_can_1: ps7-can@0xFF070000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x18>;
reg = <0x0 0xff070000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
serdes_0: serdes@0xFD400000 {
compatible = "xlnx,zynqmp-serdes";
reg = <0x0 0xfd400000 0x20000>;
};
gem0: ethernet@0xFF0B0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x39 0x39>;
dma = <0x27>;
memattr = <0x43>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0b0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem1: ethernet@0xFF0C0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3b 0x3b>;
dma = <0x27>;
memattr = <0x44>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0c0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem2: ethernet@0xFF0D0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3d 0x3d>;
dma = <0x27>;
memattr = <0x45>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0d0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem3: ethernet@0xFF0E0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3f 0x3f>;
dma = <0x27>;
memattr = <0x46>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0e0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
mdio = <0x47>;
};
sata: ahci@0xFD0C0000 {
compatible = "generic-ahci", "sysbus-ahci";
reg = <0x0 0xfd0c0000 0x2000>;
interrupts = <0x85>;
num-ports = <0x2>;
dma = <0x24>;
};
lpd_gpv@0xFE100000 {
compatible = "xlnx,lpd-gpv";
reg = <0x0 0xfe100000 0xc8130>;
};
usb3_0: usb3@0xFE200000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe200000 0x4000>;
interrupts = <0x4b>;
gpios = <0x15 0x7 0x0 0x16 0x7>;
gpio-names = "wake", "pwr_cntrl";
};
usb3_1: usb3@0xFE300000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe300000 0x4000>;
interrupts = <0x4c>;
gpios = <0x15 0x8 0x0 0x16 0x8>;
gpio-names = "wake", "pwr_cntrl";
};
nand: arasan_nfc@0xFF100000 {
compatible = "arasan,nfc";
reg = <0x0 0xff100000 0x1000>;
interrupts = <0xe>;
dma = <0x24>;
has-mdma = <0x1>;
nand {
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "all";
reg = <0x0 0x100000>;
};
};
};
psu_gpio: psu_gpio@0xFF0A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,zynqmp-gpio";
gpio-controller;
interrupts = <0x10>;
reg = <0x0 0xff0a0000 0x1000>;
};
qspi_dma_0: csu_dma@0xFF0F0800 {
compatible = "zynqmp,csu-dma";
interrupts = <0xf>;
#stream-id-cells = <0x1>;
reg = <0x0 0xff0f0800 0x800>;
dma = <0x27>;
memattr = <0x48>;
is-dst = <0x1>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
ps7_qspi_0: ps7-qspi@0xFF0F0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
#bus-cells = <0x1>;
clock-names = "ref_clk", "pclk";
compatible = "xlnx,usmp-gqspi", "cdns,spi-r1p6";
stream-connected-dma = <0x49>;
clocks = <0x42 0x42>;
dma = <0x24>;
interrupts = <0xf>;
num-ss-bits = <0x2>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
speed-hz = <0x989680>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-clk-freq-hz = <0xbebc200>;
xlnx,qspi-mode = <0x2>;
qspi_flash_lcs_lb: qspi_flash_lcs_lb@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
qspi_flash_lcs_lb@0x00000000 {
label = "qspi_flash_lcs_lb";
reg = <0x0 0x2000000>;
};
};
qspi_flash_ucs_ub: qspi_flash_ucs_ub@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x1>;
qspi_flash_ucs_ub@0x00000000 {
label = "qspi_flash_ucs_ub";
reg = <0x0 0x2000000>;
};
};
};
sd_clk: sd_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
ps7_sd_0: ps7-sdio@0xFF160000 {
clock-names = "ref_clk", "aper_clk";
clock-frequency = <0x17d7840>;
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x4a 0x4a>;
drive-index = <0x0>;
interrupts = <0x30>;
reg = <0x0 0xff160000 0x1000>;
dma = <0x24>;
gpios = <0x4b 0x0 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x0>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_sd_1: ps7-sdio@0xFF170000 {
clock-names = "ref_clk", "aper_clk";
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x42 0x42>;
drive-index = <0x1>;
interrupts = <0x31>;
reg = <0x0 0xff170000 0x1000>;
dma = <0x24>;
gpios = <0x4b 0x1 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x1>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_spi_0: ps7-spi@0xFF040000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x42 0x42>;
compatible = "cdns,spi-r1p6";
interrupts = <0x13>;
num-ss-bits = <0x4>;
reg = <0x0 0xff040000 0x1000>;
spi0_flash0: spi0_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi0_flash0@0x00000000 {
label = "spi0_flash0";
reg = <0x0 0x100000>;
};
};
spi0_flash1: spi0_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi0_flash1@0x00000000 {
label = "spi0_flash1";
reg = <0x0 0x100000>;
};
};
spi0_flash2: spi0_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi0_flash2@0x00000000 {
label = "spi0_flash2";
reg = <0x0 0x100000>;
};
};
spi0_flash3: spi0_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi0_flash3@0x00000000 {
label = "spi0_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_spi_1: ps7-spi@0xFF050000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x42 0x42>;
compatible = "cdns,spi-r1p6";
interrupts = <0x14>;
num-ss-bits = <0x4>;
reg = <0x0 0xff050000 0x1000>;
spi1_flash0: spi1_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi1_flash0@0x00000000 {
label = "spi1_flash0";
reg = <0x0 0x100000>;
};
};
spi1_flash1: spi1_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi1_flash1@0x00000000 {
label = "spi1_flash1";
reg = <0x0 0x100000>;
};
};
spi1_flash2: spi1_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi1_flash2@0x00000000 {
label = "spi1_flash2";
reg = <0x0 0x100000>;
};
};
spi1_flash3: spi1_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi1_flash3@0x00000000 {
label = "spi1_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_ttc_0: ps7-ttc@0xFF110000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x24 0x25 0x26>;
reg = <0x0 0xff110000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_1: ps7-ttc@0xFF120000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x27 0x28 0x29>;
reg = <0x0 0xff120000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_2: ps7-ttc@0xFF130000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2a 0x2b 0x2c>;
reg = <0x0 0xff130000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_3: ps7-ttc@0xFF140000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2d 0x2e 0x2f>;
reg = <0x0 0xff140000 0x1000>;
timer-width = <0x20>;
};
uart_clk: uart_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
ps7_uart_0: serial@0xFF000000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x15>;
port-number = <0x1>;
reg = <0x0 0xff000000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x4c 0x4c>;
ttrig-polarity = <0x1>;
};
ps7_uart_1: serial@0xFF010000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x16>;
port-number = <0x0>;
reg = <0x0 0xff010000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x4c 0x4c>;
ttrig-polarity = <0x1>;
status = "disabled";
};
ocm_ctrl0: ocm_ctrl@0xFF960000 {
compatible = "xlnx,zynqmp-ocmc";
memsize = <0x40000>;
reg = <0x0 0xff960000 0x1000>;
};
ocm_mem_ctrl_0: ocm_mem_ctrl_0@0 {
compatible = "qemu,memory-controller";
mr = <0x4d>;
gpios = <0x16 0x10 0x16 0xc>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
ocm_mem_ctrl_1: ocm_mem_ctrl_1@1 {
compatible = "qemu,memory-controller";
mr = <0x4e>;
gpios = <0x16 0x11 0x16 0xd>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
ocm_mem_ctrl_2: ocm_mem_ctrl_2@2 {
compatible = "qemu,memory-controller";
mr = <0x4f>;
gpios = <0x16 0x12 0x16 0xe>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
ocm_mem_ctrl_3: ocm_mem_ctrl_3@3 {
compatible = "qemu,memory-controller";
mr = <0x50>;
gpios = <0x16 0x13 0x16 0xf>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
adma0_mr: adma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma0_mattr: adma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x868>;
linux,phandle = <0x51>;
phandle = <0x51>;
};
adma0: adma0@0xFFA80000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa80000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4d>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x51>;
};
adma1_mr: adma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma1_mattr: adma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x869>;
linux,phandle = <0x52>;
phandle = <0x52>;
};
adma1: adma1@0xFFA90000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa90000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4e>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x52>;
};
adma2_mr: adma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma2_mattr: adma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86a>;
linux,phandle = <0x53>;
phandle = <0x53>;
};
adma2: adma2@0xFFAA0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaa0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4f>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x53>;
};
adma3_mr: adma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma3_mattr: adma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86b>;
linux,phandle = <0x54>;
phandle = <0x54>;
};
adma3: adma3@0xFFAB0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffab0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x50>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x54>;
};
adma4_mr: adma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma4_mattr: adma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86c>;
linux,phandle = <0x55>;
phandle = <0x55>;
};
adma4: adma4@0xFFAC0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffac0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x51>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x55>;
};
adma5_mr: adma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma5_mattr: adma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86d>;
linux,phandle = <0x56>;
phandle = <0x56>;
};
adma5: adma5@0xFFAD0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffad0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x52>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x56>;
};
adma6_mr: adma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma6_mattr: adma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86e>;
linux,phandle = <0x57>;
phandle = <0x57>;
};
adma6: adma6@0xFFAE0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffae0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x53>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x57>;
};
adma7_mr: adma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma7_mattr: adma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86f>;
linux,phandle = <0x58>;
phandle = <0x58>;
};
adma7: adma7@0xFFAF0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaf0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x54>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x58>;
};
crl: crl@0xFF5E0000 {
compatible = "xlnx,zynqmp-crl";
reg = <0x0 0xff5e0000 0x1000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x3>;
gpios = <0x4 0x1a>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
gic_proxy: gic_proxy@0xff418000 {
#interrupt-cells = <0x3>;
reg = <0x0 0xff418000 0x100>;
compatible = "xlnx,zynqmp-gicp";
interrupt-controller;
gpios = <0x15 0x11 0x0>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
zynqmp_anms: zynqmp_anms@0xFFA50000 {
compatible = "xlnx,zynqmp_ams";
reg = <0x0 0xffa50000 0x68>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_ps: zynqmp_sysmon_ps@0xFFA50800 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50800 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_pl: zynqmp_sysmon_pl@0xFFA50C00 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50c00 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
dummy_gpio: dummy_gpio@0 {
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
cxtsgen: cxtsgen@0xFF250000 {
compatible = "arm.generic-timer";
reg = <0x0 0xff260000 0x1000>;
};
ps_reset@0 {
compatible = "qemu,reset-device";
gpios = <0x5 0x2 0x4 0x3>;
};
pcie_attrib: pcie_attrib@0xFD480000 {
compatible = "xlnx.nwl-pcie-attrib";
reg = <0x0 0xfd480000 0x1000>;
interrupts = <0x76>;
};
pcie_main: pcie_main@0xFD0E0000 {
compatible = "xlnx.nwl-pcie-main";
reg-extended = <0x23 0x0 0xfd0e0000 0x1000 0x59 0x0 0xfd480000 0x0 0x1000 0x2 0x23 0x80 0x0 0x10000000 0x5a 0x0 0x0 0xffffffff 0xffffffff 0x0>;
interrupts = <0x74 0x72 0x73>;
dma = <0x59>;
memattr = <0x5b>;
};
zynqmp_boot: zynqmp_boot@0 {
compatible = "xlnx,zynqmp-boot";
dma = <0x23>;
gpios = <0x16 0x0>;
gpios-names = "reset";
};
rpu0_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x5c>;
reg = <0x0 0xffe00000 0x60000>;
};
rpu1_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x5d>;
reg = <0x0 0xffe90000 0x50000>;
};
i2c1: i2c1@0xFF030000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clocks = <0x42>;
compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10";
interrupts = <0x12>;
reg = <0x0 0xff030000 0x1000>;
i2cswitch@74 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "nxp,pca9548";
reg = <0x74>;
i2c@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
eeprom@54 {
compatible = "at,24c08";
reg = <0x54>;
};
eeprom@55 {
compatible = "at,24c08";
reg = <0x55>;
};
eeprom@56 {
compatible = "at,24c08";
reg = <0x56>;
};
eeprom@57 {
compatible = "at,24c08";
reg = <0x57>;
};
};
i2c@2 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x2>;
si570_1: clock-generator@5d {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
i2c@3 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x3>;
si570_2: clock-generator@5e {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
};
};
};
lmb_pmu: lmb_pmu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x3>;
phandle = <0x3>;
main_bus_for_pmu {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
pmu_io_module: io-module@00 {
#address-cells = <0x2>;
#size-cells = <0x1>;
#priority-cells = <0x0>;
compatible = "xlnx,iomodule-1.02.a", "syscon", "simple-bus";
container = <0x3>;
priority = <0xffffffff>;
xlnx,freq = <0x47868c0>;
xlnx,instance = "iomodule_1";
xlnx,io-mask = <0xfffe0000>;
xlnx,lmb-awidth = <0x20>;
xlnx,lmb-dwidth = <0x20>;
xlnx,mask = <0xffffff80>;
xlnx,use-io-bus = <0x1>;
pmu_io_intc: pmu_intc@0C {
#interrupt-cells = <0x2>;
compatible = "xlnx,io-intc-1.02.a", "xlnx,io_intc";
interrupt-controller;
interrupts-extended = <0x5e 0x0>;
reg = <0x0 0xffd4000c 0x4 0x0 0xffd40030 0x10 0x0 0xffd40080 0x7c>;
xlnx,intc-addr-width = <0x20>;
xlnx,intc-base-vectors = <0x0>;
xlnx,intc-has-fast = <0x0>;
xlnx,intc-intr-size = <0x10>;
xlnx,intc-level-edge = <0x0>;
xlnx,intc-positive = <0xffff>;
xlnx,intc-use-ext-intr = <0x1>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
pmu_io_gpi1: pmu_gpi@20 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xb 0x0>;
reg = <0x0 0xffd40020 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
};
pmu_io_gpi2: pmu_gpi@24 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xc 0x0>;
reg = <0x0 0xffd40024 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
gpios = <0x16 0x1d>;
linux,phandle = <0x15>;
phandle = <0x15>;
};
pmu_io_gpi3: pmu_gpi@28 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xd 0x0>;
reg = <0x0 0xffd40028 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
gpios = <0x16 0x1e>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
pmu_io_gpi4: pmu_gpi@2c {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xe 0x0>;
reg = <0x0 0xffd4002c 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
};
pmu_io_gpo1: pmu_gpo@10 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd40010 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x9>;
xlnx,use-gpo = <0x1>;
linux,phandle = <0x5f>;
phandle = <0x5f>;
};
pmu_io_gpo2: pmu_gpo@14 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd40014 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x1>;
};
pmu_io_gpo3: pmu_gpo@18 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd40018 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x1>;
};
pmu_io_gpo4: pmu_gpo@1c {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd4001c 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x1>;
};
pmu_io_pit1: pmu_pit@40 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x3 0x0>;
reg = <0x0 0xffd40040 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpios = <0x5f 0x2 0x0 0x60 0x0>;
gpio-names = "ps_config", "ps_hit_in";
gpio-controller;
#gpio-cells = <0x1>;
};
pmu_io_pit2: pmu_pit@50 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x4 0x0>;
reg = <0x0 0xffd40050 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x60>;
phandle = <0x60>;
};
pmu_io_pit3: pmu_pit@60 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x5 0x0>;
reg = <0x0 0xffd40060 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpios = <0x5f 0x6 0x0 0x61 0x0>;
gpio-names = "ps_config", "ps_hit_in";
gpio-controller;
#gpio-cells = <0x1>;
};
pmu_io_pit4: pmu_pit@70 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x6 0x0>;
reg = <0x0 0xffd40070 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x61>;
phandle = <0x61>;
};
pmu_io_uart: pmu_uart@00 {
compatible = "xlnx,io-uart-1.02.a", "xlnx,io_uart";
interrupt-parent = <0x13>;
interrupts = <0x0 0x0 0x1 0x0 0x2 0x0>;
reg = <0x0 0xffd40000 0xc 0x0 0xffd4004c 0x4>;
xlnx,uart-baudrate = <0x2580>;
xlnx,uart-data-bits = <0x8>;
xlnx,uart-error-interrupt = <0x1>;
xlnx,uart-odd-parity = <0x0>;
xlnx,uart-prog-baudrate = <0x0>;
xlnx,uart-rx-interrupt = <0x1>;
xlnx,uart-tx-interrupt = <0x1>;
xlnx,uart-use-parity = <0x0>;
xlnx,use-uart-rx = <0x0>;
xlnx,use-uart-tx = <0x0>;
};
};
pmu_local: pmu_local@ffd60000 {
#gpio-cells = <0x1>;
compatible = "xlnx,pmu-local";
reg = <0x0 0xffd60000 0x0 0x1000 0x0>;
gpio-controller;
num-gpios = <0x7>;
linux,phandle = <0x16>;
phandle = <0x16>;
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu0: apu_cpu@0 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x0>;
enable-method = "psci";
reg = <0x0>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x0 0x64 0x0 0x16 0x80000001 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #0";
memattr_s = <0x65>;
memattr_ns = <0x66>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
cpu1: apu_cpu@1 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x1>;
enable-method = "psci";
reg = <0x1>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x1 0x64 0x1 0x16 0x80000002 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #1";
memattr_s = <0x67>;
memattr_ns = <0x68>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
cpu2: apu_cpu@2 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x2>;
enable-method = "psci";
reg = <0x2>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x2 0x64 0x2 0x16 0x80000003 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #2";
memattr_s = <0x69>;
memattr_ns = <0x6a>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
cpu3: apu_cpu@3 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x3>;
enable-method = "psci";
reg = <0x3>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x3 0x64 0x3 0x16 0x80000004 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #3";
memattr_s = <0x6b>;
memattr_ns = <0x6c>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
rpu_cpu0: rpu_cpu@0 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x100>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x0>;
mr = <0x6d>;
memory = <0x6d>;
gpios = <0x5 0x0 0x6e 0x0 0x6e 0x7 0x6e 0x5 0x16 0x9>;
gpio-names = "reset", "ncpuhalt", "vinithi", "wfi", "pwr_cntrl";
gdb-id = "Cortex-R5 #0";
memattr_ns = <0x6f>;
linux,phandle = <0x78>;
phandle = <0x78>;
};
rpu_cpu1: rpu_cpu@1 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x101>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x1>;
mr = <0x70>;
memory = <0x70>;
gpios = <0x5 0x1 0x6e 0x2 0x6e 0x1 0x6e 0x8 0x6e 0x6 0x16 0x9>;
gpio-names = "reset", "halt", "ncpuhalt", "vinithi", "wfi", "pwr_cntrl";
gdb-id = "Cortex-R5 #1";
memattr_ns = <0x71>;
linux,phandle = <0x79>;
phandle = <0x79>;
};
};
aliases {
serial0 = "/amba@0/serial@0xFF000000";
serial1 = "/amba@0/serial@0xFF010000";
ethernet0 = "/amba@0/ethernet@0xFF0E0000";
main_bus_for_apu {
compatible = "qemu:memory-region";
container = <0x62>;
alias = <0x2c>;
priority = <0xffffffff>;
};
main_bus_for_pl {
compatible = "qemu:memory-region";
container = <0x23>;
alias = <0x72>;
priority = <0xffffffff>;
};
};
amba_apu: amba_apu@0 {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x62>;
phandle = <0x62>;
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x6>;
interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
clock-frequency = <0x5f5e100>;
};
dummy: dymmy@0 {
interrupt-controller;
#interrupt-cells = <0x1>;
linux,phandle = <0x77>;
phandle = <0x77>;
};
apu_intc_redirect_0: apu_intc_redirect0@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0x9 0x0 0x9 0x1 0x9 0x2 0x9 0x3>;
gpios = <0x15 0x1 0x0 0x64 0x4>;
linux,phandle = <0x73>;
phandle = <0x73>;
};
apu_intc_redirect_1: apu_intc_redirect1@1 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0xa 0x0 0xa 0x1 0xa 0x2 0xa 0x3>;
gpios = <0x15 0x2 0x0 0x64 0x5>;
linux,phandle = <0x74>;
phandle = <0x74>;
};
apu_intc_redirect_2: apu_intc_redirect2@2 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0xb 0x0 0xb 0x1 0xb 0x2 0xb 0x3>;
gpios = <0x15 0x3 0x0 0x64 0x6>;
linux,phandle = <0x75>;
phandle = <0x75>;
};
apu_intc_redirect_3: apu_intc_redirect3@3 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0xc 0x0 0xc 0x1 0xc 0x2 0xc 0x3>;
gpios = <0x15 0x4 0x0 0x64 0x7>;
linux,phandle = <0x76>;
phandle = <0x76>;
};
};
amba_apu_gic: amba_apu_gic@0 {
#address-cells = <0x2>;
#priority-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
container = <0x23>;
priority = <0xffffffff>;
gic: interrupt-controller@0xFD3FF000 {
#address-cells = <0x0>;
#size-cells = <0x0>;
#interrupt-cells = <0x3>;
#gpio-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9010000 0x1000 0x0 0x0 0xf9020000 0x20000 0x0 0x0 0xf9040000 0x20000 0x0 0x0 0xf9060000 0x20000 0x0>;
interrupt-controller;
gpios = <0x16 0x1c 0x4 0x2>;
gpio-names = "pwr_cntrl", "rst_cntrl";
num-irq = <0xc0>;
interrupts-extended = <0x73 0x0 0x74 0x0 0x75 0x0 0x76 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x73 0x2 0x74 0x2 0x75 0x2 0x76 0x2 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x73 0x1 0x74 0x1 0x75 0x1 0x76 0x1 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x73 0x3 0x74 0x3 0x75 0x3 0x76 0x3 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x6 0x1 0x9 0x104 0x6 0x1 0x9 0x204 0x6 0x1 0x9 0x404 0x6 0x1 0x9 0x804>;
num-cpu = <0x4>;
revision = <0x2>;
map-stride = <0x10000>;
int-id = <0x202143b>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
zynqmp-gic-cpu-alias@0xf9021000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9021000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9022000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9022000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9023000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9023000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9024000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9024000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9025000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9025000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9026000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9026000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9027000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9027000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9028000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9028000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9029000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9029000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902a000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902a000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902b000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902b000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902c000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902c000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902d000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902d000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902e000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902e000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902f000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902f000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9061000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9061000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9062000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9062000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9063000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9063000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9064000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9064000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9065000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9065000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9066000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9066000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9067000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9067000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9068000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9068000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9069000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9069000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906a000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906a000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906b000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906b000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906c000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906c000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906d000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906d000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906e000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906e000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906f000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906f000 0x1000 0x1>;
};
};
amba_rpu: amba_rpu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x33>;
phandle = <0x33>;
rpu_intc_redirect_0: rpu_intc_redirect0@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0x78 0x0>;
gpios = <0x15 0x5 0x0 0x6e 0x3>;
linux,phandle = <0x7e>;
phandle = <0x7e>;
};
rpu_intc_redirect_1: rpu_intc_redirect1@1 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0x79 0x0>;
gpios = <0x15 0x6 0x0 0x6e 0x4>;
linux,phandle = <0x7f>;
phandle = <0x7f>;
};
tcm_mem_ctrl_0_A: tcm_mem_ctrl_A0@0 {
compatible = "qemu,memory-controller";
mr = <0x7a>;
gpios = <0x16 0x18 0x16 0x14>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
tcm_mem_ctrl_0_B: tcm_mem_ctrl_B0@0 {
compatible = "qemu,memory-controller";
mr = <0x7b>;
gpios = <0x16 0x19 0x16 0x15>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
tcm_mem_ctrl_1_A: tcm_mem_ctrl_A1@1 {
compatible = "qemu,memory-controller";
mr = <0x7c>;
gpios = <0x16 0x1a 0x16 0x16>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
tcm_mem_ctrl_1_B: tcm_mem_ctrl_B1@1 {
compatible = "qemu,memory-controller";
mr = <0x7d>;
gpios = <0x16 0x1b 0x16 0x17>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
rpu_gic: interrupt-controller@0xF9000000 {
#address-cells = <0x0>;
#interrupt-cells = <0x3>;
#size-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9000000 0x0 0x1000 0x0 0x0 0xf9001000 0x0 0x100 0x0>;
status = "disabled";
interrupt-controller;
num-irq = <0x100>;
num-cpu = <0x2>;
interrupts-extended = <0x7e 0x0 0x7f 0x0>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
ddr_memory_2_for_rpu: ddr_memory_2_for_rpu {
compatible = "qemu:memory-region";
alias = <0x80>;
reg = <0x0 0x30000 0x0 0x10000 0x0>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
main_bus_for_rpu {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
smmu_tbu0: tbu0_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x25>;
phandle = <0x25>;
};
smmu_tbu1: tbu1_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x26>;
phandle = <0x26>;
};
smmu_tbu2: tbu2_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x27>;
phandle = <0x27>;
};
smmu_tbu3: tbu3_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x28>;
phandle = <0x28>;
};
smmu_tbu4: tbu4_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x29>;
phandle = <0x29>;
};
smmu_tbu5: tbu5_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
tbu3_master: tbu3_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2d>;
phandle = <0x2d>;
main_bus_for_tbu3 {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu4_master: tbu4_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2e>;
phandle = <0x2e>;
main_bus_for_tbu4 {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu5_master: tbu5_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2f>;
phandle = <0x2f>;
main_bus_for_tbu5 {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
cci_slave: cci_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2c>;
phandle = <0x2c>;
downstream {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
};
misc_clk: misc_clk {
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
compatible = "fixed-clock";
linux,phandle = <0x42>;
phandle = <0x42>;
};
pcie_ingress: pcie_ingress@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
linux,phandle = <0x59>;
phandle = <0x59>;
downstream {
compatible = "qemu:memory-region";
alias = <0x26>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
pcie_overlay: pcie_overlay@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
priority = <0x2>;
compatible = "qemu:memory-region";
container = <0x23>;
linux,phandle = <0x5a>;
phandle = <0x5a>;
};
ddr_alias: ddr_alias@0 {
compatible = "qemu:memory-region";
container = <0x81>;
alias = <0x1>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
qemu_sysmem: qemu_sysmem@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:system-memory";
linux,phandle = <0x81>;
phandle = <0x81>;
};
pmu_memattr: pmu_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x40>;
};
apu0_s_memattr: apu0_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x80>;
linux,phandle = <0x65>;
phandle = <0x65>;
};
apu0_ns_memattr: apu0_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x80>;
linux,phandle = <0x66>;
phandle = <0x66>;
};
apu1_s_memattr: apu1_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8d>;
linux,phandle = <0x67>;
phandle = <0x67>;
};
apu1_ns_memattr: apu1_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8d>;
linux,phandle = <0x68>;
phandle = <0x68>;
};
apu2_s_memattr: apu2_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8e>;
linux,phandle = <0x69>;
phandle = <0x69>;
};
apu2_ns_memattr: apu2_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8e>;
linux,phandle = <0x6a>;
phandle = <0x6a>;
};
apu3_s_memattr: apu3_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8f>;
linux,phandle = <0x6b>;
phandle = <0x6b>;
};
apu3_ns_memattr: apu3_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8f>;
linux,phandle = <0x6c>;
phandle = <0x6c>;
};
rpu0_memattr: rpu0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2e>;
linux,phandle = <0x6f>;
phandle = <0x6f>;
};
rpu1_memattr: rpu1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2f>;
linux,phandle = <0x71>;
phandle = <0x71>;
};
gem0_memattr: gem0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x874>;
linux,phandle = <0x43>;
phandle = <0x43>;
};
gem1_memattr: gem1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x875>;
linux,phandle = <0x44>;
phandle = <0x44>;
};
gem2_memattr: gem2_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x876>;
linux,phandle = <0x45>;
phandle = <0x45>;
};
gem3_memattr: gem3_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x877>;
linux,phandle = <0x46>;
phandle = <0x46>;
};
qspi_dma_memattr: qspi_dma_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x873>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
pcie_ns_memattr: pcie_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x4d0>;
linux,phandle = <0x5b>;
phandle = <0x5b>;
};
protected_amba: protected_amba@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x24>;
phandle = <0x24>;
downstream {
compatible = "qemu:memory-region";
alias = <0x23>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
ddr3_ram: memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x23>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
pmu_ram: pmu_ram@ffdc0000 {
compatible = "qemu:memory-region";
container = <0x23>;
qemu,ram = <0x2>;
reg = <0x0 0xffdc0000 0x20000>;
};
tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x7a>;
phandle = <0x7a>;
};
tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x7b>;
phandle = <0x7b>;
};
tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x7c>;
phandle = <0x7c>;
};
tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x7d>;
phandle = <0x7d>;
};
icache_rpu0: icache_rpu0@0x40000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
};
dcache_rpu0: dcache_rpu0@0x50000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x50000 0x8000>;
};
icache_rpu1: icache_rpu1@0x30000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x8000>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
dcache_rpu1: dcache_rpu1@0x40000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
ipibuf_ram: ipibuf@ff990000 {
compatible = "qemu:memory-region";
container = <0x23>;
qemu,ram = <0x2>;
reg = <0x0 0xff990000 0x1000>;
};
ocm_ram: ocm_ram@0 {
compatible = "qemu:memory-region";
linux,phandle = <0x32>;
phandle = <0x32>;
};
ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x4d>;
phandle = <0x4d>;
};
ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x10000 0x10000>;
linux,phandle = <0x4e>;
phandle = <0x4e>;
};
ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x4f>;
phandle = <0x4f>;
};
ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
linux,phandle = <0x50>;
phandle = <0x50>;
};
tcm_cache_rpu0: tcm_cache_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x5c>;
phandle = <0x5c>;
atcm1_for_rpu0: atcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x7c>;
reg = <0x0 0x10000 0x0 0x10000 0x1>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
btcm1_for_rpu0: btcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x7d>;
reg = <0x0 0x30000 0x0 0x10000 0x1>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
};
amba_rpu0: amba_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x6d>;
phandle = <0x6d>;
tcm_cache_rpu0 {
compatible = "qemu:memory-region";
alias = <0x5c>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
rpu_bus_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x33>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tcm_cache_rpu1: tcm_cache_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x5d>;
phandle = <0x5d>;
};
amba_rpu1: amba_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x70>;
phandle = <0x70>;
tcm_cache_rpu1 {
compatible = "qemu:memory-region";
alias = <0x5d>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
rpu_bus_for_rpu1 {
compatible = "qemu:memory-region";
alias = <0x33>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_pl: amba_pl {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x72>;
phandle = <0x72>;
};
mdio0: mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "mdio";
linux,phandle = <0x47>;
phandle = <0x47>;
phy0: phy@7 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0x7>;
};
phy1: phy@12 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0xc>;
};
};
};
[-- Attachment #13: zynqmp-qemu-multiarch-pmu.txt --]
[-- Type: text/plain, Size: 12282 bytes --]
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x1>;
cpus {
#address-cells = <0x1>;
#cpus = <0x1>;
#size-cells = <0x0>;
pmu_cpu0: cpu@0 {
#interrupt-cells = <0x1>;
clock-frequency = <0x5f5e100>;
compatible = "xlnx,microblaze-cpu";
d-cache-size = <0x0>;
device_type = "cpu";
i-cache-size = <0x0>;
model = "microblaze,8.40.b";
version = "8.40.b";
reg = <0x0>;
timebase-frequency = <0x5f5e100>;
xlnx,addr-tag-bits = <0x10>;
xlnx,area-optimized = <0x0>;
xlnx,avoid-primitives = <0x3>;
xlnx,base-vectors = <0xffd00000>;
xlnx,branch-target-cache-size = <0x0>;
xlnx,d-axi = <0x1>;
xlnx,d-lmb = <0x1>;
xlnx,d-plb = <0x0>;
xlnx,data-size = <0x20>;
xlnx,debug-enabled = <0x1>;
xlnx,div-zero-exception = <0x0>;
xlnx,dynamic-bus-sizing = <0x1>;
xlnx,ecc-use-ce-exception = <0x0>;
xlnx,edge-is-positive = <0x1>;
xlnx,endianness = <0x1>;
xlnx,family = "virtex7";
xlnx,fault-tolerant = <0x1>;
xlnx,fpu-exception = <0x0>;
xlnx,freq = <0x5f5e100>;
xlnx,fsl-data-size = <0x20>;
xlnx,fsl-exception = <0x0>;
xlnx,fsl-links = <0x0>;
xlnx,i-axi = <0x1>;
xlnx,i-lmb = <0x1>;
xlnx,i-plb = <0x0>;
xlnx,ill-opcode-exception = <0x1>;
xlnx,instance = "microblaze_1";
xlnx,interconnect = <0x2>;
xlnx,interrupt-is-edge = <0x0>;
xlnx,lockstep-slave = <0x0>;
xlnx,mmu-dtlb-size = <0x2>;
xlnx,mmu-itlb-size = <0x4>;
xlnx,mmu-privileged-instr = <0x0>;
xlnx,mmu-tlb-access = <0x3>;
xlnx,mmu-zones = <0x2>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x1>;
xlnx,number-of-wr-addr-brk = <0x1>;
xlnx,opcode-0x0-illegal = <0x1>;
xlnx,optimization = <0x0>;
xlnx,pc-width = <0x20>;
xlnx,pvr = <0x0>;
xlnx,pvr-user1 = <0x0>;
xlnx,pvr-user2 = <0x0>;
xlnx,reset-msr = <0x0>;
xlnx,sco = <0x0>;
xlnx,stream-interconnect = <0x0>;
xlnx,unaligned-exceptions = <0x1>;
xlnx,use-barrel = <0x1>;
xlnx,use-branch-target-cache = <0x0>;
xlnx,use-dcache = <0x0>;
xlnx,use-div = <0x0>;
xlnx,use-ext-brk = <0x1>;
xlnx,use-ext-nm-brk = <0x1>;
xlnx,use-extended-fsl-instr = <0x0>;
xlnx,use-fpu = <0x0>;
xlnx,use-hw-mul = <0x0>;
xlnx,use-icache = <0x0>;
xlnx,use-interrupt = <0x1>;
xlnx,use-mmu = <0x0>;
xlnx,use-msr-instr = <0x1>;
xlnx,use-pcmp-instr = <0x1>;
xlnx,use-reorder-instr = <0x1>;
xlnx,use-stack-protection = <0x1>;
gpios = <0x1 0x0 0x1 0x3>;
gpio-names = "wakeup", "mb_sleep";
mr = <0x2>;
memory = <0x2>;
memattr = <0x3>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
};
lmb_pmu: lmb_pmu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2>;
phandle = <0x2>;
main_bus_for_pmu {
compatible = "qemu:memory-region";
alias = <0x4>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
pmu_rom: memory@ffd00000 {
device_type = "memory";
reg = <0x0 0xffd00000 0x0 0x8000 0x1>;
compatible = "qemu:memory-region";
container = <0x2>;
qemu,ram = <0x1>;
read-only;
};
rp_memory_master: rp_mm@40000000 {
compatible = "remote-port-memory-master";
remote-ports = <0x5 0x0>;
reg = <0x0 0x40000000 0x0 0xc0000000 0xfffffffe>;
};
};
pmu: pmu@0 {
compatible = "remote-port";
chrdev-id = "pmu-apu-rp";
linux,phandle = <0x5>;
phandle = <0x5>;
};
rp_gpio_mpu_intr: rp_gpio_pmu_intr@0 {
compatible = "remote-port-gpio";
remote-ports = <0x5 0x1>;
num-gpios = <0x1>;
interrupts-extended = <0x6 0x0>;
};
rp_gpio_pmu: rp_gpio_pmu@0 {
#gpio-cells = <0x1>;
compatible = "remote-port-gpio";
remote-ports = <0x5 0x2>;
gpio-controller;
num-gpios = <0x4>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
ps_reset@0 {
compatible = "qemu,reset-device";
gpios = <0x1 0x1 0x1 0x2>;
};
ddr_bank1_1: ddr_bank1_1@0x0 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x30000>;
};
ddr_bank1_2: ddr_bank1_2@0x30000 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
};
ddr_bank1_3: ddr_bank1_3@0x40000 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x3ffc0000>;
};
ddr_bank2: ddr_bank2@0x40000000 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x40000000 0x40000000>;
};
pmu_memattr: pmu_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x40>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
apu0_s_memattr: apu0_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x80>;
};
apu0_ns_memattr: apu0_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x80>;
};
apu1_s_memattr: apu1_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8d>;
};
apu1_ns_memattr: apu1_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8d>;
};
apu2_s_memattr: apu2_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8e>;
};
apu2_ns_memattr: apu2_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8e>;
};
apu3_s_memattr: apu3_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8f>;
};
apu3_ns_memattr: apu3_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8f>;
};
rpu0_memattr: rpu0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2e>;
};
rpu1_memattr: rpu1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2f>;
};
gem0_memattr: gem0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x874>;
};
gem1_memattr: gem1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x875>;
};
gem2_memattr: gem2_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x876>;
};
gem3_memattr: gem3_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x877>;
};
qspi_dma_memattr: qspi_dma_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x873>;
};
pcie_ns_memattr: pcie_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x4d0>;
};
protected_amba: protected_amba@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0xe>;
phandle = <0xe>;
downstream {
compatible = "qemu:memory-region";
alias = <0x4>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba: amba@0 {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x4>;
phandle = <0x4>;
rpu0_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x8>;
reg = <0x0 0xffe00000 0x60000>;
};
rpu1_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x9>;
reg = <0x0 0xffe90000 0x50000>;
};
};
ddr3_ram: memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x4>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
pmu_ram: pmu_ram@ffdc0000 {
compatible = "qemu:memory-region";
container = <0x4>;
qemu,ram = <0x2>;
reg = <0x0 0xffdc0000 0x20000>;
};
tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
};
tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
};
tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
icache_rpu0: icache_rpu0@0x40000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
};
dcache_rpu0: dcache_rpu0@0x50000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x50000 0x8000>;
};
icache_rpu1: icache_rpu1@0x30000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x8000>;
};
dcache_rpu1: dcache_rpu1@0x40000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
};
ipibuf_ram: ipibuf@ff990000 {
compatible = "qemu:memory-region";
container = <0x4>;
qemu,ram = <0x2>;
reg = <0x0 0xff990000 0x1000>;
};
ocm_ram: ocm_ram@0 {
compatible = "qemu:memory-region";
linux,phandle = <0xa>;
phandle = <0xa>;
};
ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
};
ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x10000 0x10000>;
};
ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
};
ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
};
tcm_cache_rpu0: tcm_cache_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x8>;
phandle = <0x8>;
atcm1_for_rpu0: atcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0xb>;
reg = <0x0 0x10000 0x0 0x10000 0x1>;
};
btcm1_for_rpu0: btcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0xc>;
reg = <0x0 0x30000 0x0 0x10000 0x1>;
};
};
amba_rpu0: amba_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
tcm_cache_rpu0 {
compatible = "qemu:memory-region";
alias = <0x8>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
rpu_bus_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0xd>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tcm_cache_rpu1: tcm_cache_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x9>;
phandle = <0x9>;
};
amba_rpu1: amba_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
tcm_cache_rpu1 {
compatible = "qemu:memory-region";
alias = <0x9>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
rpu_bus_for_rpu1 {
compatible = "qemu:memory-region";
alias = <0xd>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_rpu: amba_rpu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0xd>;
phandle = <0xd>;
main_bus_for_rpu {
compatible = "qemu:memory-region";
alias = <0xe>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
};
[-- Attachment #14: system.dts.txt --]
[-- Type: text/plain, Size: 39908 bytes --]
/dts-v1/;
/ {
compatible = "xlnx,zynqmp";
#address-cells = <0x2>;
#size-cells = <0x2>;
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
operating-points-v2 = <0x1>;
reg = <0x0>;
cpu-idle-states = <0x2>;
clocks = <0x3 0xa>;
};
cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
operating-points-v2 = <0x1>;
cpu-idle-states = <0x2>;
};
cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
operating-points-v2 = <0x1>;
cpu-idle-states = <0x2>;
};
cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
operating-points-v2 = <0x1>;
cpu-idle-states = <0x2>;
};
idle-states {
entry-method = "arm,psci";
cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000000>;
local-timer-stop;
entry-latency-us = <0x12c>;
exit-latency-us = <0x258>;
min-residency-us = <0x2710>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
};
};
cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
linux,phandle = <0x1>;
phandle = <0x1>;
opp00 {
opp-hz = <0x0 0x47868bf4>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
opp01 {
opp-hz = <0x0 0x23c345fa>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
opp02 {
opp-hz = <0x0 0x17d783fc>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
opp03 {
opp-hz = <0x0 0x11e1a2fd>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
};
dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
power-domains {
compatible = "xlnx,zynqmp-genpd";
pd-usb0 {
#power-domain-cells = <0x0>;
pd-id = <0x16>;
linux,phandle = <0x40>;
phandle = <0x40>;
};
pd-usb1 {
#power-domain-cells = <0x0>;
pd-id = <0x17>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
pd-sata {
#power-domain-cells = <0x0>;
pd-id = <0x1c>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
pd-spi0 {
#power-domain-cells = <0x0>;
pd-id = <0x23>;
linux,phandle = <0x39>;
phandle = <0x39>;
};
pd-spi1 {
#power-domain-cells = <0x0>;
pd-id = <0x24>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
pd-uart0 {
#power-domain-cells = <0x0>;
pd-id = <0x21>;
linux,phandle = <0x3e>;
phandle = <0x3e>;
};
pd-uart1 {
#power-domain-cells = <0x0>;
pd-id = <0x22>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
};
pd-eth0 {
#power-domain-cells = <0x0>;
pd-id = <0x1d>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
pd-eth1 {
#power-domain-cells = <0x0>;
pd-id = <0x1e>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
pd-eth2 {
#power-domain-cells = <0x0>;
pd-id = <0x1f>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
pd-eth3 {
#power-domain-cells = <0x0>;
pd-id = <0x20>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
pd-i2c0 {
#power-domain-cells = <0x0>;
pd-id = <0x25>;
linux,phandle = <0x14>;
phandle = <0x14>;
};
pd-i2c1 {
#power-domain-cells = <0x0>;
pd-id = <0x26>;
linux,phandle = <0x15>;
phandle = <0x15>;
};
pd-dp {
#power-domain-cells = <0x0>;
pd-id = <0x29>;
linux,phandle = <0x42>;
phandle = <0x42>;
};
pd-gdma {
#power-domain-cells = <0x0>;
pd-id = <0x2a>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
pd-adma {
#power-domain-cells = <0x0>;
pd-id = <0x2b>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
pd-ttc0 {
#power-domain-cells = <0x0>;
pd-id = <0x18>;
};
pd-ttc1 {
#power-domain-cells = <0x0>;
pd-id = <0x19>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
pd-ttc2 {
#power-domain-cells = <0x0>;
pd-id = <0x1a>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
pd-ttc3 {
#power-domain-cells = <0x0>;
pd-id = <0x1b>;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
pd-sd0 {
#power-domain-cells = <0x0>;
pd-id = <0x27>;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
pd-sd1 {
#power-domain-cells = <0x0>;
pd-id = <0x28>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
pd-nand {
#power-domain-cells = <0x0>;
pd-id = <0x2c>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
pd-qspi {
#power-domain-cells = <0x0>;
pd-id = <0x2d>;
linux,phandle = <0x19>;
phandle = <0x19>;
};
pd-gpio {
#power-domain-cells = <0x0>;
pd-id = <0x2e>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
pd-can0 {
#power-domain-cells = <0x0>;
pd-id = <0x2f>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
pd-can1 {
#power-domain-cells = <0x0>;
pd-id = <0x30>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
pd-pcie {
#power-domain-cells = <0x0>;
pd-id = <0x3b>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
pd-gpu {
#power-domain-cells = <0x0>;
pd-id = <0x3a 0x14 0x15>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
};
mailbox@ff990400 {
compatible = "xlnx,zynqmp-ipi-mailbox";
reg = <0x0 0xff9905c0 0x0 0x20 0x0 0xff9905e0 0x0 0x20 0x0 0xff990e80 0x0 0x20 0x0 0xff990ea0 0x0 0x20>;
reg-names = "local_request_region", "local_response_region", "remote_request_region", "remote_response_region";
#mbox-cells = <0x1>;
xlnx,ipi-ids = <0x0 0x4>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x23 0x4>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <0x4>;
interrupts = <0x0 0x8f 0x4 0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
firmware {
zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
method = "smc";
};
};
zynqmp-power {
compatible = "xlnx,zynqmp-power";
mboxes = <0x5 0x0 0x5 0x1>;
mbox-names = "tx", "rx";
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x4>;
interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
};
edac {
compatible = "arm,cortex-a53-edac";
};
fpga-full {
compatible = "fpga-region";
fpga-mgr = <0x6>;
#address-cells = <0x2>;
#size-cells = <0x2>;
};
nvmem_firmware {
compatible = "xlnx,zynqmp-nvmem-fw";
#address-cells = <0x1>;
#size-cells = <0x1>;
soc_revision@0 {
reg = <0x0 0x4>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
};
pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
linux,phandle = <0x6>;
phandle = <0x6>;
};
reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <0x1>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
zynqmp_rsa {
compatible = "xlnx,zynqmp-rsa";
};
sha384 {
compatible = "xlnx,zynqmp-keccak-384";
};
amba_apu@0 {
compatible = "simple-bus";
#address-cells = <0x2>;
#size-cells = <0x1>;
ranges = <0x0 0x0 0x0 0x0 0xffffffff>;
interrupt-controller@f9010000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <0x3>;
reg = <0x0 0xf9010000 0x10000 0x0 0xf9020000 0x20000 0x0 0xf9040000 0x20000 0x0 0xf9060000 0x20000>;
interrupt-controller;
interrupt-parent = <0x4>;
interrupts = <0x1 0x9 0xf04>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
};
amba {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
can@ff060000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff060000 0x0 0x1000>;
interrupts = <0x0 0x17 0x4>;
interrupt-parent = <0x4>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <0x7>;
clocks = <0x3 0x3f 0x3 0x1f>;
};
can@ff070000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff070000 0x0 0x1000>;
interrupts = <0x0 0x18 0x4>;
interrupt-parent = <0x4>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <0x8>;
clocks = <0x3 0x40 0x3 0x1f>;
};
cci@fd6e0000 {
compatible = "arm,cci-400";
reg = <0x0 0xfd6e0000 0x0 0x9000>;
ranges = <0x0 0x0 0xfd6e0000 0x10000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
pmu@9000 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4>;
};
};
dma@fd500000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd500000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7c 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14e8>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x2e>;
phandle = <0x2e>;
};
dma@fd510000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd510000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7d 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14e9>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x2f>;
phandle = <0x2f>;
};
dma@fd520000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd520000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7e 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ea>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x30>;
phandle = <0x30>;
};
dma@fd530000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd530000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7f 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14eb>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
dma@fd540000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd540000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x80 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ec>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x32>;
phandle = <0x32>;
};
dma@fd550000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd550000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x81 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ed>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
dma@fd560000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd560000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x82 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ee>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
dma@fd570000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd570000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x83 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ef>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x35>;
phandle = <0x35>;
};
gpu@fd4b0000 {
status = "okay";
compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
power-domains = <0xb>;
clocks = <0x3 0x18 0x3 0x19 0x3 0x1a>;
};
dma@ffa80000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4d 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
dma@ffa90000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4e 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x27>;
phandle = <0x27>;
};
dma@ffaa0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4f 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
dma@ffab0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x50 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x29>;
phandle = <0x29>;
};
dma@ffac0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x51 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
dma@ffad0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x52 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
dma@ffae0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x53 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
dma@ffaf0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x54 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};
memory-controller@fd070000 {
compatible = "xlnx,zynqmp-ddrc-2.40a";
reg = <0x0 0xfd070000 0x0 0x30000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x70 0x4>;
};
nand@ff100000 {
compatible = "arasan,nfc-v3p10";
status = "disabled";
reg = <0x0 0xff100000 0x0 0x1000>;
clock-names = "clk_sys", "clk_flash";
interrupt-parent = <0x4>;
interrupts = <0x0 0xe 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x872>;
power-domains = <0xd>;
clocks = <0x3 0x3c 0x3 0x1f>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
ethernet@ff0b0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x874>;
power-domains = <0xe>;
clocks = <0x3 0x1f 0x3 0x31 0x3 0x2d 0x3 0x31 0x3 0x2c>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
ethernet@ff0c0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x875>;
power-domains = <0xf>;
clocks = <0x3 0x1f 0x3 0x32 0x3 0x2e 0x3 0x32 0x3 0x2c>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
ethernet@ff0d0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x876>;
power-domains = <0x10>;
clocks = <0x3 0x1f 0x3 0x33 0x3 0x2f 0x3 0x33 0x3 0x2c>;
linux,phandle = <0x21>;
phandle = <0x21>;
};
ethernet@ff0e0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x877>;
power-domains = <0x11>;
clocks = <0x3 0x1f 0x3 0x34 0x3 0x30 0x3 0x34 0x3 0x2c>;
phy-mode = "rgmii-id";
xlnx,ptp-enet-clock = <0x0>;
local-mac-address = [00 0a 35 00 02 90];
phy-handle = <0x12>;
linux,phandle = <0x22>;
phandle = <0x22>;
phy@9 {
reg = <0x9>;
ti,rx-internal-delay = <0x5>;
ti,tx-internal-delay = <0x5>;
ti,fifo-depth = <0x1>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
};
gpio@ff0a0000 {
compatible = "xlnx,zynqmp-gpio-1.0";
status = "okay";
#gpio-cells = <0x2>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x10 0x4>;
interrupt-controller;
#interrupt-cells = <0x2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
gpio-controller;
power-domains = <0x13>;
clocks = <0x3 0x1f>;
emio-gpio-width = <0x20>;
gpio-mask-high = <0x0>;
gpio-mask-low = <0x5600>;
xen,passthrough = <0x1>;
};
i2c@ff020000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x11 0x4>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x14>;
clocks = <0x3 0x3d>;
};
i2c@ff030000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x12 0x4>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x15>;
clocks = <0x3 0x3e>;
clock-frequency = <0x61a80>;
i2cswitch@70 {
compatible = "nxp,pca9542";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x70>;
i2c@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
eeprom@51 {
compatible = "at,24c08";
reg = <0x51>;
};
};
};
};
memory-controller@ff960000 {
compatible = "xlnx,zynqmp-ocmc-1.0";
reg = <0x0 0xff960000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0xa 0x4>;
};
perf-monitor@ffa00000 {
compatible = "xlnx,axi-perf-monitor";
reg = <0x0 0xffa00000 0x0 0x10000>;
interrupts = <0x0 0x19 0x4>;
interrupt-parent = <0x4>;
xlnx,enable-profile = <0x0>;
xlnx,enable-trace = <0x0>;
xlnx,num-monitor-slots = <0x1>;
xlnx,enable-event-count = <0x1>;
xlnx,enable-event-log = <0x0>;
xlnx,have-sampled-metric-cnt = <0x1>;
xlnx,num-of-counters = <0x3>;
xlnx,metric-count-width = <0x20>;
xlnx,metrics-sample-count-width = <0x20>;
xlnx,global-count-width = <0x20>;
xlnx,metric-count-scale = <0x1>;
clocks = <0x3 0x1f>;
xlnx,enable-32bit-filter-id = <0x1>;
xlnx,enable-advanced = <0x1>;
xlnx,fifo-axis-depth = <0x20>;
xlnx,fifo-axis-tdata-width = <0x38>;
xlnx,fifo-axis-tid-width = <0x1>;
};
pcie@fd0e0000 {
compatible = "xlnx,nwl-pcie-2.11";
status = "disabled";
#address-cells = <0x3>;
#size-cells = <0x2>;
#interrupt-cells = <0x1>;
msi-controller;
device_type = "pci";
interrupt-parent = <0x4>;
interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
msi-parent = <0x16>;
reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
bus-range = <0x0 0xff>;
interrupt-map = <0x0 0x0 0x0 0x1 0x17 0x1 0x0 0x0 0x0 0x2 0x17 0x2 0x0 0x0 0x0 0x3 0x17 0x3 0x0 0x0 0x0 0x4 0x17 0x4>;
power-domains = <0x18>;
clocks = <0x3 0x17>;
linux,phandle = <0x16>;
phandle = <0x16>;
legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0x0>;
#interrupt-cells = <0x1>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
};
spi@ff0f0000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-qspi-1.0";
status = "okay";
clock-names = "ref_clk", "pclk";
interrupts = <0x0 0xf 0x4>;
interrupt-parent = <0x4>;
num-cs = <0x2>;
reg = <0x0 0xff0f0000 0x0 0x1000 0x0 0xc0000000 0x0 0x8000000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x873>;
power-domains = <0x19>;
clocks = <0x3 0x35 0x3 0x1f>;
is-dual = <0x1>;
spi-rx-bus-width = <0x4>;
spi-tx-bus-width = <0x4>;
xlnx,fb-clk = <0x1>;
linux,phandle = <0x25>;
phandle = <0x25>;
flash@0 {
compatible = "micron,m25p80";
spi-tx-bus-width = <0x1>;
spi-rx-bus-width = <0x4>;
reg = <0x0>;
#address-cells = <0x1>;
#size-cells = <0x1>;
spi-max-frequency = <0x66ff300>;
partition@0x00000000 {
label = "boot";
reg = <0x0 0x1360000>;
};
partition@0x01360000 {
label = "bootenv";
reg = <0x1360000 0x40000>;
};
partition@0x013a0000 {
label = "kernel";
reg = <0x13a0000 0x1700000>;
};
};
};
rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
status = "okay";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>;
interrupt-names = "alarm", "sec";
calibration = <0x8000>;
};
zynqmp_phy@fd400000 {
compatible = "xlnx,zynqmp-psgtr-v1.1";
status = "okay";
reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>;
reg-names = "serdes", "siou";
nvmem-cells = <0x1a>;
nvmem-cell-names = "soc_revision";
resets = <0x1b 0x10 0x1b 0x3b 0x1b 0x3c 0x1b 0x3d 0x1b 0x3e 0x1b 0x3f 0x1b 0x40 0x1b 0x3 0x1b 0x1d 0x1b 0x1e 0x1b 0x1f 0x1b 0x20>;
reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst";
lane0 {
#phy-cells = <0x4>;
};
lane1 {
#phy-cells = <0x4>;
};
lane2 {
#phy-cells = <0x4>;
};
lane3 {
#phy-cells = <0x4>;
};
};
ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
status = "okay";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x85 0x4>;
power-domains = <0x1c>;
#stream-id-cells = <0x4>;
iommus = <0x9 0x4c0 0x9 0x4c1 0x9 0x4c2 0x9 0x4c3>;
clocks = <0x3 0x16>;
ceva,p0-burst-params = <0x13084a06>;
ceva,p0-cominit-params = <0x18401828>;
ceva,p0-comwake-params = <0x614080e>;
ceva,p0-retry-params = <0x96a43ffc>;
ceva,p1-burst-params = <0x13084a06>;
ceva,p1-cominit-params = <0x18401828>;
ceva,p1-comwake-params = <0x614080e>;
ceva,p1-retry-params = <0x96a43ffc>;
};
sdhci@ff160000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x30 0x4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x870>;
power-domains = <0x1d>;
clocks = <0x3 0x36 0x3 0x1f>;
clock-frequency = <0xbebba30>;
xlnx,mio_bank = <0x0>;
bus-width = <0x8>;
max-frequency = <0x2faf080>;
linux,phandle = <0x36>;
phandle = <0x36>;
};
sdhci@ff170000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x31 0x4>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0x1>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x871>;
power-domains = <0x1e>;
clocks = <0x3 0x37 0x3 0x1f>;
clock-frequency = <0xbebba30>;
xlnx,mio_bank = <0x1>;
max-frequency = <0x2faf080>;
no-1-8-v;
linux,phandle = <0x37>;
phandle = <0x37>;
};
pinctrl@ff180000 {
compatible = "xlnx,zynqmp-pinctrl";
status = "okay";
reg = <0x0 0xff180000 0x0 0x1000>;
};
smmu@fd800000 {
compatible = "arm,mmu-500";
reg = <0x0 0xfd800000 0x0 0x20000>;
#iommu-cells = <0x1>;
status = "okay";
#global-interrupts = <0x1>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4>;
mmu-masters = <0x1f 0x874 0x20 0x875 0x21 0x876 0x22 0x877 0x23 0x860 0x24 0x861 0x25 0x873 0x26 0x868 0x27 0x869 0x28 0x86a 0x29 0x86b 0x2a 0x86c 0x2b 0x86d 0x2c 0x86e 0x2d 0x86f 0x2e 0x14e8 0x2f 0x14e9 0x30 0x14ea 0x31 0x14eb 0x32 0x14ec 0x33 0x14ed 0x34 0x14ee 0x35 0x14ef 0x36 0x870 0x37 0x871 0x38 0x872>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
spi@ff040000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x13 0x4>;
reg = <0x0 0xff040000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x39>;
clocks = <0x3 0x3a 0x3 0x1f>;
};
spi@ff050000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x14 0x4>;
reg = <0x0 0xff050000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x3a>;
clocks = <0x3 0x3b 0x3 0x1f>;
};
timer@ff110000 {
compatible = "cdns,ttc";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
xen,passthrough;
};
timer@ff120000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
};
timer@ff130000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3c>;
clocks = <0x3 0x1f>;
};
timer@ff140000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3d>;
clocks = <0x3 0x1f>;
};
serial@ff000000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x15 0x4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <0x3e>;
clocks = <0x3 0x38 0x3 0x1f>;
device_type = "serial";
port-number = <0x0>;
};
serial@ff010000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x16 0x4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <0x3f>;
clocks = <0x3 0x39 0x3 0x1f>;
device_type = "serial";
port-number = <0x1>;
xen,passthrough = <0x1>;
};
usb0@ff9d0000 {
#address-cells = <0x2>;
#size-cells = <0x2>;
status = "okay";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <0x40>;
ranges;
nvmem-cells = <0x1a>;
nvmem-cell-names = "soc_revision";
clocks = <0x3 0x20 0x3 0x22>;
xlnx,usb-reset = <0x2faf080>;
dwc3@fe200000 {
compatible = "snps,dwc3";
status = "okay";
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x41 0x4 0x0 0x45 0x4 0x0 0x4b 0x4>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
dr_mode = "host";
phy-names = "usb3-phy";
linux,phandle = <0x23>;
phandle = <0x23>;
};
};
usb1@ff9e0000 {
#address-cells = <0x2>;
#size-cells = <0x2>;
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <0x41>;
ranges;
nvmem-cells = <0x1a>;
nvmem-cell-names = "soc_revision";
clocks = <0x3 0x21 0x3 0x22>;
dwc3@fe300000 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x46 0x4 0x0 0x4a 0x4 0x0 0x4c 0x4>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
linux,phandle = <0x24>;
phandle = <0x24>;
};
};
watchdog@fd4d0000 {
compatible = "cdns,wdt-r1p2";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x71 0x1>;
reg = <0x0 0xfd4d0000 0x0 0x1000>;
timeout-sec = <0xa>;
clocks = <0x3 0x4b>;
};
ams@ffa50000 {
compatible = "xlnx,zynqmp-ams";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x38 0x4>;
interrupt-names = "ams-irq";
reg = <0x0 0xffa50000 0x0 0x800>;
reg-names = "ams-base";
#address-cells = <0x2>;
#size-cells = <0x2>;
#io-channel-cells = <0x1>;
ranges;
clocks = <0x3 0x46>;
ams_ps@ffa50800 {
compatible = "xlnx,zynqmp-ams-ps";
status = "okay";
reg = <0x0 0xffa50800 0x0 0x400>;
};
ams_pl@ffa50c00 {
compatible = "xlnx,zynqmp-ams-pl";
status = "okay";
reg = <0x0 0xffa50c00 0x0 0x400>;
};
};
dma@fd4c0000 {
compatible = "xlnx,dpdma";
status = "disabled";
reg = <0x0 0xfd4c0000 0x0 0x1000>;
interrupts = <0x0 0x7a 0x4>;
interrupt-parent = <0x4>;
clock-names = "axi_clk";
power-domains = <0x42>;
dma-channels = <0x6>;
#dma-cells = <0x1>;
clocks = <0x3 0x14>;
linux,phandle = <0x44>;
phandle = <0x44>;
dma-video0channel {
compatible = "xlnx,video0";
};
dma-video1channel {
compatible = "xlnx,video1";
};
dma-video2channel {
compatible = "xlnx,video2";
};
dma-graphicschannel {
compatible = "xlnx,graphics";
};
dma-audio0channel {
compatible = "xlnx,audio0";
};
dma-audio1channel {
compatible = "xlnx,audio1";
};
};
zynqmp-display@fd4a0000 {
compatible = "xlnx,zynqmp-dpsub-1.7";
status = "disabled";
reg = <0x0 0xfd4a0000 0x0 0x1000 0x0 0xfd4aa000 0x0 0x1000 0x0 0xfd4ab000 0x0 0x1000 0x0 0xfd4ac000 0x0 0x1000>;
reg-names = "dp", "blend", "av_buf", "aud";
interrupts = <0x0 0x77 0x4>;
interrupt-parent = <0x4>;
clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
power-domains = <0x42>;
clocks = <0x43 0x3 0x11 0x3 0x10>;
vid-layer {
dma-names = "vid0", "vid1", "vid2";
dmas = <0x44 0x0 0x44 0x1 0x44 0x2>;
};
gfx-layer {
dma-names = "gfx0";
dmas = <0x44 0x3>;
};
i2c-bus {
};
zynqmp_dp_snd_codec0 {
compatible = "xlnx,dp-snd-codec";
clock-names = "aud_clk";
clocks = <0x3 0x11>;
linux,phandle = <0x47>;
phandle = <0x47>;
};
zynqmp_dp_snd_pcm0 {
compatible = "xlnx,dp-snd-pcm";
dmas = <0x44 0x4>;
dma-names = "tx";
linux,phandle = <0x45>;
phandle = <0x45>;
};
zynqmp_dp_snd_pcm1 {
compatible = "xlnx,dp-snd-pcm";
dmas = <0x44 0x5>;
dma-names = "tx";
linux,phandle = <0x46>;
phandle = <0x46>;
};
zynqmp_dp_snd_card {
compatible = "xlnx,dp-snd-card";
xlnx,dp-snd-pcm = <0x45 0x46>;
xlnx,dp-snd-codec = <0x47>;
};
};
};
fclk0 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x47>;
};
fclk1 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x48>;
};
fclk2 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x49>;
};
fclk3 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x4a>;
};
pss_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x1fca055>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
video_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x19bfcc0>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
pss_alt_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x0>;
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
gt_crx_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x66ff300>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
aux_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x19bfcc0>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
clk {
u-boot,dm-pre-reloc;
#clock-cells = <0x1>;
compatible = "xlnx,zynqmp-clk";
clocks = <0x48 0x49 0x4a 0x4b 0x4c>;
clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
linux,phandle = <0x3>;
phandle = <0x3>;
};
dp_aclk {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x5f5e100>;
clock-accuracy = <0x64>;
linux,phandle = <0x43>;
phandle = <0x43>;
};
amba_pl@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
gpio@80000000 {
#gpio-cells = <0x3>;
clock-names = "s_axi_aclk";
clocks = <0x3 0x47>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller;
reg = <0x0 0x80000000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
};
gpio@80001000 {
#gpio-cells = <0x3>;
clock-names = "s_axi_aclk";
clocks = <0x3 0x47>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller;
reg = <0x0 0x80001000 0x0 0x1000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x1>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
};
gpio@80002000 {
#gpio-cells = <0x3>;
clock-names = "s_axi_aclk";
clocks = <0x3 0x47>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller;
reg = <0x0 0x80002000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x3>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
};
PERIPHERAL@ff380000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff380000 0x0 0x80000>;
};
PERIPHERAL@ff990000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff990000 0x0 0x10000>;
};
};
chosen {
bootargs = "earlycon clk_ignore_unused root=/dev/ram rw";
stdout-path = "serial0:115200n8";
#address-cells = <0x2>;
#size-cells = <0x1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
aliases {
ethernet0 = "/amba/ethernet@ff0e0000";
i2c0 = "/amba/i2c@ff030000";
serial0 = "/amba/serial@ff000000";
serial1 = "/amba/serial@ff010000";
spi0 = "/amba/spi@ff0f0000";
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x7ff00000>;
};
};
[-- Attachment #15: Type: text/plain, Size: 157 bytes --]
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next prev parent reply other threads:[~2018-10-15 12:27 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-09 10:59 Xen optimization Milan Boberic
2018-10-09 16:46 ` Dario Faggioli
2018-10-10 11:22 ` Milan Boberic
2018-10-10 11:25 ` Milan Boberic
2018-10-10 16:41 ` Meng Xu
2018-10-11 7:36 ` Milan Boberic
2018-10-11 12:17 ` Milan Boberic
2018-10-11 17:05 ` Dario Faggioli
2018-10-11 15:39 ` Meng Xu
2018-10-11 22:29 ` Stefano Stabellini
2018-10-12 15:33 ` Milan Boberic
2018-10-12 16:36 ` Julien Grall
2018-10-12 17:43 ` Stefano Stabellini
2018-10-13 16:01 ` Milan Boberic
2018-10-14 22:46 ` Stefano Stabellini
2018-10-15 12:27 ` Milan Boberic [this message]
2018-10-16 7:13 ` Stefano Stabellini
2018-10-15 8:14 ` Julien Grall
2018-10-15 12:50 ` Julien Grall
2018-10-15 13:01 ` Milan Boberic
2018-10-15 13:03 ` Julien Grall
2018-10-17 15:19 ` Milan Boberic
2018-10-19 21:02 ` Stefano Stabellini
2018-10-19 22:41 ` Dario Faggioli
2018-10-22 15:02 ` Milan Boberic
2018-10-22 17:52 ` Stefano Stabellini
2018-10-23 8:58 ` Milan Boberic
2018-10-24 0:24 ` Stefano Stabellini
2018-10-25 10:09 ` Milan Boberic
2018-10-25 11:30 ` Julien Grall
2018-10-25 12:36 ` Milan Boberic
2018-10-25 13:44 ` Dario Faggioli
2018-10-25 14:00 ` Julien Grall
2018-10-25 14:04 ` Julien Grall
2018-10-25 14:47 ` Milan Boberic
2018-10-25 14:51 ` Julien Grall
2018-10-25 16:18 ` Xen optimizationcy Stefano Stabellini
2018-10-25 11:09 ` Xen optimization Julien Grall
2018-10-25 16:15 ` Stefano Stabellini
2018-10-26 19:12 ` Julien Grall
2018-10-26 20:41 ` Stefano Stabellini
2018-10-29 12:29 ` Milan Boberic
2018-10-31 18:59 ` Julien Grall
2018-10-31 20:35 ` Milan Boberic
2018-10-31 21:16 ` Julien Grall
2018-11-01 20:20 ` Stefano Stabellini
2018-11-01 20:35 ` Julien Grall
2018-11-20 11:33 ` Andrii Anisov
2018-11-27 21:27 ` Stefano Stabellini
2018-11-29 8:19 ` Andrii Anisov
2018-12-10 10:58 ` Andrii Anisov
2018-12-10 11:54 ` Julien Grall
2018-12-10 12:23 ` Andrii Anisov
2018-12-11 12:27 ` Julien Grall
2018-12-11 16:56 ` Dario Faggioli
2018-12-12 9:39 ` Andrii Anisov
2018-12-12 17:10 ` Dario Faggioli
2018-12-12 17:32 ` Andrii Anisov
2018-12-12 17:59 ` Dario Faggioli
2018-12-13 7:48 ` Andrii Anisov
2018-12-11 18:39 ` Stefano Stabellini
2018-12-11 19:05 ` Julien Grall
2018-12-11 19:29 ` Stefano Stabellini
2018-12-12 9:46 ` Andrii Anisov
2018-12-12 10:41 ` Andrii Anisov
2018-12-12 17:39 ` Stefano Stabellini
2018-12-12 17:47 ` Andrii Anisov
2018-12-12 18:01 ` Stefano Stabellini
2018-12-12 9:34 ` Andrii Anisov
2018-11-07 13:14 ` Julien Grall
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