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From: Milan Boberic <milanboberic94@gmail.com>
To: julien.grall@arm.com
Cc: sstabellini@kernel.org, andrii_anisov@epam.com,
	stefano.stabellini@xilinx.com,
	Dario Faggioli <dfaggioli@suse.com>,
	Meng Xu <xumengpanda@gmail.com>,
	xen-devel@lists.xenproject.org, nd@arm.com
Subject: Re: Xen optimization
Date: Wed, 17 Oct 2018 17:19:47 +0200	[thread overview]
Message-ID: <CADJ6SV3sfqaXm8gvZDAx2wFY5_oiCf+mf0JynCGNrLBFkS-rVw@mail.gmail.com> (raw)
In-Reply-To: <21de0bb5-81f2-ca26-e2e0-916c20ab2c02@arm.com>

Hi,
>
> The device tree with everything seems to be system.dts, that was enough
> :-)  I don't need the dtsi files you used to build the final dts, I only
> need the one you use in uboot and for your guest.

 I wasn't sure so I sent everything, sorry for being bombarded with
all those files. :-)

> It looks like you set xen,passthrough correctly in system.dts for
> timer@ff110000, serial@ff010000, and gpio@ff0a0000.

Thank you for taking a look, now we are sure that passthrough works
correctly because there is no error during guest creation and there
are no prints of "DEBUG irq slow path".

> If you are not getting any errors anymore when creating your baremetal
> guest, then yes, it should be working passthrough. I would double-check
> that everything is working as expected using the DEBUG patch for Xen I
> suggested to you in the other email. You might even want to remove the
> "if" check and always print something for every interrupt of your guest
> just to get an idea of what's going on. See the attached patch.

When I apply this patch it prints forever:
(XEN) DEBUG virq=68 local=1
which is a good thing I guess because interrupts are being generated non-stop.

> Once everything is as expected I would change the frequency of the
> timer, because 1u is way too frequent. I think it should be at least
> 3us, more like 5us.

Okay, about this... I double checked my bare-metal application and
looks like interrupts weren't generated every 1 us. Maximum frequency
of interrupts is 8 us. I checked interrupt frequency with oscilloscope
just to be sure (toggling LED on/off when interrupts occur). So, when
I set:
- interrupts to be generated every 8 us I get jitter of 6 us
- interrupts to be generated every 10 us I get jitter of 3 us (after
2-3mins it jumps to 6 us)
- interrupts to be generated every 15 us jitter is the same as when
only bare-metal application runs on board (without Xen or any OS)

I want to remind you that bare-metal application that only blinks LED
with high speed gives 1 us jitter, somehow introducing frequent
interrupts causes this jitter, that's why I was unsecure about this
timer passthrough. Taking in consideration that you measured Xen
overhead of 1 us I have a feeling that I'm missing something, is there
anything else I could do to get better results except sched=null,
vwfi=native, hard vCPU pinning (1 vCPU on 1 pCPU) and passthrough (not
sure if it affects the jitter) ?
I'm forcing frequent interrupts because I'm testing to see if this
board with Xen on it could be used for real-time simulations,
real-time signal processing, etc. If I could get results like yours (1
us Xen overhead) of even better that would be great! BTW how did you
measure Xen's overhead?

> Keep in mind that jitter is about having
> deterministic IRQ latency, not about having extremely frequent
> interrupts.

Yes, but I want to see exactly where will I lose deterministic IRQ
latency which is extremely important in real-time signal processing.
So, what causes this jitter, are those Xen limits, ARM limits, etc? It
would be nice to know, I'll share all the results I get.

> I would also double check that you are not using any other devices or
> virtual interfaces in your baremetal app because that could negatively
> affect the numbers.

I checked the bare-metal app and I think there is no other devices
that bm app is using.

> Linux by default uses the virtual
> timer interface ("arm,armv8-timer", I would double check that the
> baremetal app is not doing the same -- you don't want to be using two
> timers when doing your measurements.

Hmm, I'm not sure how to check that, I could send bare-metal app if
that helps, it's created in Xilinx SDK 2017.4.
Also, should I move to Xilinx SDK 2018.2 because I'm using PetaLinux 2018.2 ?
I'm also using hardware description file for SDK that is created in
Vivado 2017.4.
Is all this could be a "not matching version" problem (I don't think
so because bm app works)?

Meng mentioned in some of his earlier posts:

> Even though the app. is the only one running on the CPU, the CPU may
> be used to handle other interrupts and its context (such as TLB and
> cache) might be flushed by other components. When these happen, the
> interrupt handling latency can vary a lot.

What do you think about this? I don't know how would I check this.

I also tried using default scheduler (removed sched=null and
vwfi=native) and jitter is 10 us when interrupt is generated every 10
us.

Thanks in advance!

Milan

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  reply	other threads:[~2018-10-17 15:20 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-09 10:59 Xen optimization Milan Boberic
2018-10-09 16:46 ` Dario Faggioli
2018-10-10 11:22   ` Milan Boberic
2018-10-10 11:25     ` Milan Boberic
2018-10-10 16:41     ` Meng Xu
2018-10-11  7:36       ` Milan Boberic
2018-10-11 12:17         ` Milan Boberic
2018-10-11 17:05           ` Dario Faggioli
2018-10-11 15:39         ` Meng Xu
2018-10-11 22:29         ` Stefano Stabellini
2018-10-12 15:33           ` Milan Boberic
2018-10-12 16:36             ` Julien Grall
2018-10-12 17:43             ` Stefano Stabellini
2018-10-13 16:01               ` Milan Boberic
2018-10-14 22:46                 ` Stefano Stabellini
2018-10-15 12:27                   ` Milan Boberic
2018-10-16  7:13                     ` Stefano Stabellini
2018-10-15  8:14                 ` Julien Grall
2018-10-15 12:50                   ` Julien Grall
2018-10-15 13:01                     ` Milan Boberic
2018-10-15 13:03                       ` Julien Grall
2018-10-17 15:19                         ` Milan Boberic [this message]
2018-10-19 21:02                           ` Stefano Stabellini
2018-10-19 22:41                             ` Dario Faggioli
2018-10-22 15:02                               ` Milan Boberic
2018-10-22 17:52                                 ` Stefano Stabellini
2018-10-23  8:58                                   ` Milan Boberic
2018-10-24  0:24                                     ` Stefano Stabellini
2018-10-25 10:09                                       ` Milan Boberic
2018-10-25 11:30                                         ` Julien Grall
2018-10-25 12:36                                           ` Milan Boberic
2018-10-25 13:44                                             ` Dario Faggioli
2018-10-25 14:00                                               ` Julien Grall
2018-10-25 14:04                                             ` Julien Grall
2018-10-25 14:47                                               ` Milan Boberic
2018-10-25 14:51                                                 ` Julien Grall
2018-10-25 16:18                                                   ` Xen optimizationcy Stefano Stabellini
2018-10-25 11:09                                       ` Xen optimization Julien Grall
2018-10-25 16:15                                         ` Stefano Stabellini
2018-10-26 19:12                                           ` Julien Grall
2018-10-26 20:41                                             ` Stefano Stabellini
2018-10-29 12:29                                               ` Milan Boberic
2018-10-31 18:59                                                 ` Julien Grall
2018-10-31 20:35                                                   ` Milan Boberic
2018-10-31 21:16                                                     ` Julien Grall
2018-11-01 20:20                                                       ` Stefano Stabellini
2018-11-01 20:35                                                         ` Julien Grall
2018-11-20 11:33                                                         ` Andrii Anisov
2018-11-27 21:27                                                           ` Stefano Stabellini
2018-11-29  8:19                                                             ` Andrii Anisov
2018-12-10 10:58                                                             ` Andrii Anisov
2018-12-10 11:54                                                               ` Julien Grall
2018-12-10 12:23                                                                 ` Andrii Anisov
2018-12-11 12:27                                                                   ` Julien Grall
2018-12-11 16:56                                                                     ` Dario Faggioli
2018-12-12  9:39                                                                       ` Andrii Anisov
2018-12-12 17:10                                                                         ` Dario Faggioli
2018-12-12 17:32                                                                           ` Andrii Anisov
2018-12-12 17:59                                                                             ` Dario Faggioli
2018-12-13  7:48                                                                               ` Andrii Anisov
2018-12-11 18:39                                                                     ` Stefano Stabellini
2018-12-11 19:05                                                                       ` Julien Grall
2018-12-11 19:29                                                                         ` Stefano Stabellini
2018-12-12  9:46                                                                           ` Andrii Anisov
2018-12-12 10:41                                                                             ` Andrii Anisov
2018-12-12 17:39                                                                               ` Stefano Stabellini
2018-12-12 17:47                                                                                 ` Andrii Anisov
2018-12-12 18:01                                                                                   ` Stefano Stabellini
2018-12-12  9:34                                                                     ` Andrii Anisov
2018-11-07 13:14   ` Julien Grall

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