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* [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399
@ 2016-07-27 14:10 ` Caesar Wang
  0 siblings, 0 replies; 10+ messages in thread
From: Caesar Wang @ 2016-07-27 14:10 UTC (permalink / raw)
  To: Eduardo Valentin
  Cc: smbarber, dianders, briannorris, Rocky Hao, Caesar Wang,
	Zhang Rui, Heiko Stuebner, linux-pm, linux-arm-kernel,
	linux-rockchip, linux-kernel

From: Rocky Hao <rocky.hao@rock-chips.com>

Due to the voltage ripple, the sensing data of the tsadc is not accurate.
And in this patch, the bandgap feature is enhanced to remove the voltage
ripple, and then the tsadc can sense the temperature more precisely.

Obsolete codes are removed as well.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
---

 drivers/thermal/rockchip_thermal.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index db5ecc5..a90423d 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -222,10 +222,10 @@ struct rockchip_thermal_data {
 #define GRF_TSADC_TESTBIT_L			0x0e648
 #define GRF_TSADC_TESTBIT_H			0x0e64c
 
-#define GRF_TSADC_TSEN_PD_ON			(0x30003 << 0)
-#define GRF_TSADC_TSEN_PD_OFF			(0x30000 << 0)
 #define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
 #define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
+#define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
+#define GRF_TSADC_VCM_EN_H			(0x10001 << 7)
 
 /**
  * struct tsadc_table - code to temperature conversion table
@@ -567,9 +567,10 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 			       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 
 	} else {
-		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
-		mdelay(10);
-		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
+		/* Enable the voltage common mode feature */
+		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
+		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
+
 		usleep_range(15, 100); /* The spec note says at least 15 us */
 		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399
@ 2016-07-27 14:10 ` Caesar Wang
  0 siblings, 0 replies; 10+ messages in thread
From: Caesar Wang @ 2016-07-27 14:10 UTC (permalink / raw)
  To: linux-arm-kernel

From: Rocky Hao <rocky.hao@rock-chips.com>

Due to the voltage ripple, the sensing data of the tsadc is not accurate.
And in this patch, the bandgap feature is enhanced to remove the voltage
ripple, and then the tsadc can sense the temperature more precisely.

Obsolete codes are removed as well.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm at vger.kernel.org
---

 drivers/thermal/rockchip_thermal.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index db5ecc5..a90423d 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -222,10 +222,10 @@ struct rockchip_thermal_data {
 #define GRF_TSADC_TESTBIT_L			0x0e648
 #define GRF_TSADC_TESTBIT_H			0x0e64c
 
-#define GRF_TSADC_TSEN_PD_ON			(0x30003 << 0)
-#define GRF_TSADC_TSEN_PD_OFF			(0x30000 << 0)
 #define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
 #define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
+#define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
+#define GRF_TSADC_VCM_EN_H			(0x10001 << 7)
 
 /**
  * struct tsadc_table - code to temperature conversion table
@@ -567,9 +567,10 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 			       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 
 	} else {
-		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
-		mdelay(10);
-		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
+		/* Enable the voltage common mode feature */
+		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
+		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
+
 		usleep_range(15, 100); /* The spec note says@least 15 us */
 		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period
  2016-07-27 14:10 ` Caesar Wang
@ 2016-07-27 14:10   ` Caesar Wang
  -1 siblings, 0 replies; 10+ messages in thread
From: Caesar Wang @ 2016-07-27 14:10 UTC (permalink / raw)
  To: Eduardo Valentin
  Cc: smbarber, dianders, briannorris, Rocky Hao, Caesar Wang,
	Zhang Rui, Heiko Stuebner, linux-pm, linux-arm-kernel,
	linux-rockchip, linux-kernel

From: Rocky Hao <rocky.hao@rock-chips.com>

In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org

---

 drivers/thermal/rockchip_thermal.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index a90423d..1f165c9 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -213,8 +213,8 @@ struct rockchip_thermal_data {
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* 250ms */
 #define TSADCV2_AUTO_PERIOD_HT_TIME		50  /* 50ms */
-#define TSADCV3_AUTO_PERIOD_TIME		187500 /* 250ms */
-#define TSADCV3_AUTO_PERIOD_HT_TIME		37500  /* 50ms */
+#define TSADCV3_AUTO_PERIOD_TIME		1875 /* 2.5ms */
+#define TSADCV3_AUTO_PERIOD_HT_TIME		1875 /* 2.5ms */
 
 #define TSADCV2_USER_INTER_PD_SOC		0x340 /* 13 clocks */
 
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period
@ 2016-07-27 14:10   ` Caesar Wang
  0 siblings, 0 replies; 10+ messages in thread
From: Caesar Wang @ 2016-07-27 14:10 UTC (permalink / raw)
  To: linux-arm-kernel

From: Rocky Hao <rocky.hao@rock-chips.com>

In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm at vger.kernel.org

---

 drivers/thermal/rockchip_thermal.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index a90423d..1f165c9 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -213,8 +213,8 @@ struct rockchip_thermal_data {
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* 250ms */
 #define TSADCV2_AUTO_PERIOD_HT_TIME		50  /* 50ms */
-#define TSADCV3_AUTO_PERIOD_TIME		187500 /* 250ms */
-#define TSADCV3_AUTO_PERIOD_HT_TIME		37500  /* 50ms */
+#define TSADCV3_AUTO_PERIOD_TIME		1875 /* 2.5ms */
+#define TSADCV3_AUTO_PERIOD_HT_TIME		1875 /* 2.5ms */
 
 #define TSADCV2_USER_INTER_PD_SOC		0x340 /* 13 clocks */
 
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399
  2016-07-27 14:10 ` Caesar Wang
@ 2016-07-28 21:53   ` Stephen Barber
  -1 siblings, 0 replies; 10+ messages in thread
From: Stephen Barber @ 2016-07-28 21:53 UTC (permalink / raw)
  To: Caesar Wang
  Cc: Eduardo Valentin, Douglas Anderson, Brian Norris, Rocky Hao,
	Zhang Rui, Heiko Stuebner, linux-pm, linux-arm-kernel,
	linux-rockchip, linux-kernel

On Wed, Jul 27, 2016 at 7:10 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
>
> Due to the voltage ripple, the sensing data of the tsadc is not accurate.
> And in this patch, the bandgap feature is enhanced to remove the voltage
> ripple, and then the tsadc can sense the temperature more precisely.
>
> Obsolete codes are removed as well.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm@vger.kernel.org
> ---
>
>  drivers/thermal/rockchip_thermal.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index db5ecc5..a90423d 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -222,10 +222,10 @@ struct rockchip_thermal_data {
>  #define GRF_TSADC_TESTBIT_L                    0x0e648
>  #define GRF_TSADC_TESTBIT_H                    0x0e64c
>
> -#define GRF_TSADC_TSEN_PD_ON                   (0x30003 << 0)
> -#define GRF_TSADC_TSEN_PD_OFF                  (0x30000 << 0)
>  #define GRF_SARADC_TESTBIT_ON                  (0x10001 << 2)
>  #define GRF_TSADC_TESTBIT_H_ON                 (0x10001 << 2)
> +#define GRF_TSADC_VCM_EN_L                     (0x10001 << 7)
> +#define GRF_TSADC_VCM_EN_H                     (0x10001 << 7)
>
>  /**
>   * struct tsadc_table - code to temperature conversion table
> @@ -567,9 +567,10 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
>                                regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
>
>         } else {
> -               regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
> -               mdelay(10);
> -               regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
> +               /* Enable the voltage common mode feature */
> +               regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
> +               regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
> +
>                 usleep_range(15, 100); /* The spec note says at least 15 us */
>                 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
>                 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
> --
> 1.9.1
>

Tested-by: Stephen Barber <smbarber@chromium.org>

Steve

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399
@ 2016-07-28 21:53   ` Stephen Barber
  0 siblings, 0 replies; 10+ messages in thread
From: Stephen Barber @ 2016-07-28 21:53 UTC (permalink / raw)
  To: linux-arm-kernel

On Wed, Jul 27, 2016 at 7:10 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
>
> Due to the voltage ripple, the sensing data of the tsadc is not accurate.
> And in this patch, the bandgap feature is enhanced to remove the voltage
> ripple, and then the tsadc can sense the temperature more precisely.
>
> Obsolete codes are removed as well.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm at vger.kernel.org
> ---
>
>  drivers/thermal/rockchip_thermal.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index db5ecc5..a90423d 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -222,10 +222,10 @@ struct rockchip_thermal_data {
>  #define GRF_TSADC_TESTBIT_L                    0x0e648
>  #define GRF_TSADC_TESTBIT_H                    0x0e64c
>
> -#define GRF_TSADC_TSEN_PD_ON                   (0x30003 << 0)
> -#define GRF_TSADC_TSEN_PD_OFF                  (0x30000 << 0)
>  #define GRF_SARADC_TESTBIT_ON                  (0x10001 << 2)
>  #define GRF_TSADC_TESTBIT_H_ON                 (0x10001 << 2)
> +#define GRF_TSADC_VCM_EN_L                     (0x10001 << 7)
> +#define GRF_TSADC_VCM_EN_H                     (0x10001 << 7)
>
>  /**
>   * struct tsadc_table - code to temperature conversion table
> @@ -567,9 +567,10 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
>                                regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
>
>         } else {
> -               regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
> -               mdelay(10);
> -               regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
> +               /* Enable the voltage common mode feature */
> +               regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
> +               regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
> +
>                 usleep_range(15, 100); /* The spec note says at least 15 us */
>                 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
>                 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
> --
> 1.9.1
>

Tested-by: Stephen Barber <smbarber@chromium.org>

Steve

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period
  2016-07-27 14:10   ` Caesar Wang
@ 2016-07-28 21:53     ` Stephen Barber
  -1 siblings, 0 replies; 10+ messages in thread
From: Stephen Barber @ 2016-07-28 21:53 UTC (permalink / raw)
  To: Caesar Wang
  Cc: Eduardo Valentin, Douglas Anderson, Brian Norris, Rocky Hao,
	Zhang Rui, Heiko Stuebner, linux-pm, linux-arm-kernel,
	linux-rockchip, linux-kernel

On Wed, Jul 27, 2016 at 7:10 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
>
> In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
> is too big for soc tempeture control. Setting 2.5 ms will speed up
> temperature accessing speed but introduce no more cpu's computing overhead.
> We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
> because normal temperature update speed is also our consern in IPA.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm@vger.kernel.org
>
> ---
>
>  drivers/thermal/rockchip_thermal.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index a90423d..1f165c9 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -213,8 +213,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>  #define TSADCV2_AUTO_PERIOD_TIME               250 /* 250ms */
>  #define TSADCV2_AUTO_PERIOD_HT_TIME            50  /* 50ms */
> -#define TSADCV3_AUTO_PERIOD_TIME               187500 /* 250ms */
> -#define TSADCV3_AUTO_PERIOD_HT_TIME            37500  /* 50ms */
> +#define TSADCV3_AUTO_PERIOD_TIME               1875 /* 2.5ms */
> +#define TSADCV3_AUTO_PERIOD_HT_TIME            1875 /* 2.5ms */
>
>  #define TSADCV2_USER_INTER_PD_SOC              0x340 /* 13 clocks */
>
> --
> 1.9.1
>


Tested-by: Stephen Barber <smbarber@chromium.org>

Steve

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period
@ 2016-07-28 21:53     ` Stephen Barber
  0 siblings, 0 replies; 10+ messages in thread
From: Stephen Barber @ 2016-07-28 21:53 UTC (permalink / raw)
  To: linux-arm-kernel

On Wed, Jul 27, 2016 at 7:10 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
>
> In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
> is too big for soc tempeture control. Setting 2.5 ms will speed up
> temperature accessing speed but introduce no more cpu's computing overhead.
> We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
> because normal temperature update speed is also our consern in IPA.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm at vger.kernel.org
>
> ---
>
>  drivers/thermal/rockchip_thermal.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index a90423d..1f165c9 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -213,8 +213,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>  #define TSADCV2_AUTO_PERIOD_TIME               250 /* 250ms */
>  #define TSADCV2_AUTO_PERIOD_HT_TIME            50  /* 50ms */
> -#define TSADCV3_AUTO_PERIOD_TIME               187500 /* 250ms */
> -#define TSADCV3_AUTO_PERIOD_HT_TIME            37500  /* 50ms */
> +#define TSADCV3_AUTO_PERIOD_TIME               1875 /* 2.5ms */
> +#define TSADCV3_AUTO_PERIOD_HT_TIME            1875 /* 2.5ms */
>
>  #define TSADCV2_USER_INTER_PD_SOC              0x340 /* 13 clocks */
>
> --
> 1.9.1
>


Tested-by: Stephen Barber <smbarber@chromium.org>

Steve

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399
  2016-07-27 14:10 ` Caesar Wang
@ 2016-08-19 13:09   ` Zhang Rui
  -1 siblings, 0 replies; 10+ messages in thread
From: Zhang Rui @ 2016-08-19 13:09 UTC (permalink / raw)
  To: Caesar Wang, Eduardo Valentin
  Cc: smbarber, dianders, briannorris, Rocky Hao, Heiko Stuebner,
	linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel

On 三, 2016-07-27 at 22:10 +0800, Caesar Wang wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
> 
> Due to the voltage ripple, the sensing data of the tsadc is not
> accurate.
> And in this patch, the bandgap feature is enhanced to remove the
> voltage
> ripple, and then the tsadc can sense the temperature more precisely.
> 
> Obsolete codes are removed as well.
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm@vger.kernel.org

Both patches applied and queued for 4.9.

thanks,
rui
> ---
> 
>  drivers/thermal/rockchip_thermal.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c
> b/drivers/thermal/rockchip_thermal.c
> index db5ecc5..a90423d 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -222,10 +222,10 @@ struct rockchip_thermal_data {
>  #define GRF_TSADC_TESTBIT_L			0x0e648
>  #define GRF_TSADC_TESTBIT_H			0x0e64c
>  
> -#define GRF_TSADC_TSEN_PD_ON			(0x30003 << 0)
> -#define GRF_TSADC_TSEN_PD_OFF			(0x30000 << 0)
>  #define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
>  #define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
> +#define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
> +#define GRF_TSADC_VCM_EN_H			(0x10001 << 7)
>  
>  /**
>   * struct tsadc_table - code to temperature conversion table
> @@ -567,9 +567,10 @@ static void rk_tsadcv3_initialize(struct regmap
> *grf, void __iomem *regs,
>  			       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
>  
>  	} else {
> -		regmap_write(grf, GRF_TSADC_TESTBIT_L,
> GRF_TSADC_TSEN_PD_ON);
> -		mdelay(10);
> -		regmap_write(grf, GRF_TSADC_TESTBIT_L,
> GRF_TSADC_TSEN_PD_OFF);
> +		/* Enable the voltage common mode feature */
> +		regmap_write(grf, GRF_TSADC_TESTBIT_L,
> GRF_TSADC_VCM_EN_L);
> +		regmap_write(grf, GRF_TSADC_TESTBIT_H,
> GRF_TSADC_VCM_EN_H);
> +
>  		usleep_range(15, 100); /* The spec note says at
> least 15 us */
>  		regmap_write(grf, GRF_SARADC_TESTBIT,
> GRF_SARADC_TESTBIT_ON);
>  		regmap_write(grf, GRF_TSADC_TESTBIT_H,
> GRF_TSADC_TESTBIT_H_ON);

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399
@ 2016-08-19 13:09   ` Zhang Rui
  0 siblings, 0 replies; 10+ messages in thread
From: Zhang Rui @ 2016-08-19 13:09 UTC (permalink / raw)
  To: linux-arm-kernel

On ?, 2016-07-27 at 22:10 +0800, Caesar Wang wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
> 
> Due to the voltage ripple, the sensing data of the tsadc is not
> accurate.
> And in this patch, the bandgap feature is enhanced to remove the
> voltage
> ripple, and then the tsadc can sense the temperature more precisely.
> 
> Obsolete codes are removed as well.
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm at vger.kernel.org

Both patches applied and queued for 4.9.

thanks,
rui
> ---
> 
> ?drivers/thermal/rockchip_thermal.c | 11 ++++++-----
> ?1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c
> b/drivers/thermal/rockchip_thermal.c
> index db5ecc5..a90423d 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -222,10 +222,10 @@ struct rockchip_thermal_data {
> ?#define GRF_TSADC_TESTBIT_L			0x0e648
> ?#define GRF_TSADC_TESTBIT_H			0x0e64c
> ?
> -#define GRF_TSADC_TSEN_PD_ON			(0x30003 << 0)
> -#define GRF_TSADC_TSEN_PD_OFF			(0x30000 << 0)
> ?#define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
> ?#define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
> +#define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
> +#define GRF_TSADC_VCM_EN_H			(0x10001 << 7)
> ?
> ?/**
> ? * struct tsadc_table - code to temperature conversion table
> @@ -567,9 +567,10 @@ static void rk_tsadcv3_initialize(struct regmap
> *grf, void __iomem *regs,
> ?			???????regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
> ?
> ?	} else {
> -		regmap_write(grf, GRF_TSADC_TESTBIT_L,
> GRF_TSADC_TSEN_PD_ON);
> -		mdelay(10);
> -		regmap_write(grf, GRF_TSADC_TESTBIT_L,
> GRF_TSADC_TSEN_PD_OFF);
> +		/* Enable the voltage common mode feature */
> +		regmap_write(grf, GRF_TSADC_TESTBIT_L,
> GRF_TSADC_VCM_EN_L);
> +		regmap_write(grf, GRF_TSADC_TESTBIT_H,
> GRF_TSADC_VCM_EN_H);
> +
> ?		usleep_range(15, 100); /* The spec note says at
> least 15 us */
> ?		regmap_write(grf, GRF_SARADC_TESTBIT,
> GRF_SARADC_TESTBIT_ON);
> ?		regmap_write(grf, GRF_TSADC_TESTBIT_H,
> GRF_TSADC_TESTBIT_H_ON);

^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-08-19 13:09 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-07-27 14:10 [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399 Caesar Wang
2016-07-27 14:10 ` Caesar Wang
2016-07-27 14:10 ` [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period Caesar Wang
2016-07-27 14:10   ` Caesar Wang
2016-07-28 21:53   ` Stephen Barber
2016-07-28 21:53     ` Stephen Barber
2016-07-28 21:53 ` [PATCH 1/2] thermal: rockchip: enhance the tsadc's bandgap feature for rk3399 Stephen Barber
2016-07-28 21:53   ` Stephen Barber
2016-08-19 13:09 ` Zhang Rui
2016-08-19 13:09   ` Zhang Rui

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