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* [PATCH] drm/amd/powerplay: Fix enum mismatch
@ 2018-02-07 18:58 ` Matthias Kaehlcke
  0 siblings, 0 replies; 5+ messages in thread
From: Matthias Kaehlcke @ 2018-02-07 18:58 UTC (permalink / raw)
  To: Alex Deucher, Christian König, David Zhou, David Airlie, Rex Zhu
  Cc: amd-gfx, dri-devel, linux-kernel, Guenter Roeck, Justin TerAvest,
	Craig Bergstrom, Matthias Kaehlcke

In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
amd_powergating_stat) and vice versa. Both constants have the same
value, so this doesn't cause any problems, but we still want to pass
the correct type.

Fixing the mismatch resolves multiple warnings like this when building
with clang:

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
  error: implicit conversion from enumeration type 'enum
  amd_powergating_state' to different enumeration type 'enum
  amd_clockgating_state' [-Werror,-Wenum-conversion]
    AMD_PG_STATE_UNGATE);

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c   | 8 ++++----
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
index 44de0874629f..416abebb8b86 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
@@ -166,10 +166,10 @@ void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
 		cz_dpm_powerup_uvd(hwmgr);
 		cgs_set_clockgating_state(hwmgr->device,
 						AMD_IP_BLOCK_TYPE_UVD,
-						AMD_PG_STATE_UNGATE);
+						AMD_CG_STATE_UNGATE);
 		cgs_set_powergating_state(hwmgr->device,
 						AMD_IP_BLOCK_TYPE_UVD,
-						AMD_CG_STATE_UNGATE);
+						AMD_PG_STATE_UNGATE);
 		cz_dpm_update_uvd_dpm(hwmgr, false);
 	}
 
@@ -197,11 +197,11 @@ void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
 		cgs_set_clockgating_state(
 					hwmgr->device,
 					AMD_IP_BLOCK_TYPE_VCE,
-					AMD_PG_STATE_UNGATE);
+					AMD_CG_STATE_UNGATE);
 		cgs_set_powergating_state(
 					hwmgr->device,
 					AMD_IP_BLOCK_TYPE_VCE,
-					AMD_CG_STATE_UNGATE);
+					AMD_PG_STATE_UNGATE);
 		cz_dpm_update_vce_dpm(hwmgr);
 		cz_enable_disable_vce_dpm(hwmgr, true);
 	}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
index 69a0678ace98..402aa9cb1f78 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
@@ -162,7 +162,7 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
 				AMD_CG_STATE_UNGATE);
 		cgs_set_powergating_state(hwmgr->device,
 						AMD_IP_BLOCK_TYPE_UVD,
-						AMD_CG_STATE_UNGATE);
+						AMD_PG_STATE_UNGATE);
 		smu7_update_uvd_dpm(hwmgr, false);
 	}
 
-- 
2.16.0.rc1.238.g530d649a79-goog

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH] drm/amd/powerplay: Fix enum mismatch
@ 2018-02-07 18:58 ` Matthias Kaehlcke
  0 siblings, 0 replies; 5+ messages in thread
From: Matthias Kaehlcke @ 2018-02-07 18:58 UTC (permalink / raw)
  To: Alex Deucher, Christian König, David Zhou, David Airlie, Rex Zhu
  Cc: Craig Bergstrom, linux-kernel, dri-devel, Justin TerAvest,
	Matthias Kaehlcke, amd-gfx, Guenter Roeck

In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
amd_powergating_stat) and vice versa. Both constants have the same
value, so this doesn't cause any problems, but we still want to pass
the correct type.

Fixing the mismatch resolves multiple warnings like this when building
with clang:

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
  error: implicit conversion from enumeration type 'enum
  amd_powergating_state' to different enumeration type 'enum
  amd_clockgating_state' [-Werror,-Wenum-conversion]
    AMD_PG_STATE_UNGATE);

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c   | 8 ++++----
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
index 44de0874629f..416abebb8b86 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
@@ -166,10 +166,10 @@ void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
 		cz_dpm_powerup_uvd(hwmgr);
 		cgs_set_clockgating_state(hwmgr->device,
 						AMD_IP_BLOCK_TYPE_UVD,
-						AMD_PG_STATE_UNGATE);
+						AMD_CG_STATE_UNGATE);
 		cgs_set_powergating_state(hwmgr->device,
 						AMD_IP_BLOCK_TYPE_UVD,
-						AMD_CG_STATE_UNGATE);
+						AMD_PG_STATE_UNGATE);
 		cz_dpm_update_uvd_dpm(hwmgr, false);
 	}
 
@@ -197,11 +197,11 @@ void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
 		cgs_set_clockgating_state(
 					hwmgr->device,
 					AMD_IP_BLOCK_TYPE_VCE,
-					AMD_PG_STATE_UNGATE);
+					AMD_CG_STATE_UNGATE);
 		cgs_set_powergating_state(
 					hwmgr->device,
 					AMD_IP_BLOCK_TYPE_VCE,
-					AMD_CG_STATE_UNGATE);
+					AMD_PG_STATE_UNGATE);
 		cz_dpm_update_vce_dpm(hwmgr);
 		cz_enable_disable_vce_dpm(hwmgr, true);
 	}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
index 69a0678ace98..402aa9cb1f78 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
@@ -162,7 +162,7 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
 				AMD_CG_STATE_UNGATE);
 		cgs_set_powergating_state(hwmgr->device,
 						AMD_IP_BLOCK_TYPE_UVD,
-						AMD_CG_STATE_UNGATE);
+						AMD_PG_STATE_UNGATE);
 		smu7_update_uvd_dpm(hwmgr, false);
 	}
 
-- 
2.16.0.rc1.238.g530d649a79-goog

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/amd/powerplay: Fix enum mismatch
  2018-02-07 18:58 ` Matthias Kaehlcke
  (?)
@ 2018-02-07 19:01 ` Guenter Roeck
  2018-02-07 19:06     ` Alex Deucher
  -1 siblings, 1 reply; 5+ messages in thread
From: Guenter Roeck @ 2018-02-07 19:01 UTC (permalink / raw)
  To: Matthias Kaehlcke
  Cc: Alex Deucher, Christian König, David Zhou, David Airlie,
	Rex Zhu, amd-gfx list, Maling list - DRI developers,
	linux-kernel, Guenter Roeck, Justin TerAvest, Craig Bergstrom

On Wed, Feb 7, 2018 at 10:58 AM, Matthias Kaehlcke <mka@chromium.org> wrote:
> In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
> amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
> amd_powergating_stat) and vice versa. Both constants have the same
> value, so this doesn't cause any problems, but we still want to pass
> the correct type.
>
> Fixing the mismatch resolves multiple warnings like this when building
> with clang:
>
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
>   error: implicit conversion from enumeration type 'enum
>   amd_powergating_state' to different enumeration type 'enum
>   amd_clockgating_state' [-Werror,-Wenum-conversion]
>     AMD_PG_STATE_UNGATE);
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>

Reviewed-by: Guenter Roeck <groeck@chromium.org>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c   | 8 ++++----
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
>  2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
> index 44de0874629f..416abebb8b86 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
> @@ -166,10 +166,10 @@ void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
>                 cz_dpm_powerup_uvd(hwmgr);
>                 cgs_set_clockgating_state(hwmgr->device,
>                                                 AMD_IP_BLOCK_TYPE_UVD,
> -                                               AMD_PG_STATE_UNGATE);
> +                                               AMD_CG_STATE_UNGATE);
>                 cgs_set_powergating_state(hwmgr->device,
>                                                 AMD_IP_BLOCK_TYPE_UVD,
> -                                               AMD_CG_STATE_UNGATE);
> +                                               AMD_PG_STATE_UNGATE);
>                 cz_dpm_update_uvd_dpm(hwmgr, false);
>         }
>
> @@ -197,11 +197,11 @@ void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
>                 cgs_set_clockgating_state(
>                                         hwmgr->device,
>                                         AMD_IP_BLOCK_TYPE_VCE,
> -                                       AMD_PG_STATE_UNGATE);
> +                                       AMD_CG_STATE_UNGATE);
>                 cgs_set_powergating_state(
>                                         hwmgr->device,
>                                         AMD_IP_BLOCK_TYPE_VCE,
> -                                       AMD_CG_STATE_UNGATE);
> +                                       AMD_PG_STATE_UNGATE);
>                 cz_dpm_update_vce_dpm(hwmgr);
>                 cz_enable_disable_vce_dpm(hwmgr, true);
>         }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> index 69a0678ace98..402aa9cb1f78 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> @@ -162,7 +162,7 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
>                                 AMD_CG_STATE_UNGATE);
>                 cgs_set_powergating_state(hwmgr->device,
>                                                 AMD_IP_BLOCK_TYPE_UVD,
> -                                               AMD_CG_STATE_UNGATE);
> +                                               AMD_PG_STATE_UNGATE);
>                 smu7_update_uvd_dpm(hwmgr, false);
>         }
>
> --
> 2.16.0.rc1.238.g530d649a79-goog
>

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/amd/powerplay: Fix enum mismatch
  2018-02-07 19:01 ` Guenter Roeck
@ 2018-02-07 19:06     ` Alex Deucher
  0 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2018-02-07 19:06 UTC (permalink / raw)
  To: Guenter Roeck
  Cc: Matthias Kaehlcke, David Zhou, Craig Bergstrom, Justin TerAvest,
	David Airlie, linux-kernel, amd-gfx list, Guenter Roeck,
	Maling list - DRI developers, Alex Deucher, Rex Zhu,
	Christian König

On Wed, Feb 7, 2018 at 2:01 PM, Guenter Roeck <groeck@google.com> wrote:
> On Wed, Feb 7, 2018 at 10:58 AM, Matthias Kaehlcke <mka@chromium.org> wrote:
>> In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
>> amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
>> amd_powergating_stat) and vice versa. Both constants have the same
>> value, so this doesn't cause any problems, but we still want to pass
>> the correct type.
>>
>> Fixing the mismatch resolves multiple warnings like this when building
>> with clang:
>>
>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
>>   error: implicit conversion from enumeration type 'enum
>>   amd_powergating_state' to different enumeration type 'enum
>>   amd_clockgating_state' [-Werror,-Wenum-conversion]
>>     AMD_PG_STATE_UNGATE);
>>
>> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
>
> Reviewed-by: Guenter Roeck <groeck@chromium.org>

Applied.  thanks!

Alex

>
>> ---
>>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c   | 8 ++++----
>>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
>>  2 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
>> index 44de0874629f..416abebb8b86 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
>> @@ -166,10 +166,10 @@ void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
>>                 cz_dpm_powerup_uvd(hwmgr);
>>                 cgs_set_clockgating_state(hwmgr->device,
>>                                                 AMD_IP_BLOCK_TYPE_UVD,
>> -                                               AMD_PG_STATE_UNGATE);
>> +                                               AMD_CG_STATE_UNGATE);
>>                 cgs_set_powergating_state(hwmgr->device,
>>                                                 AMD_IP_BLOCK_TYPE_UVD,
>> -                                               AMD_CG_STATE_UNGATE);
>> +                                               AMD_PG_STATE_UNGATE);
>>                 cz_dpm_update_uvd_dpm(hwmgr, false);
>>         }
>>
>> @@ -197,11 +197,11 @@ void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
>>                 cgs_set_clockgating_state(
>>                                         hwmgr->device,
>>                                         AMD_IP_BLOCK_TYPE_VCE,
>> -                                       AMD_PG_STATE_UNGATE);
>> +                                       AMD_CG_STATE_UNGATE);
>>                 cgs_set_powergating_state(
>>                                         hwmgr->device,
>>                                         AMD_IP_BLOCK_TYPE_VCE,
>> -                                       AMD_CG_STATE_UNGATE);
>> +                                       AMD_PG_STATE_UNGATE);
>>                 cz_dpm_update_vce_dpm(hwmgr);
>>                 cz_enable_disable_vce_dpm(hwmgr, true);
>>         }
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
>> index 69a0678ace98..402aa9cb1f78 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
>> @@ -162,7 +162,7 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
>>                                 AMD_CG_STATE_UNGATE);
>>                 cgs_set_powergating_state(hwmgr->device,
>>                                                 AMD_IP_BLOCK_TYPE_UVD,
>> -                                               AMD_CG_STATE_UNGATE);
>> +                                               AMD_PG_STATE_UNGATE);
>>                 smu7_update_uvd_dpm(hwmgr, false);
>>         }
>>
>> --
>> 2.16.0.rc1.238.g530d649a79-goog
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/amd/powerplay: Fix enum mismatch
@ 2018-02-07 19:06     ` Alex Deucher
  0 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2018-02-07 19:06 UTC (permalink / raw)
  To: Guenter Roeck
  Cc: Craig Bergstrom, David Airlie, linux-kernel, amd-gfx list,
	Justin TerAvest, Matthias Kaehlcke, Maling list - DRI developers,
	Guenter Roeck, Alex Deucher, Rex Zhu, Christian König

On Wed, Feb 7, 2018 at 2:01 PM, Guenter Roeck <groeck@google.com> wrote:
> On Wed, Feb 7, 2018 at 10:58 AM, Matthias Kaehlcke <mka@chromium.org> wrote:
>> In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
>> amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
>> amd_powergating_stat) and vice versa. Both constants have the same
>> value, so this doesn't cause any problems, but we still want to pass
>> the correct type.
>>
>> Fixing the mismatch resolves multiple warnings like this when building
>> with clang:
>>
>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
>>   error: implicit conversion from enumeration type 'enum
>>   amd_powergating_state' to different enumeration type 'enum
>>   amd_clockgating_state' [-Werror,-Wenum-conversion]
>>     AMD_PG_STATE_UNGATE);
>>
>> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
>
> Reviewed-by: Guenter Roeck <groeck@chromium.org>

Applied.  thanks!

Alex

>
>> ---
>>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c   | 8 ++++----
>>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
>>  2 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
>> index 44de0874629f..416abebb8b86 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
>> @@ -166,10 +166,10 @@ void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
>>                 cz_dpm_powerup_uvd(hwmgr);
>>                 cgs_set_clockgating_state(hwmgr->device,
>>                                                 AMD_IP_BLOCK_TYPE_UVD,
>> -                                               AMD_PG_STATE_UNGATE);
>> +                                               AMD_CG_STATE_UNGATE);
>>                 cgs_set_powergating_state(hwmgr->device,
>>                                                 AMD_IP_BLOCK_TYPE_UVD,
>> -                                               AMD_CG_STATE_UNGATE);
>> +                                               AMD_PG_STATE_UNGATE);
>>                 cz_dpm_update_uvd_dpm(hwmgr, false);
>>         }
>>
>> @@ -197,11 +197,11 @@ void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
>>                 cgs_set_clockgating_state(
>>                                         hwmgr->device,
>>                                         AMD_IP_BLOCK_TYPE_VCE,
>> -                                       AMD_PG_STATE_UNGATE);
>> +                                       AMD_CG_STATE_UNGATE);
>>                 cgs_set_powergating_state(
>>                                         hwmgr->device,
>>                                         AMD_IP_BLOCK_TYPE_VCE,
>> -                                       AMD_CG_STATE_UNGATE);
>> +                                       AMD_PG_STATE_UNGATE);
>>                 cz_dpm_update_vce_dpm(hwmgr);
>>                 cz_enable_disable_vce_dpm(hwmgr, true);
>>         }
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
>> index 69a0678ace98..402aa9cb1f78 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
>> @@ -162,7 +162,7 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
>>                                 AMD_CG_STATE_UNGATE);
>>                 cgs_set_powergating_state(hwmgr->device,
>>                                                 AMD_IP_BLOCK_TYPE_UVD,
>> -                                               AMD_CG_STATE_UNGATE);
>> +                                               AMD_PG_STATE_UNGATE);
>>                 smu7_update_uvd_dpm(hwmgr, false);
>>         }
>>
>> --
>> 2.16.0.rc1.238.g530d649a79-goog
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-02-07 19:06 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-07 18:58 [PATCH] drm/amd/powerplay: Fix enum mismatch Matthias Kaehlcke
2018-02-07 18:58 ` Matthias Kaehlcke
2018-02-07 19:01 ` Guenter Roeck
2018-02-07 19:06   ` Alex Deucher
2018-02-07 19:06     ` Alex Deucher

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