* [PATCH 1/2] drm/amd/display: Fix Null point error if smu ip was disabled
@ 2018-10-19 2:51 Rex Zhu
[not found] ` <1539917483-5763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Rex Zhu @ 2018-10-19 2:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu
from AI, SMU Ip is not indispensable to driver and can be
disabled by user via module parameter ip_block_mask.
so the pp_handle may be NULL.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 0fab64a..12001a0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -101,7 +101,7 @@ bool dm_pp_apply_display_requirements(
adev->pm.pm_display_cfg.displays[i].controller_id = dc_cfg->pipe_idx + 1;
}
- if (adev->powerplay.pp_funcs->display_configuration_change)
+ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->display_configuration_change)
adev->powerplay.pp_funcs->display_configuration_change(
adev->powerplay.pp_handle,
&adev->pm.pm_display_cfg);
@@ -304,7 +304,7 @@ bool dm_pp_get_clock_levels_by_type(
struct amd_pp_simple_clock_info validation_clks = { 0 };
uint32_t i;
- if (adev->powerplay.pp_funcs->get_clock_by_type) {
+ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_clock_by_type) {
if (adev->powerplay.pp_funcs->get_clock_by_type(pp_handle,
dc_to_pp_clock_type(clk_type), &pp_clks)) {
/* Error in pplib. Provide default values. */
@@ -315,7 +315,7 @@ bool dm_pp_get_clock_levels_by_type(
pp_to_dc_clock_levels(&pp_clks, dc_clks, clk_type);
- if (adev->powerplay.pp_funcs->get_display_mode_validation_clocks) {
+ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_display_mode_validation_clocks) {
if (adev->powerplay.pp_funcs->get_display_mode_validation_clocks(
pp_handle, &validation_clks)) {
/* Error in pplib. Provide default values. */
@@ -398,6 +398,9 @@ bool dm_pp_get_clock_levels_by_type_with_voltage(
struct pp_clock_levels_with_voltage pp_clk_info = {0};
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
+ if (!pp_funcs || !pp_funcs->get_clock_by_type_with_voltage)
+ return false;
+
if (pp_funcs->get_clock_by_type_with_voltage(pp_handle,
dc_to_pp_clock_type(clk_type),
&pp_clk_info))
@@ -438,7 +441,7 @@ bool dm_pp_apply_clock_for_voltage_request(
if (!pp_clock_request.clock_type)
return false;
- if (adev->powerplay.pp_funcs->display_clock_voltage_request)
+ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->display_clock_voltage_request)
ret = adev->powerplay.pp_funcs->display_clock_voltage_request(
adev->powerplay.pp_handle,
&pp_clock_request);
@@ -455,7 +458,7 @@ bool dm_pp_get_static_clocks(
struct amd_pp_clock_info pp_clk_info = {0};
int ret = 0;
- if (adev->powerplay.pp_funcs->get_current_clocks)
+ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_current_clocks)
ret = adev->powerplay.pp_funcs->get_current_clocks(
adev->powerplay.pp_handle,
&pp_clk_info);
@@ -505,6 +508,9 @@ void pp_rv_set_wm_ranges(struct pp_smu *pp,
wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
+ if (!pp_funcs || !pp_funcs->set_watermarks_for_clocks_ranges)
+ return;
+
for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
if (ranges->reader_wm_sets[i].wm_inst > 3)
wm_dce_clocks[i].wm_set_id = WM_SET_A;
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/amdgpu: Fix null point errro
[not found] ` <1539917483-5763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-10-19 2:51 ` Rex Zhu
[not found] ` <1539917483-5763-2-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Rex Zhu @ 2018-10-19 2:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu
need to check adev->powerplay.pp_funcs first, becasue from
AI, the smu ip may be disabled by user, and the pp_handle
is null in this case.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++++--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +-
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++++--
5 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 297a549..0a4fba1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain *genpd)
* 2. power off the acp tiles
* 3. check and enter ulv state
*/
- if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+ if (adev->powerplay.pp_funcs &&
+ adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
}
return 0;
@@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
bool enable = state == AMD_PG_STATE_GATE ? true : false;
- if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+ if (adev->powerplay.pp_funcs &&
+ adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4fca67a..7dad682 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1783,6 +1783,7 @@ static int amdgpu_device_set_pg_state(struct amdgpu_device *adev, enum amd_power
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_VCE ||
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_VCN ||
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_ACP) &&
+ adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->set_powergating_by_smu) {
if (!adev->ip_blocks[i].status.valid) {
amdgpu_dpm_set_powergating_by_smu(adev, adev->ip_blocks[i].version->type, state == AMD_PG_STATE_GATE ?
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 790fd54..1a656b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
return;
- if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
+ if (!adev->powerplay.pp_funcs || !adev->powerplay.pp_funcs->set_powergating_by_smu)
return;
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 14649f8..fd23ba1 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -280,7 +280,7 @@ void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev,
return;
if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {
- if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 2e8365d..d97e6a2 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1595,7 +1595,8 @@ static int sdma_v4_0_hw_init(void *handle)
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
+ if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs &&
+ adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
sdma_v4_0_init_golden_registers(adev);
@@ -1615,7 +1616,8 @@ static int sdma_v4_0_hw_fini(void *handle)
sdma_v4_0_ctx_switch_enable(adev, false);
sdma_v4_0_enable(adev, false);
- if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
+ if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
+ && adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
return 0;
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: Fix null point errro
[not found] ` <1539917483-5763-2-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-10-19 3:47 ` Zhou, David(ChunMing)
[not found] ` <BY1PR12MB05029F6A934E9A2368410614B4F90-PicGAnIBOobrCwm+z9iKNgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Zhou, David(ChunMing) @ 2018-10-19 3:47 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zhu, Rex
A minor suggestion, not sure if it's proper, Can we insert these callback checking to func? I know these func could be defined as a macro, can we change them to function definition?
David
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Rex
> Zhu
> Sent: Friday, October 19, 2018 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex <Rex.Zhu@amd.com>
> Subject: [PATCH 2/2] drm/amdgpu: Fix null point errro
>
> need to check adev->powerplay.pp_funcs first, becasue from AI, the smu ip
> may be disabled by user, and the pp_handle is null in this case.
>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++++--
> 5 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index 297a549..0a4fba1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain
> *genpd)
> * 2. power off the acp tiles
> * 3. check and enter ulv state
> */
> - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, true);
> }
> return 0;
> @@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> bool enable = state == AMD_PG_STATE_GATE ? true : false;
>
> - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs->set_powergating_by_smu)
> amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, enable);
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 4fca67a..7dad682 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1783,6 +1783,7 @@ static int amdgpu_device_set_pg_state(struct
> amdgpu_device *adev, enum amd_power
> adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_VCE ||
> adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_VCN ||
> adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_ACP) &&
> + adev->powerplay.pp_funcs &&
> adev->powerplay.pp_funcs->set_powergating_by_smu) {
> if (!adev->ip_blocks[i].status.valid) {
>
> amdgpu_dpm_set_powergating_by_smu(adev, adev-
> >ip_blocks[i].version->type, state == AMD_PG_STATE_GATE ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 790fd54..1a656b8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device
> *adev, bool enable)
> if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
> return;
>
> - if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (!adev->powerplay.pp_funcs ||
> +!adev->powerplay.pp_funcs->set_powergating_by_smu)
> return;
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 14649f8..fd23ba1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -280,7 +280,7 @@ void mmhub_v1_0_update_power_gating(struct
> amdgpu_device *adev,
> return;
>
> if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {
> - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (adev->powerplay.pp_funcs &&
> +adev->powerplay.pp_funcs->set_powergating_by_smu)
> amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_GMC, true);
>
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 2e8365d..d97e6a2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1595,7 +1595,8 @@ static int sdma_v4_0_hw_init(void *handle)
> int r;
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> &&
> + adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_SDMA, false);
>
> sdma_v4_0_init_golden_registers(adev);
> @@ -1615,7 +1616,8 @@ static int sdma_v4_0_hw_fini(void *handle)
> sdma_v4_0_ctx_switch_enable(adev, false);
> sdma_v4_0_enable(adev, false);
>
> - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> + && adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_SDMA, true);
>
> return 0;
> --
> 1.9.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Fix null point errro
[not found] ` <BY1PR12MB05029F6A934E9A2368410614B4F90-PicGAnIBOobrCwm+z9iKNgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2018-10-19 21:01 ` Alex Deucher
0 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2018-10-19 21:01 UTC (permalink / raw)
To: Chunming Zhou; +Cc: Rex Zhu, amd-gfx list
On Thu, Oct 18, 2018 at 11:47 PM Zhou, David(ChunMing)
<David1.Zhou@amd.com> wrote:
>
> A minor suggestion, not sure if it's proper, Can we insert these callback checking to func? I know these func could be defined as a macro, can we change them to function definition?
I think we already do something similar with the other dpm macros.
Either way, the series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> David
>
> > -----Original Message-----
> > From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Rex
> > Zhu
> > Sent: Friday, October 19, 2018 10:51 AM
> > To: amd-gfx@lists.freedesktop.org
> > Cc: Zhu, Rex <Rex.Zhu@amd.com>
> > Subject: [PATCH 2/2] drm/amdgpu: Fix null point errro
> >
> > need to check adev->powerplay.pp_funcs first, becasue from AI, the smu ip
> > may be disabled by user, and the pp_handle is null in this case.
> >
> > Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++++--
> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
> > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +-
> > drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 2 +-
> > drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++++--
> > 5 files changed, 11 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > index 297a549..0a4fba1 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > @@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain
> > *genpd)
> > * 2. power off the acp tiles
> > * 3. check and enter ulv state
> > */
> > - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> > + if (adev->powerplay.pp_funcs &&
> > + adev->powerplay.pp_funcs-
> > >set_powergating_by_smu)
> > amdgpu_dpm_set_powergating_by_smu(adev,
> > AMD_IP_BLOCK_TYPE_ACP, true);
> > }
> > return 0;
> > @@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
> > struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> > bool enable = state == AMD_PG_STATE_GATE ? true : false;
> >
> > - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> > + if (adev->powerplay.pp_funcs &&
> > + adev->powerplay.pp_funcs->set_powergating_by_smu)
> > amdgpu_dpm_set_powergating_by_smu(adev,
> > AMD_IP_BLOCK_TYPE_ACP, enable);
> >
> > return 0;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index 4fca67a..7dad682 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -1783,6 +1783,7 @@ static int amdgpu_device_set_pg_state(struct
> > amdgpu_device *adev, enum amd_power
> > adev->ip_blocks[i].version->type ==
> > AMD_IP_BLOCK_TYPE_VCE ||
> > adev->ip_blocks[i].version->type ==
> > AMD_IP_BLOCK_TYPE_VCN ||
> > adev->ip_blocks[i].version->type ==
> > AMD_IP_BLOCK_TYPE_ACP) &&
> > + adev->powerplay.pp_funcs &&
> > adev->powerplay.pp_funcs->set_powergating_by_smu) {
> > if (!adev->ip_blocks[i].status.valid) {
> >
> > amdgpu_dpm_set_powergating_by_smu(adev, adev-
> > >ip_blocks[i].version->type, state == AMD_PG_STATE_GATE ?
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > index 790fd54..1a656b8 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > @@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device
> > *adev, bool enable)
> > if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
> > return;
> >
> > - if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
> > + if (!adev->powerplay.pp_funcs ||
> > +!adev->powerplay.pp_funcs->set_powergating_by_smu)
> > return;
> >
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> > b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> > index 14649f8..fd23ba1 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> > @@ -280,7 +280,7 @@ void mmhub_v1_0_update_power_gating(struct
> > amdgpu_device *adev,
> > return;
> >
> > if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {
> > - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> > + if (adev->powerplay.pp_funcs &&
> > +adev->powerplay.pp_funcs->set_powergating_by_smu)
> > amdgpu_dpm_set_powergating_by_smu(adev,
> > AMD_IP_BLOCK_TYPE_GMC, true);
> >
> > }
> > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> > b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> > index 2e8365d..d97e6a2 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> > @@ -1595,7 +1595,8 @@ static int sdma_v4_0_hw_init(void *handle)
> > int r;
> > struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> >
> > - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs-
> > >set_powergating_by_smu)
> > + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> > &&
> > + adev->powerplay.pp_funcs-
> > >set_powergating_by_smu)
> > amdgpu_dpm_set_powergating_by_smu(adev,
> > AMD_IP_BLOCK_TYPE_SDMA, false);
> >
> > sdma_v4_0_init_golden_registers(adev);
> > @@ -1615,7 +1616,8 @@ static int sdma_v4_0_hw_fini(void *handle)
> > sdma_v4_0_ctx_switch_enable(adev, false);
> > sdma_v4_0_enable(adev, false);
> >
> > - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs-
> > >set_powergating_by_smu)
> > + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> > + && adev->powerplay.pp_funcs-
> > >set_powergating_by_smu)
> > amdgpu_dpm_set_powergating_by_smu(adev,
> > AMD_IP_BLOCK_TYPE_SDMA, true);
> >
> > return 0;
> > --
> > 1.9.1
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-10-19 21:01 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-19 2:51 [PATCH 1/2] drm/amd/display: Fix Null point error if smu ip was disabled Rex Zhu
[not found] ` <1539917483-5763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-10-19 2:51 ` [PATCH 2/2] drm/amdgpu: Fix null point errro Rex Zhu
[not found] ` <1539917483-5763-2-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-10-19 3:47 ` Zhou, David(ChunMing)
[not found] ` <BY1PR12MB05029F6A934E9A2368410614B4F90-PicGAnIBOobrCwm+z9iKNgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-10-19 21:01 ` Alex Deucher
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.