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From: Alex Deucher <alexdeucher@gmail.com>
To: Luben Tuikov <luben.tuikov@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>,
	Lijo Lazar <Lijo.Lazar@amd.com>,
	amd-gfx list <amd-gfx@lists.freedesktop.org>,
	Stanley Yang <Stanley.Yang@amd.com>,
	Alexander Deucher <Alexander.Deucher@amd.com>,
	Jean Delvare <jdelvare@suse.de>,
	Hawking Zhang <Hawking.Zhang@amd.com>
Subject: Re: [PATCH 19/40] drm/amdgpu: Fixes to the AMDGPU EEPROM driver
Date: Thu, 10 Jun 2021 16:53:24 -0400	[thread overview]
Message-ID: <CADnq5_MBYBQJ+bOn_Qieyp_gF2cHzgUxy73GQhdMfJNT-nsGFw@mail.gmail.com> (raw)
In-Reply-To: <20210608213954.5517-20-luben.tuikov@amd.com>

On Tue, Jun 8, 2021 at 5:40 PM Luben Tuikov <luben.tuikov@amd.com> wrote:
>
> * When reading from the EEPROM device, there is no
>   device limitation on the number of bytes
>   read--they're simply sequenced out. Thus, read
>   the whole data requested in one go.
>
> * When writing to the EEPROM device, there is a
>   256-byte page limit to write to before having to
>   generate a STOP on the bus, as well as the
>   address written to mustn't cross over the page
>   boundary (it actually rolls over). Maximize the
>   data written to per bus acquisition.
>
> * Return the number of bytes read/written, or -errno.
>
> * Add kernel doc.
>
> Cc: Jean Delvare <jdelvare@suse.de>
> Cc: Alexander Deucher <Alexander.Deucher@amd.com>
> Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
> Cc: Lijo Lazar <Lijo.Lazar@amd.com>
> Cc: Stanley Yang <Stanley.Yang@amd.com>
> Cc: Hawking Zhang <Hawking.Zhang@amd.com>
> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c | 96 +++++++++++++++-------
>  1 file changed, 68 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
> index d02ea083a6c69b..7fdb5bd2fc8bc8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
> @@ -24,59 +24,99 @@
>  #include "amdgpu_eeprom.h"
>  #include "amdgpu.h"
>
> -#define EEPROM_OFFSET_LENGTH 2
> +/* AT24CM02 has a 256-byte write page size.
> + */
> +#define EEPROM_PAGE_BITS   8
> +#define EEPROM_PAGE_SIZE   (1U << EEPROM_PAGE_BITS)
> +#define EEPROM_PAGE_MASK   (EEPROM_PAGE_SIZE - 1)
> +
> +#define EEPROM_OFFSET_SIZE 2
>
> +/**
> + * amdgpu_eeprom_xfer -- Read/write from/to an I2C EEPROM device
> + * @i2c_adap: pointer to the I2C adapter to use
> + * @slave_addr: I2C address of the slave device
> + * @eeprom_addr: EEPROM address from which to read/write
> + * @eeprom_buf: pointer to data buffer to read into/write from
> + * @buf_size: the size of @eeprom_buf
> + * @read: True if reading from the EEPROM, false if writing
> + *
> + * Returns the number of bytes read/written; -errno on error.
> + */
>  int amdgpu_eeprom_xfer(struct i2c_adapter *i2c_adap,
>                        u16 slave_addr, u16 eeprom_addr,
> -                      u8 *eeprom_buf, u16 bytes, bool read)
> +                      u8 *eeprom_buf, u16 buf_size, bool read)
>  {
> -       u8 eeprom_offset_buf[2];
> -       u16 bytes_transferred;
> +       u8 eeprom_offset_buf[EEPROM_OFFSET_SIZE];
>         struct i2c_msg msgs[] = {
>                 {
>                         .addr = slave_addr,
>                         .flags = 0,
> -                       .len = EEPROM_OFFSET_LENGTH,
> +                       .len = EEPROM_OFFSET_SIZE,
>                         .buf = eeprom_offset_buf,
>                 },
>                 {
>                         .addr = slave_addr,
>                         .flags = read ? I2C_M_RD : 0,
> -                       .len = bytes,
> -                       .buf = eeprom_buf,
>                 },
>         };
> +       const u8 *p = eeprom_buf;
>         int r;
> +       u16 len;
> +
> +       r = 0;
> +       for (len = 0; buf_size > 0;
> +            buf_size -= len, eeprom_addr += len, eeprom_buf += len) {
> +               /* Set the EEPROM address we want to write to/read from.
> +                */
> +               msgs[0].buf[0] = (eeprom_addr >> 8) & 0xff;
> +               msgs[0].buf[1] = eeprom_addr & 0xff;
>
> -       msgs[0].buf[0] = ((eeprom_addr >> 8) & 0xff);
> -       msgs[0].buf[1] = (eeprom_addr & 0xff);
> +               if (!read) {
> +                       /* Write the maximum amount of data, without
> +                        * crossing the device's page boundary, as per
> +                        * its spec. Partial page writes are allowed,
> +                        * starting at any location within the page,
> +                        * so long as the page boundary isn't crossed
> +                        * over (actually the page pointer rolls
> +                        * over).
> +                        *
> +                        * As per the AT24CM02 EEPROM spec, after
> +                        * writing into a page, the I2C driver MUST
> +                        * terminate the transfer, i.e. in
> +                        * "i2c_transfer()" below, with a STOP
> +                        * condition, so that the self-timed write
> +                        * cycle begins. This is implied for the
> +                        * "i2c_transfer()" abstraction.
> +                        */
> +                       len = min(EEPROM_PAGE_SIZE - (eeprom_addr &
> +                                                     EEPROM_PAGE_MASK),
> +                                 (u32)buf_size);
> +               } else {
> +                       /* Reading from the EEPROM has no limitation
> +                        * on the number of bytes read from the EEPROM
> +                        * device--they are simply sequenced out.
> +                        */
> +                       len = buf_size;
> +               }
> +               msgs[1].len = len;
> +               msgs[1].buf = eeprom_buf;
>
> -       while (msgs[1].len) {
>                 r = i2c_transfer(i2c_adap, msgs, ARRAY_SIZE(msgs));
> -               if (r <= 0)
> -                       return r;
> +               if (r < ARRAY_SIZE(msgs))
> +                       break;
>
> -               /* Only for write data */
> -               if (!msgs[1].flags)
> -                       /*
> -                        * According to EEPROM spec there is a MAX of 10 ms required for
> -                        * EEPROM to flush internal RX buffer after STOP was issued at the
> -                        * end of write transaction. During this time the EEPROM will not be
> -                        * responsive to any more commands - so wait a bit more.
> +               if (!read) {
> +                       /* According to the AT24CM02 EEPROM spec the
> +                        * length of the self-writing cycle, tWR, is
> +                        * 10 ms.
>                          *
>                          * TODO Improve to wait for first ACK for slave address after
>                          * internal write cycle done.
>                          */
>                         msleep(10);
> -
> -
> -               bytes_transferred = r - EEPROM_OFFSET_LENGTH;
> -               eeprom_addr += bytes_transferred;
> -               msgs[0].buf[0] = ((eeprom_addr >> 8) & 0xff);
> -               msgs[0].buf[1] = (eeprom_addr & 0xff);
> -               msgs[1].buf += bytes_transferred;
> -               msgs[1].len -= bytes_transferred;
> +               }
>         }
>
> -       return 0;
> +       return r < 0 ? r : eeprom_buf - p;
>  }
> --
> 2.32.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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  reply	other threads:[~2021-06-10 20:53 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08 21:39 [PATCH 00/40] I2C fixes Luben Tuikov
2021-06-08 21:39 ` [PATCH 01/40] drm/amdgpu: add a mutex for the smu11 i2c bus (v2) Luben Tuikov
2021-06-08 21:39 ` [PATCH 02/40] drm/amdgpu/pm: rework i2c xfers on sienna cichlid (v3) Luben Tuikov
2021-06-08 21:39 ` [PATCH 03/40] drm/amdgpu/pm: rework i2c xfers on arcturus (v3) Luben Tuikov
2021-06-08 21:39 ` [PATCH 04/40] drm/amdgpu/pm: add smu i2c implementation for navi1x (v3) Luben Tuikov
2021-06-08 21:39 ` [PATCH 05/40] drm/amdgpu: add new helper for handling EEPROM i2c transfers Luben Tuikov
2021-06-08 21:39 ` [PATCH 06/40] drm/amdgpu/ras: switch ras eeprom handling to use generic helper Luben Tuikov
2021-06-08 21:39 ` [PATCH 07/40] drm/amdgpu/ras: switch fru eeprom handling to use generic helper (v2) Luben Tuikov
2021-06-08 21:39 ` [PATCH 08/40] drm/amdgpu: i2c subsystem uses 7 bit addresses Luben Tuikov
2021-06-08 21:39 ` [PATCH 09/40] drm/amdgpu: add I2C_CLASS_HWMON to SMU i2c buses Luben Tuikov
2021-06-08 21:39 ` [PATCH 10/40] drm/amdgpu: rework smu11 i2c for generic operation Luben Tuikov
2021-06-08 21:39 ` [PATCH 11/40] drm/amdgpu: only set restart on first cmd of the smu i2c transaction Luben Tuikov
2021-06-08 21:39 ` [PATCH 12/40] drm/amdgpu: Remember to wait 10ms for write buffer flush v2 Luben Tuikov
2021-06-08 21:39 ` [PATCH 13/40] dmr/amdgpu: Add RESTART handling also to smu_v11_0_i2c (VG20) Luben Tuikov
2021-06-10 20:18   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 14/40] drm/amdgpu: Drop i > 0 restriction for issuing RESTART Luben Tuikov
2021-06-10 20:21   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 15/40] drm/amdgpu: Send STOP for the last byte of msg only Luben Tuikov
2021-06-10 20:22   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 16/40] drm/amd/pm: SMU I2C: Return number of messages processed Luben Tuikov
2021-06-10 20:25   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 17/40] drm/amdgpu/pm: ADD I2C quirk adapter table Luben Tuikov
2021-06-10 20:26   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 18/40] drm/amdgpu: Fix Vega20 I2C to be agnostic (v2) Luben Tuikov
2021-06-10 20:43   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 19/40] drm/amdgpu: Fixes to the AMDGPU EEPROM driver Luben Tuikov
2021-06-10 20:53   ` Alex Deucher [this message]
2021-06-08 21:39 ` [PATCH 20/40] drm/amdgpu: EEPROM respects I2C quirks Luben Tuikov
2021-06-11 17:01   ` Alex Deucher
2021-06-11 17:17     ` Luben Tuikov
2021-06-11 17:37       ` Luben Tuikov
2021-06-08 21:39 ` [PATCH 21/40] drm/amdgpu: I2C EEPROM full memory addressing Luben Tuikov
2021-06-10 20:57   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 22/40] drm/amdgpu: RAS and FRU now use 19-bit I2C address Luben Tuikov
2021-06-10 20:59   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 23/40] drm/amdgpu: Fix wrap-around bugs in RAS Luben Tuikov
2021-06-10 21:00   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 24/40] drm/amdgpu: I2C class is HWMON Luben Tuikov
2021-06-10 21:02   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 25/40] drm/amdgpu: RAS: EEPROM --> RAS Luben Tuikov
2021-06-10 21:03   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 26/40] drm/amdgpu: Rename misspelled function Luben Tuikov
2021-06-10 21:04   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 27/40] drm/amdgpu: RAS xfer to read/write Luben Tuikov
2021-06-10 21:05   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 28/40] drm/amdgpu: EEPROM: add explicit read and write Luben Tuikov
2021-06-10 21:06   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 29/40] drm/amd/pm: Extend the I2C quirk table Luben Tuikov
2021-06-10 21:07   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 30/40] drm/amd/pm: Simplify managed I2C transfer functions Luben Tuikov
2021-06-10 21:08   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 31/40] drm/amdgpu: Fix width of I2C address Luben Tuikov
2021-06-10 21:09   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 32/40] drm/amdgpu: Return result fix in RAS Luben Tuikov
2021-06-10 21:11   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 33/40] drm/amd/pm: Fix a bug in i2c_xfer Luben Tuikov
2021-06-10 21:12   ` Alex Deucher
2021-06-10 22:26     ` Luben Tuikov
2021-06-08 21:39 ` [PATCH 34/40] drm/amdgpu: Fix amdgpu_ras_eeprom_init() Luben Tuikov
2021-06-10 21:12   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 35/40] drm/amdgpu: Simplify RAS EEPROM checksum calculations Luben Tuikov
2021-06-11 17:07   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 36/40] drm/amdgpu: Use explicit cardinality for clarity Luben Tuikov
2021-06-10 21:17   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 37/40] drm/amdgpu: Optimizations to EEPROM RAS table I/O Luben Tuikov
2021-06-08 21:39 ` [PATCH 38/40] drm/amdgpu: RAS EEPROM table is now in debugfs Luben Tuikov
2021-06-11 17:16   ` Alex Deucher
2021-06-11 17:30     ` Luben Tuikov
2021-06-11 17:51       ` Alex Deucher
2021-06-11 18:06         ` Luben Tuikov
2021-06-08 21:39 ` [PATCH 39/40] drm/amdgpu: Fix koops when accessing RAS EEPROM Luben Tuikov
2021-06-10 21:23   ` Alex Deucher
2021-06-08 21:39 ` [PATCH 40/40] drm/amdgpu: Use a single loop Luben Tuikov
2021-06-10 21:25   ` Alex Deucher
2021-06-14 17:45 [PATCH 00/40] I2C fixes (revision 1) Luben Tuikov
2021-06-14 17:46 ` [PATCH 19/40] drm/amdgpu: Fixes to the AMDGPU EEPROM driver Luben Tuikov

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