* [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2
@ 2015-02-18 12:19 Christian König
2015-02-18 12:19 ` [PATCH 2/3] drm/radeon: enable SRBM timeout interrupt on SI Christian König
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Christian König @ 2015-02-18 12:19 UTC (permalink / raw)
To: dri-devel
From: Leo Liu <leo.liu@amd.com>
v2: disable it on suspend
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/radeon/cik.c | 8 ++++++++
drivers/gpu/drm/radeon/cikd.h | 4 ++++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e6a4ba2..0c993da 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3613,6 +3613,8 @@ static void cik_gpu_init(struct radeon_device *rdev)
}
WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
+ WREG32(SRBM_INT_CNTL, 0x1);
+ WREG32(SRBM_INT_ACK, 0x1);
WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);
@@ -7230,6 +7232,8 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev)
WREG32(CP_ME2_PIPE3_INT_CNTL, 0);
/* grbm */
WREG32(GRBM_INT_CNTL, 0);
+ /* SRBM */
+ WREG32(SRBM_INT_CNTL, 0);
/* vline/vblank, etc. */
WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -8046,6 +8050,10 @@ restart_ih:
break;
}
break;
+ case 96:
+ DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
+ WREG32(SRBM_INT_ACK, 0x1);
+ break;
case 124: /* UVD */
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index 03003f8..c648e19 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -482,6 +482,10 @@
#define SOFT_RESET_ORB (1 << 23)
#define SOFT_RESET_VCE (1 << 24)
+#define SRBM_READ_ERROR 0xE98
+#define SRBM_INT_CNTL 0xEA0
+#define SRBM_INT_ACK 0xEA8
+
#define VM_L2_CNTL 0x1400
#define ENABLE_L2_CACHE (1 << 0)
#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] drm/radeon: enable SRBM timeout interrupt on SI
2015-02-18 12:19 [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Christian König
@ 2015-02-18 12:19 ` Christian König
2015-02-18 12:19 ` [PATCH 3/3] drm/radeon: enable SRBM timeout interrupt on EG/NI Christian König
2015-02-18 16:34 ` [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Alex Deucher
2 siblings, 0 replies; 4+ messages in thread
From: Christian König @ 2015-02-18 12:19 UTC (permalink / raw)
To: dri-devel
From: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/radeon/si.c | 7 +++++++
drivers/gpu/drm/radeon/sid.h | 4 ++++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 73107fe..f34d281 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -3162,6 +3162,8 @@ static void si_gpu_init(struct radeon_device *rdev)
}
WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
+ WREG32(SRBM_INT_CNTL, 1);
+ WREG32(SRBM_INT_ACK, 1);
evergreen_fix_pci_max_read_req_size(rdev);
@@ -5910,6 +5912,7 @@ static void si_disable_interrupt_state(struct radeon_device *rdev)
tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE;
WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp);
WREG32(GRBM_INT_CNTL, 0);
+ WREG32(SRBM_INT_CNTL, 0);
if (rdev->num_crtc >= 2) {
WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -6609,6 +6612,10 @@ restart_ih:
break;
}
break;
+ case 96:
+ DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
+ WREG32(SRBM_INT_ACK, 0x1);
+ break;
case 124: /* UVD */
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index cbd91d2..c27118c 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -358,6 +358,10 @@
#define CC_SYS_RB_BACKEND_DISABLE 0xe80
#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84
+#define SRBM_READ_ERROR 0xE98
+#define SRBM_INT_CNTL 0xEA0
+#define SRBM_INT_ACK 0xEA8
+
#define SRBM_STATUS2 0x0EC4
#define DMA_BUSY (1 << 5)
#define DMA1_BUSY (1 << 6)
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] drm/radeon: enable SRBM timeout interrupt on EG/NI
2015-02-18 12:19 [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Christian König
2015-02-18 12:19 ` [PATCH 2/3] drm/radeon: enable SRBM timeout interrupt on SI Christian König
@ 2015-02-18 12:19 ` Christian König
2015-02-18 16:34 ` [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Alex Deucher
2 siblings, 0 replies; 4+ messages in thread
From: Christian König @ 2015-02-18 12:19 UTC (permalink / raw)
To: dri-devel
From: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/radeon/evergreen.c | 7 +++++++
drivers/gpu/drm/radeon/evergreend.h | 4 ++++
drivers/gpu/drm/radeon/ni.c | 2 ++
drivers/gpu/drm/radeon/nid.h | 4 ++++
4 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 78600f5..4c0e24b 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3253,6 +3253,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
}
WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
+ WREG32(SRBM_INT_CNTL, 0x1);
+ WREG32(SRBM_INT_ACK, 0x1);
evergreen_fix_pci_max_read_req_size(rdev);
@@ -4324,6 +4326,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev)
tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
WREG32(DMA_CNTL, tmp);
WREG32(GRBM_INT_CNTL, 0);
+ WREG32(SRBM_INT_CNTL, 0);
WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
if (rdev->num_crtc >= 4) {
@@ -5066,6 +5069,10 @@ restart_ih:
DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
break;
}
+ case 96:
+ DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
+ WREG32(SRBM_INT_ACK, 0x1);
+ break;
case 124: /* UVD */
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index ee83d2a..a8d1d52 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1191,6 +1191,10 @@
#define SOFT_RESET_REGBB (1 << 22)
#define SOFT_RESET_ORB (1 << 23)
+#define SRBM_READ_ERROR 0xE98
+#define SRBM_INT_CNTL 0xEA0
+#define SRBM_INT_ACK 0xEA8
+
/* display watermarks */
#define DC_LB_MEMORY_SPLIT 0x6b0c
#define PRIORITY_A_CNT 0x6b18
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 24242a7..ebe68dd 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -962,6 +962,8 @@ static void cayman_gpu_init(struct radeon_device *rdev)
}
WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
+ WREG32(SRBM_INT_CNTL, 0x1);
+ WREG32(SRBM_INT_ACK, 0x1);
evergreen_fix_pci_max_read_req_size(rdev);
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index ad71254..6b44580 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -82,6 +82,10 @@
#define SOFT_RESET_REGBB (1 << 22)
#define SOFT_RESET_ORB (1 << 23)
+#define SRBM_READ_ERROR 0xE98
+#define SRBM_INT_CNTL 0xEA0
+#define SRBM_INT_ACK 0xEA8
+
#define SRBM_STATUS2 0x0EC4
#define DMA_BUSY (1 << 5)
#define DMA1_BUSY (1 << 6)
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2
2015-02-18 12:19 [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Christian König
2015-02-18 12:19 ` [PATCH 2/3] drm/radeon: enable SRBM timeout interrupt on SI Christian König
2015-02-18 12:19 ` [PATCH 3/3] drm/radeon: enable SRBM timeout interrupt on EG/NI Christian König
@ 2015-02-18 16:34 ` Alex Deucher
2 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2015-02-18 16:34 UTC (permalink / raw)
To: Christian König; +Cc: Maling list - DRI developers
On Wed, Feb 18, 2015 at 7:19 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Leo Liu <leo.liu@amd.com>
>
> v2: disable it on suspend
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Applied the whole series to my tree.
Thanks!
Alex
> ---
> drivers/gpu/drm/radeon/cik.c | 8 ++++++++
> drivers/gpu/drm/radeon/cikd.h | 4 ++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index e6a4ba2..0c993da 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -3613,6 +3613,8 @@ static void cik_gpu_init(struct radeon_device *rdev)
> }
>
> WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
> + WREG32(SRBM_INT_CNTL, 0x1);
> + WREG32(SRBM_INT_ACK, 0x1);
>
> WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);
>
> @@ -7230,6 +7232,8 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev)
> WREG32(CP_ME2_PIPE3_INT_CNTL, 0);
> /* grbm */
> WREG32(GRBM_INT_CNTL, 0);
> + /* SRBM */
> + WREG32(SRBM_INT_CNTL, 0);
> /* vline/vblank, etc. */
> WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
> WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
> @@ -8046,6 +8050,10 @@ restart_ih:
> break;
> }
> break;
> + case 96:
> + DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
> + WREG32(SRBM_INT_ACK, 0x1);
> + break;
> case 124: /* UVD */
> DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
> radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
> diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
> index 03003f8..c648e19 100644
> --- a/drivers/gpu/drm/radeon/cikd.h
> +++ b/drivers/gpu/drm/radeon/cikd.h
> @@ -482,6 +482,10 @@
> #define SOFT_RESET_ORB (1 << 23)
> #define SOFT_RESET_VCE (1 << 24)
>
> +#define SRBM_READ_ERROR 0xE98
> +#define SRBM_INT_CNTL 0xEA0
> +#define SRBM_INT_ACK 0xEA8
> +
> #define VM_L2_CNTL 0x1400
> #define ENABLE_L2_CACHE (1 << 0)
> #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)
> --
> 1.9.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-02-18 16:34 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-02-18 12:19 [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Christian König
2015-02-18 12:19 ` [PATCH 2/3] drm/radeon: enable SRBM timeout interrupt on SI Christian König
2015-02-18 12:19 ` [PATCH 3/3] drm/radeon: enable SRBM timeout interrupt on EG/NI Christian König
2015-02-18 16:34 ` [PATCH 1/3] drm/radeon: enable SRBM timeout interrupt on CIK v2 Alex Deucher
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.