* [PATCH] drm/radeon: Remove limitation on clock speeds
@ 2014-09-23 4:42 Alexandre Demers
2014-09-23 5:08 ` Alexandre Demers
0 siblings, 1 reply; 4+ messages in thread
From: Alexandre Demers @ 2014-09-23 4:42 UTC (permalink / raw)
To: dri-devel
Now that vddci has been fixed for dpm, we can let the GPUs
use their maximum values when not using the reference ones.
Fixes bug 69721: Can't reach maximum memory speed (or core
speed) when using dpm=1 on r600g on cards not sticking to
reference board
Tested on kernel 3.17-rc7 on a cayman gpu.
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
---
drivers/gpu/drm/radeon/btc_dpm.c | 51 ----------------------------------------
drivers/gpu/drm/radeon/btc_dpm.h | 2 --
drivers/gpu/drm/radeon/ci_dpm.c | 26 --------------------
drivers/gpu/drm/radeon/ni_dpm.c | 24 -------------------
drivers/gpu/drm/radeon/si_dpm.c | 24 -------------------
5 files changed, 127 deletions(-)
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index f81d7ca..300d971 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -1170,23 +1170,6 @@ static const struct radeon_blacklist_clocks btc_blacklist_clocks[] =
{ 25000, 30000, RADEON_SCLK_UP }
};
-void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
- u32 *max_clock)
-{
- u32 i, clock = 0;
-
- if ((table == NULL) || (table->count == 0)) {
- *max_clock = clock;
- return;
- }
-
- for (i = 0; i < table->count; i++) {
- if (clock < table->entries[i].clk)
- clock = table->entries[i].clk;
- }
- *max_clock = clock;
-}
-
void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
u32 clock, u16 max_voltage, u16 *voltage)
{
@@ -2099,7 +2082,6 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev,
bool disable_mclk_switching;
u32 mclk, sclk;
u16 vddc, vddci;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
btc_dpm_vblank_too_short(rdev))
@@ -2141,39 +2123,6 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev,
ps->low.vddci = max_limits->vddci;
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- if (max_sclk_vddc) {
- if (ps->low.sclk > max_sclk_vddc)
- ps->low.sclk = max_sclk_vddc;
- if (ps->medium.sclk > max_sclk_vddc)
- ps->medium.sclk = max_sclk_vddc;
- if (ps->high.sclk > max_sclk_vddc)
- ps->high.sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->low.mclk > max_mclk_vddci)
- ps->low.mclk = max_mclk_vddci;
- if (ps->medium.mclk > max_mclk_vddci)
- ps->medium.mclk = max_mclk_vddci;
- if (ps->high.mclk > max_mclk_vddci)
- ps->high.mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->low.mclk > max_mclk_vddc)
- ps->low.mclk = max_mclk_vddc;
- if (ps->medium.mclk > max_mclk_vddc)
- ps->medium.mclk = max_mclk_vddc;
- if (ps->high.mclk > max_mclk_vddc)
- ps->high.mclk = max_mclk_vddc;
- }
-
/* XXX validate the min clocks required for display */
if (disable_mclk_switching) {
diff --git a/drivers/gpu/drm/radeon/btc_dpm.h b/drivers/gpu/drm/radeon/btc_dpm.h
index 3b6f12b..1a15e0e 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.h
+++ b/drivers/gpu/drm/radeon/btc_dpm.h
@@ -46,8 +46,6 @@ void btc_adjust_clock_combinations(struct radeon_device *rdev,
struct rv7xx_pl *pl);
void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
u32 clock, u16 max_voltage, u16 *voltage);
-void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
- u32 *max_clock);
void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
u16 max_vddc, u16 max_vddci,
u16 *vddc, u16 *vddci);
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index d416bb2..d199be3 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[] =
};
extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
-extern void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
- u32 *max_clock);
extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
u32 arb_freq_src, u32 arb_freq_dest);
extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
@@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
struct radeon_clock_and_voltage_limits *max_limits;
bool disable_mclk_switching;
u32 sclk, mclk;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
int i;
if (rps->vce_active) {
@@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
}
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- for (i = 0; i < ps->performance_level_count; i++) {
- if (max_sclk_vddc) {
- if (ps->performance_levels[i].sclk > max_sclk_vddc)
- ps->performance_levels[i].sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->performance_levels[i].mclk > max_mclk_vddci)
- ps->performance_levels[i].mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->performance_levels[i].mclk > max_mclk_vddc)
- ps->performance_levels[i].mclk = max_mclk_vddc;
- }
- }
-
/* XXX validate the min clocks required for display */
if (disable_mclk_switching) {
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index 01fc488..715b181 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -789,7 +789,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
bool disable_mclk_switching;
u32 mclk;
u16 vddci;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
int i;
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
@@ -816,29 +815,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
}
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- for (i = 0; i < ps->performance_level_count; i++) {
- if (max_sclk_vddc) {
- if (ps->performance_levels[i].sclk > max_sclk_vddc)
- ps->performance_levels[i].sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->performance_levels[i].mclk > max_mclk_vddci)
- ps->performance_levels[i].mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->performance_levels[i].mclk > max_mclk_vddc)
- ps->performance_levels[i].mclk = max_mclk_vddc;
- }
- }
-
/* XXX validate the min clocks required for display */
/* adjust low state */
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 70e61ff..9e4d5d7 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
bool disable_sclk_switching = false;
u32 mclk, sclk;
u16 vddc, vddci;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
int i;
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
@@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
}
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- for (i = 0; i < ps->performance_level_count; i++) {
- if (max_sclk_vddc) {
- if (ps->performance_levels[i].sclk > max_sclk_vddc)
- ps->performance_levels[i].sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->performance_levels[i].mclk > max_mclk_vddci)
- ps->performance_levels[i].mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->performance_levels[i].mclk > max_mclk_vddc)
- ps->performance_levels[i].mclk = max_mclk_vddc;
- }
- }
-
/* XXX validate the min clocks required for display */
if (disable_mclk_switching) {
--
2.1.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/radeon: Remove limitation on clock speeds
2014-09-23 4:42 [PATCH] drm/radeon: Remove limitation on clock speeds Alexandre Demers
@ 2014-09-23 5:08 ` Alexandre Demers
2014-09-23 13:52 ` Alex Deucher
0 siblings, 1 reply; 4+ messages in thread
From: Alexandre Demers @ 2014-09-23 5:08 UTC (permalink / raw)
To: dri-devel
Typo: this should be "Tested on kernel 3.17-rc6 on..."
Alexandre Demers
On 23/09/14 12:42 AM, Alexandre Demers wrote:
> Now that vddci has been fixed for dpm, we can let the GPUs
> use their maximum values when not using the reference ones.
>
> Fixes bug 69721: Can't reach maximum memory speed (or core
> speed) when using dpm=1 on r600g on cards not sticking to
> reference board
>
> Tested on kernel 3.17-rc7 on a cayman gpu.
>
> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
>
> ---
> drivers/gpu/drm/radeon/btc_dpm.c | 51 ----------------------------------------
> drivers/gpu/drm/radeon/btc_dpm.h | 2 --
> drivers/gpu/drm/radeon/ci_dpm.c | 26 --------------------
> drivers/gpu/drm/radeon/ni_dpm.c | 24 -------------------
> drivers/gpu/drm/radeon/si_dpm.c | 24 -------------------
> 5 files changed, 127 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
> index f81d7ca..300d971 100644
> --- a/drivers/gpu/drm/radeon/btc_dpm.c
> +++ b/drivers/gpu/drm/radeon/btc_dpm.c
> @@ -1170,23 +1170,6 @@ static const struct radeon_blacklist_clocks btc_blacklist_clocks[] =
> { 25000, 30000, RADEON_SCLK_UP }
> };
>
> -void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
> - u32 *max_clock)
> -{
> - u32 i, clock = 0;
> -
> - if ((table == NULL) || (table->count == 0)) {
> - *max_clock = clock;
> - return;
> - }
> -
> - for (i = 0; i < table->count; i++) {
> - if (clock < table->entries[i].clk)
> - clock = table->entries[i].clk;
> - }
> - *max_clock = clock;
> -}
> -
> void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
> u32 clock, u16 max_voltage, u16 *voltage)
> {
> @@ -2099,7 +2082,6 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev,
> bool disable_mclk_switching;
> u32 mclk, sclk;
> u16 vddc, vddci;
> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>
> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
> btc_dpm_vblank_too_short(rdev))
> @@ -2141,39 +2123,6 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev,
> ps->low.vddci = max_limits->vddci;
> }
>
> - /* limit clocks to max supported clocks based on voltage dependency tables */
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
> - &max_sclk_vddc);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
> - &max_mclk_vddci);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
> - &max_mclk_vddc);
> -
> - if (max_sclk_vddc) {
> - if (ps->low.sclk > max_sclk_vddc)
> - ps->low.sclk = max_sclk_vddc;
> - if (ps->medium.sclk > max_sclk_vddc)
> - ps->medium.sclk = max_sclk_vddc;
> - if (ps->high.sclk > max_sclk_vddc)
> - ps->high.sclk = max_sclk_vddc;
> - }
> - if (max_mclk_vddci) {
> - if (ps->low.mclk > max_mclk_vddci)
> - ps->low.mclk = max_mclk_vddci;
> - if (ps->medium.mclk > max_mclk_vddci)
> - ps->medium.mclk = max_mclk_vddci;
> - if (ps->high.mclk > max_mclk_vddci)
> - ps->high.mclk = max_mclk_vddci;
> - }
> - if (max_mclk_vddc) {
> - if (ps->low.mclk > max_mclk_vddc)
> - ps->low.mclk = max_mclk_vddc;
> - if (ps->medium.mclk > max_mclk_vddc)
> - ps->medium.mclk = max_mclk_vddc;
> - if (ps->high.mclk > max_mclk_vddc)
> - ps->high.mclk = max_mclk_vddc;
> - }
> -
> /* XXX validate the min clocks required for display */
>
> if (disable_mclk_switching) {
> diff --git a/drivers/gpu/drm/radeon/btc_dpm.h b/drivers/gpu/drm/radeon/btc_dpm.h
> index 3b6f12b..1a15e0e 100644
> --- a/drivers/gpu/drm/radeon/btc_dpm.h
> +++ b/drivers/gpu/drm/radeon/btc_dpm.h
> @@ -46,8 +46,6 @@ void btc_adjust_clock_combinations(struct radeon_device *rdev,
> struct rv7xx_pl *pl);
> void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
> u32 clock, u16 max_voltage, u16 *voltage);
> -void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
> - u32 *max_clock);
> void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
> u16 max_vddc, u16 max_vddci,
> u16 *vddc, u16 *vddci);
> diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
> index d416bb2..d199be3 100644
> --- a/drivers/gpu/drm/radeon/ci_dpm.c
> +++ b/drivers/gpu/drm/radeon/ci_dpm.c
> @@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[] =
> };
>
> extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
> -extern void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
> - u32 *max_clock);
> extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
> u32 arb_freq_src, u32 arb_freq_dest);
> extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
> @@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
> struct radeon_clock_and_voltage_limits *max_limits;
> bool disable_mclk_switching;
> u32 sclk, mclk;
> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
> int i;
>
> if (rps->vce_active) {
> @@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
> }
> }
>
> - /* limit clocks to max supported clocks based on voltage dependency tables */
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
> - &max_sclk_vddc);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
> - &max_mclk_vddci);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
> - &max_mclk_vddc);
> -
> - for (i = 0; i < ps->performance_level_count; i++) {
> - if (max_sclk_vddc) {
> - if (ps->performance_levels[i].sclk > max_sclk_vddc)
> - ps->performance_levels[i].sclk = max_sclk_vddc;
> - }
> - if (max_mclk_vddci) {
> - if (ps->performance_levels[i].mclk > max_mclk_vddci)
> - ps->performance_levels[i].mclk = max_mclk_vddci;
> - }
> - if (max_mclk_vddc) {
> - if (ps->performance_levels[i].mclk > max_mclk_vddc)
> - ps->performance_levels[i].mclk = max_mclk_vddc;
> - }
> - }
> -
> /* XXX validate the min clocks required for display */
>
> if (disable_mclk_switching) {
> diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
> index 01fc488..715b181 100644
> --- a/drivers/gpu/drm/radeon/ni_dpm.c
> +++ b/drivers/gpu/drm/radeon/ni_dpm.c
> @@ -789,7 +789,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
> bool disable_mclk_switching;
> u32 mclk;
> u16 vddci;
> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
> int i;
>
> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
> @@ -816,29 +815,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
> }
> }
>
> - /* limit clocks to max supported clocks based on voltage dependency tables */
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
> - &max_sclk_vddc);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
> - &max_mclk_vddci);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
> - &max_mclk_vddc);
> -
> - for (i = 0; i < ps->performance_level_count; i++) {
> - if (max_sclk_vddc) {
> - if (ps->performance_levels[i].sclk > max_sclk_vddc)
> - ps->performance_levels[i].sclk = max_sclk_vddc;
> - }
> - if (max_mclk_vddci) {
> - if (ps->performance_levels[i].mclk > max_mclk_vddci)
> - ps->performance_levels[i].mclk = max_mclk_vddci;
> - }
> - if (max_mclk_vddc) {
> - if (ps->performance_levels[i].mclk > max_mclk_vddc)
> - ps->performance_levels[i].mclk = max_mclk_vddc;
> - }
> - }
> -
> /* XXX validate the min clocks required for display */
>
> /* adjust low state */
> diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
> index 70e61ff..9e4d5d7 100644
> --- a/drivers/gpu/drm/radeon/si_dpm.c
> +++ b/drivers/gpu/drm/radeon/si_dpm.c
> @@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
> bool disable_sclk_switching = false;
> u32 mclk, sclk;
> u16 vddc, vddci;
> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
> int i;
>
> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
> @@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
> }
> }
>
> - /* limit clocks to max supported clocks based on voltage dependency tables */
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
> - &max_sclk_vddc);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
> - &max_mclk_vddci);
> - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
> - &max_mclk_vddc);
> -
> - for (i = 0; i < ps->performance_level_count; i++) {
> - if (max_sclk_vddc) {
> - if (ps->performance_levels[i].sclk > max_sclk_vddc)
> - ps->performance_levels[i].sclk = max_sclk_vddc;
> - }
> - if (max_mclk_vddci) {
> - if (ps->performance_levels[i].mclk > max_mclk_vddci)
> - ps->performance_levels[i].mclk = max_mclk_vddci;
> - }
> - if (max_mclk_vddc) {
> - if (ps->performance_levels[i].mclk > max_mclk_vddc)
> - ps->performance_levels[i].mclk = max_mclk_vddc;
> - }
> - }
> -
> /* XXX validate the min clocks required for display */
>
> if (disable_mclk_switching) {
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/radeon: Remove limitation on clock speeds
2014-09-23 5:08 ` Alexandre Demers
@ 2014-09-23 13:52 ` Alex Deucher
2014-09-23 19:38 ` Alexandre Demers
0 siblings, 1 reply; 4+ messages in thread
From: Alex Deucher @ 2014-09-23 13:52 UTC (permalink / raw)
To: Alexandre Demers; +Cc: Maling list - DRI developers
[-- Attachment #1: Type: text/plain, Size: 12799 bytes --]
On Tue, Sep 23, 2014 at 1:08 AM, Alexandre Demers
<alexandre.f.demers@gmail.com> wrote:
> Typo: this should be "Tested on kernel 3.17-rc6 on..."
>
> Alexandre Demers
>
>
> On 23/09/14 12:42 AM, Alexandre Demers wrote:
>>
>> Now that vddci has been fixed for dpm, we can let the GPUs
>> use their maximum values when not using the reference ones.
>>
>> Fixes bug 69721: Can't reach maximum memory speed (or core
>> speed) when using dpm=1 on r600g on cards not sticking to
>> reference board
>>
>> Tested on kernel 3.17-rc7 on a cayman gpu.
>>
>> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Thanks for testing this. I'd rather split this up into multiple
patches in case we need to revert it on a specific asic family if
problems arise. How about the attached patches?
Alex
>>
>> ---
>> drivers/gpu/drm/radeon/btc_dpm.c | 51
>> ----------------------------------------
>> drivers/gpu/drm/radeon/btc_dpm.h | 2 --
>> drivers/gpu/drm/radeon/ci_dpm.c | 26 --------------------
>> drivers/gpu/drm/radeon/ni_dpm.c | 24 -------------------
>> drivers/gpu/drm/radeon/si_dpm.c | 24 -------------------
>> 5 files changed, 127 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/btc_dpm.c
>> b/drivers/gpu/drm/radeon/btc_dpm.c
>> index f81d7ca..300d971 100644
>> --- a/drivers/gpu/drm/radeon/btc_dpm.c
>> +++ b/drivers/gpu/drm/radeon/btc_dpm.c
>> @@ -1170,23 +1170,6 @@ static const struct radeon_blacklist_clocks
>> btc_blacklist_clocks[] =
>> { 25000, 30000, RADEON_SCLK_UP }
>> };
>> -void btc_get_max_clock_from_voltage_dependency_table(struct
>> radeon_clock_voltage_dependency_table *table,
>> - u32 *max_clock)
>> -{
>> - u32 i, clock = 0;
>> -
>> - if ((table == NULL) || (table->count == 0)) {
>> - *max_clock = clock;
>> - return;
>> - }
>> -
>> - for (i = 0; i < table->count; i++) {
>> - if (clock < table->entries[i].clk)
>> - clock = table->entries[i].clk;
>> - }
>> - *max_clock = clock;
>> -}
>> -
>> void btc_apply_voltage_dependency_rules(struct
>> radeon_clock_voltage_dependency_table *table,
>> u32 clock, u16 max_voltage, u16
>> *voltage)
>> {
>> @@ -2099,7 +2082,6 @@ static void btc_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> bool disable_mclk_switching;
>> u32 mclk, sclk;
>> u16 vddc, vddci;
>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>> btc_dpm_vblank_too_short(rdev))
>> @@ -2141,39 +2123,6 @@ static void btc_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> ps->low.vddci = max_limits->vddci;
>> }
>> - /* limit clocks to max supported clocks based on voltage
>> dependency tables */
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>> - &max_sclk_vddc);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>> - &max_mclk_vddci);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>> - &max_mclk_vddc);
>> -
>> - if (max_sclk_vddc) {
>> - if (ps->low.sclk > max_sclk_vddc)
>> - ps->low.sclk = max_sclk_vddc;
>> - if (ps->medium.sclk > max_sclk_vddc)
>> - ps->medium.sclk = max_sclk_vddc;
>> - if (ps->high.sclk > max_sclk_vddc)
>> - ps->high.sclk = max_sclk_vddc;
>> - }
>> - if (max_mclk_vddci) {
>> - if (ps->low.mclk > max_mclk_vddci)
>> - ps->low.mclk = max_mclk_vddci;
>> - if (ps->medium.mclk > max_mclk_vddci)
>> - ps->medium.mclk = max_mclk_vddci;
>> - if (ps->high.mclk > max_mclk_vddci)
>> - ps->high.mclk = max_mclk_vddci;
>> - }
>> - if (max_mclk_vddc) {
>> - if (ps->low.mclk > max_mclk_vddc)
>> - ps->low.mclk = max_mclk_vddc;
>> - if (ps->medium.mclk > max_mclk_vddc)
>> - ps->medium.mclk = max_mclk_vddc;
>> - if (ps->high.mclk > max_mclk_vddc)
>> - ps->high.mclk = max_mclk_vddc;
>> - }
>> -
>> /* XXX validate the min clocks required for display */
>> if (disable_mclk_switching) {
>> diff --git a/drivers/gpu/drm/radeon/btc_dpm.h
>> b/drivers/gpu/drm/radeon/btc_dpm.h
>> index 3b6f12b..1a15e0e 100644
>> --- a/drivers/gpu/drm/radeon/btc_dpm.h
>> +++ b/drivers/gpu/drm/radeon/btc_dpm.h
>> @@ -46,8 +46,6 @@ void btc_adjust_clock_combinations(struct radeon_device
>> *rdev,
>> struct rv7xx_pl *pl);
>> void btc_apply_voltage_dependency_rules(struct
>> radeon_clock_voltage_dependency_table *table,
>> u32 clock, u16 max_voltage, u16
>> *voltage);
>> -void btc_get_max_clock_from_voltage_dependency_table(struct
>> radeon_clock_voltage_dependency_table *table,
>> - u32 *max_clock);
>> void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
>> u16 max_vddc, u16 max_vddci,
>> u16 *vddc, u16 *vddci);
>> diff --git a/drivers/gpu/drm/radeon/ci_dpm.c
>> b/drivers/gpu/drm/radeon/ci_dpm.c
>> index d416bb2..d199be3 100644
>> --- a/drivers/gpu/drm/radeon/ci_dpm.c
>> +++ b/drivers/gpu/drm/radeon/ci_dpm.c
>> @@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[]
>> =
>> };
>> extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
>> -extern void btc_get_max_clock_from_voltage_dependency_table(struct
>> radeon_clock_voltage_dependency_table *table,
>> - u32
>> *max_clock);
>> extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
>> u32 arb_freq_src, u32
>> arb_freq_dest);
>> extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
>> @@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> struct radeon_clock_and_voltage_limits *max_limits;
>> bool disable_mclk_switching;
>> u32 sclk, mclk;
>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>> int i;
>> if (rps->vce_active) {
>> @@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> }
>> }
>> - /* limit clocks to max supported clocks based on voltage
>> dependency tables */
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>> - &max_sclk_vddc);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>> - &max_mclk_vddci);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>> - &max_mclk_vddc);
>> -
>> - for (i = 0; i < ps->performance_level_count; i++) {
>> - if (max_sclk_vddc) {
>> - if (ps->performance_levels[i].sclk >
>> max_sclk_vddc)
>> - ps->performance_levels[i].sclk =
>> max_sclk_vddc;
>> - }
>> - if (max_mclk_vddci) {
>> - if (ps->performance_levels[i].mclk >
>> max_mclk_vddci)
>> - ps->performance_levels[i].mclk =
>> max_mclk_vddci;
>> - }
>> - if (max_mclk_vddc) {
>> - if (ps->performance_levels[i].mclk >
>> max_mclk_vddc)
>> - ps->performance_levels[i].mclk =
>> max_mclk_vddc;
>> - }
>> - }
>> -
>> /* XXX validate the min clocks required for display */
>> if (disable_mclk_switching) {
>> diff --git a/drivers/gpu/drm/radeon/ni_dpm.c
>> b/drivers/gpu/drm/radeon/ni_dpm.c
>> index 01fc488..715b181 100644
>> --- a/drivers/gpu/drm/radeon/ni_dpm.c
>> +++ b/drivers/gpu/drm/radeon/ni_dpm.c
>> @@ -789,7 +789,6 @@ static void ni_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> bool disable_mclk_switching;
>> u32 mclk;
>> u16 vddci;
>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>> int i;
>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>> @@ -816,29 +815,6 @@ static void ni_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> }
>> }
>> - /* limit clocks to max supported clocks based on voltage
>> dependency tables */
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>> - &max_sclk_vddc);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>> - &max_mclk_vddci);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>> - &max_mclk_vddc);
>> -
>> - for (i = 0; i < ps->performance_level_count; i++) {
>> - if (max_sclk_vddc) {
>> - if (ps->performance_levels[i].sclk >
>> max_sclk_vddc)
>> - ps->performance_levels[i].sclk =
>> max_sclk_vddc;
>> - }
>> - if (max_mclk_vddci) {
>> - if (ps->performance_levels[i].mclk >
>> max_mclk_vddci)
>> - ps->performance_levels[i].mclk =
>> max_mclk_vddci;
>> - }
>> - if (max_mclk_vddc) {
>> - if (ps->performance_levels[i].mclk >
>> max_mclk_vddc)
>> - ps->performance_levels[i].mclk =
>> max_mclk_vddc;
>> - }
>> - }
>> -
>> /* XXX validate the min clocks required for display */
>> /* adjust low state */
>> diff --git a/drivers/gpu/drm/radeon/si_dpm.c
>> b/drivers/gpu/drm/radeon/si_dpm.c
>> index 70e61ff..9e4d5d7 100644
>> --- a/drivers/gpu/drm/radeon/si_dpm.c
>> +++ b/drivers/gpu/drm/radeon/si_dpm.c
>> @@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> bool disable_sclk_switching = false;
>> u32 mclk, sclk;
>> u16 vddc, vddci;
>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>> int i;
>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>> @@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct
>> radeon_device *rdev,
>> }
>> }
>> - /* limit clocks to max supported clocks based on voltage
>> dependency tables */
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>> - &max_sclk_vddc);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>> - &max_mclk_vddci);
>> -
>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>> - &max_mclk_vddc);
>> -
>> - for (i = 0; i < ps->performance_level_count; i++) {
>> - if (max_sclk_vddc) {
>> - if (ps->performance_levels[i].sclk >
>> max_sclk_vddc)
>> - ps->performance_levels[i].sclk =
>> max_sclk_vddc;
>> - }
>> - if (max_mclk_vddci) {
>> - if (ps->performance_levels[i].mclk >
>> max_mclk_vddci)
>> - ps->performance_levels[i].mclk =
>> max_mclk_vddci;
>> - }
>> - if (max_mclk_vddc) {
>> - if (ps->performance_levels[i].mclk >
>> max_mclk_vddc)
>> - ps->performance_levels[i].mclk =
>> max_mclk_vddc;
>> - }
>> - }
>> -
>> /* XXX validate the min clocks required for display */
>> if (disable_mclk_switching) {
>
>
[-- Attachment #2: 0005-drm-radeon-drop-btc_get_max_clock_from_voltage_depen.patch --]
[-- Type: text/x-diff, Size: 2089 bytes --]
From 305a121dcf5945596267f3b551c9508e25f496bd Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 23 Sep 2014 09:45:32 -0400
Subject: [PATCH 5/5] drm/radeon: drop
btc_get_max_clock_from_voltage_dependency_table
It's no longer used now that the underlying bugs are fixed.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/btc_dpm.c | 17 -----------------
drivers/gpu/drm/radeon/btc_dpm.h | 2 --
2 files changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index b718160..300d971 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -1170,23 +1170,6 @@ static const struct radeon_blacklist_clocks btc_blacklist_clocks[] =
{ 25000, 30000, RADEON_SCLK_UP }
};
-void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
- u32 *max_clock)
-{
- u32 i, clock = 0;
-
- if ((table == NULL) || (table->count == 0)) {
- *max_clock = clock;
- return;
- }
-
- for (i = 0; i < table->count; i++) {
- if (clock < table->entries[i].clk)
- clock = table->entries[i].clk;
- }
- *max_clock = clock;
-}
-
void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
u32 clock, u16 max_voltage, u16 *voltage)
{
diff --git a/drivers/gpu/drm/radeon/btc_dpm.h b/drivers/gpu/drm/radeon/btc_dpm.h
index 3b6f12b..1a15e0e 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.h
+++ b/drivers/gpu/drm/radeon/btc_dpm.h
@@ -46,8 +46,6 @@ void btc_adjust_clock_combinations(struct radeon_device *rdev,
struct rv7xx_pl *pl);
void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
u32 clock, u16 max_voltage, u16 *voltage);
-void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
- u32 *max_clock);
void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
u16 max_vddc, u16 max_vddci,
u16 *vddc, u16 *vddci);
--
1.8.3.1
[-- Attachment #3: 0004-drm-radeon-dpm-drop-clk-voltage-dependency-filters-f.patch --]
[-- Type: text/x-diff, Size: 2558 bytes --]
From a44a36933794490360094bcd9b95918a1dafff48 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 23 Sep 2014 09:42:09 -0400
Subject: [PATCH 4/5] drm/radeon/dpm: drop clk/voltage dependency filters for
BTC
No longer needed now that the underlying bug was fixed in
e07929810f0a19ddd756558290c7d72827cbfcd9
(drm/radeon/dpm: fix typo in vddci setup for eg/btc).
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/btc_dpm.c | 34 ----------------------------------
1 file changed, 34 deletions(-)
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index f81d7ca..b718160 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -2099,7 +2099,6 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev,
bool disable_mclk_switching;
u32 mclk, sclk;
u16 vddc, vddci;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
btc_dpm_vblank_too_short(rdev))
@@ -2141,39 +2140,6 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev,
ps->low.vddci = max_limits->vddci;
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- if (max_sclk_vddc) {
- if (ps->low.sclk > max_sclk_vddc)
- ps->low.sclk = max_sclk_vddc;
- if (ps->medium.sclk > max_sclk_vddc)
- ps->medium.sclk = max_sclk_vddc;
- if (ps->high.sclk > max_sclk_vddc)
- ps->high.sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->low.mclk > max_mclk_vddci)
- ps->low.mclk = max_mclk_vddci;
- if (ps->medium.mclk > max_mclk_vddci)
- ps->medium.mclk = max_mclk_vddci;
- if (ps->high.mclk > max_mclk_vddci)
- ps->high.mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->low.mclk > max_mclk_vddc)
- ps->low.mclk = max_mclk_vddc;
- if (ps->medium.mclk > max_mclk_vddc)
- ps->medium.mclk = max_mclk_vddc;
- if (ps->high.mclk > max_mclk_vddc)
- ps->high.mclk = max_mclk_vddc;
- }
-
/* XXX validate the min clocks required for display */
if (disable_mclk_switching) {
--
1.8.3.1
[-- Attachment #4: 0003-drm-radeon-dpm-drop-clk-voltage-dependency-filters-f.patch --]
[-- Type: text/x-diff, Size: 2611 bytes --]
From 42bea3c776f9c5b50fe6b21dedc5d7971baad988 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 23 Sep 2014 09:40:24 -0400
Subject: [PATCH 3/5] drm/radeon/dpm: drop clk/voltage dependency filters for
CI
Not sure this was ever necessary for CI, was just done
to be on the safe side.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/ci_dpm.c | 26 --------------------------
1 file changed, 26 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index d416bb2..d199be3 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[] =
};
extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
-extern void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
- u32 *max_clock);
extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
u32 arb_freq_src, u32 arb_freq_dest);
extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
@@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
struct radeon_clock_and_voltage_limits *max_limits;
bool disable_mclk_switching;
u32 sclk, mclk;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
int i;
if (rps->vce_active) {
@@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
}
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- for (i = 0; i < ps->performance_level_count; i++) {
- if (max_sclk_vddc) {
- if (ps->performance_levels[i].sclk > max_sclk_vddc)
- ps->performance_levels[i].sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->performance_levels[i].mclk > max_mclk_vddci)
- ps->performance_levels[i].mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->performance_levels[i].mclk > max_mclk_vddc)
- ps->performance_levels[i].mclk = max_mclk_vddc;
- }
- }
-
/* XXX validate the min clocks required for display */
if (disable_mclk_switching) {
--
1.8.3.1
[-- Attachment #5: 0002-drm-radeon-dpm-drop-clk-voltage-dependency-filters-f.patch --]
[-- Type: text/x-diff, Size: 2135 bytes --]
From 25945b71ffcd4f26835d6aceb765d0713dcaa9a7 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 23 Sep 2014 09:37:37 -0400
Subject: [PATCH 2/5] drm/radeon/dpm: drop clk/voltage dependency filters for
SI
Not sure this was ever necessary for SI, was just done
to be on the safe side.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/si_dpm.c | 24 ------------------------
1 file changed, 24 deletions(-)
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 70e61ff..9e4d5d7 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
bool disable_sclk_switching = false;
u32 mclk, sclk;
u16 vddc, vddci;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
int i;
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
@@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
}
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- for (i = 0; i < ps->performance_level_count; i++) {
- if (max_sclk_vddc) {
- if (ps->performance_levels[i].sclk > max_sclk_vddc)
- ps->performance_levels[i].sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->performance_levels[i].mclk > max_mclk_vddci)
- ps->performance_levels[i].mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->performance_levels[i].mclk > max_mclk_vddc)
- ps->performance_levels[i].mclk = max_mclk_vddc;
- }
- }
-
/* XXX validate the min clocks required for display */
if (disable_mclk_switching) {
--
1.8.3.1
[-- Attachment #6: 0001-drm-radeon-dpm-drop-clk-voltage-dependency-filters-f.patch --]
[-- Type: text/x-diff, Size: 2174 bytes --]
From be2bae17c86670d2af271e4df6644d27ef105114 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 23 Sep 2014 09:34:06 -0400
Subject: [PATCH 1/5] drm/radeon/dpm: drop clk/voltage dependency filters for
NI
No longer needed now that the underlying bug was fixed in
b0880e87c1fd038b84498944f52e52c3e86ebe59
(drm/radeon/dpm: fix vddci setup typo on cayman).
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/ni_dpm.c | 24 ------------------------
1 file changed, 24 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index 01fc488..715b181 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -789,7 +789,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
bool disable_mclk_switching;
u32 mclk;
u16 vddci;
- u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
int i;
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
@@ -816,29 +815,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
}
}
- /* limit clocks to max supported clocks based on voltage dependency tables */
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
- &max_sclk_vddc);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
- &max_mclk_vddci);
- btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
- &max_mclk_vddc);
-
- for (i = 0; i < ps->performance_level_count; i++) {
- if (max_sclk_vddc) {
- if (ps->performance_levels[i].sclk > max_sclk_vddc)
- ps->performance_levels[i].sclk = max_sclk_vddc;
- }
- if (max_mclk_vddci) {
- if (ps->performance_levels[i].mclk > max_mclk_vddci)
- ps->performance_levels[i].mclk = max_mclk_vddci;
- }
- if (max_mclk_vddc) {
- if (ps->performance_levels[i].mclk > max_mclk_vddc)
- ps->performance_levels[i].mclk = max_mclk_vddc;
- }
- }
-
/* XXX validate the min clocks required for display */
/* adjust low state */
--
1.8.3.1
[-- Attachment #7: Type: text/plain, Size: 159 bytes --]
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/radeon: Remove limitation on clock speeds
2014-09-23 13:52 ` Alex Deucher
@ 2014-09-23 19:38 ` Alexandre Demers
0 siblings, 0 replies; 4+ messages in thread
From: Alexandre Demers @ 2014-09-23 19:38 UTC (permalink / raw)
To: Alex Deucher; +Cc: Maling list - DRI developers
It seems good to me.
For the serie
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
For for 1 and 5
Tested-by: Alexandre Demers <alexandre.f.demers@gmail.com> on kernel 3.17-rc6
On Tue, Sep 23, 2014 at 9:52 AM, Alex Deucher <alexdeucher@gmail.com> wrote:
> On Tue, Sep 23, 2014 at 1:08 AM, Alexandre Demers
> <alexandre.f.demers@gmail.com> wrote:
>> Typo: this should be "Tested on kernel 3.17-rc6 on..."
>>
>> Alexandre Demers
>>
>>
>> On 23/09/14 12:42 AM, Alexandre Demers wrote:
>>>
>>> Now that vddci has been fixed for dpm, we can let the GPUs
>>> use their maximum values when not using the reference ones.
>>>
>>> Fixes bug 69721: Can't reach maximum memory speed (or core
>>> speed) when using dpm=1 on r600g on cards not sticking to
>>> reference board
>>>
>>> Tested on kernel 3.17-rc7 on a cayman gpu.
>>>
>>> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
>
> Thanks for testing this. I'd rather split this up into multiple
> patches in case we need to revert it on a specific asic family if
> problems arise. How about the attached patches?
>
> Alex
>
>>>
>>> ---
>>> drivers/gpu/drm/radeon/btc_dpm.c | 51
>>> ----------------------------------------
>>> drivers/gpu/drm/radeon/btc_dpm.h | 2 --
>>> drivers/gpu/drm/radeon/ci_dpm.c | 26 --------------------
>>> drivers/gpu/drm/radeon/ni_dpm.c | 24 -------------------
>>> drivers/gpu/drm/radeon/si_dpm.c | 24 -------------------
>>> 5 files changed, 127 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/radeon/btc_dpm.c
>>> b/drivers/gpu/drm/radeon/btc_dpm.c
>>> index f81d7ca..300d971 100644
>>> --- a/drivers/gpu/drm/radeon/btc_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/btc_dpm.c
>>> @@ -1170,23 +1170,6 @@ static const struct radeon_blacklist_clocks
>>> btc_blacklist_clocks[] =
>>> { 25000, 30000, RADEON_SCLK_UP }
>>> };
>>> -void btc_get_max_clock_from_voltage_dependency_table(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> - u32 *max_clock)
>>> -{
>>> - u32 i, clock = 0;
>>> -
>>> - if ((table == NULL) || (table->count == 0)) {
>>> - *max_clock = clock;
>>> - return;
>>> - }
>>> -
>>> - for (i = 0; i < table->count; i++) {
>>> - if (clock < table->entries[i].clk)
>>> - clock = table->entries[i].clk;
>>> - }
>>> - *max_clock = clock;
>>> -}
>>> -
>>> void btc_apply_voltage_dependency_rules(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> u32 clock, u16 max_voltage, u16
>>> *voltage)
>>> {
>>> @@ -2099,7 +2082,6 @@ static void btc_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> bool disable_mclk_switching;
>>> u32 mclk, sclk;
>>> u16 vddc, vddci;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>>> btc_dpm_vblank_too_short(rdev))
>>> @@ -2141,39 +2123,6 @@ static void btc_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> ps->low.vddci = max_limits->vddci;
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - if (max_sclk_vddc) {
>>> - if (ps->low.sclk > max_sclk_vddc)
>>> - ps->low.sclk = max_sclk_vddc;
>>> - if (ps->medium.sclk > max_sclk_vddc)
>>> - ps->medium.sclk = max_sclk_vddc;
>>> - if (ps->high.sclk > max_sclk_vddc)
>>> - ps->high.sclk = max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->low.mclk > max_mclk_vddci)
>>> - ps->low.mclk = max_mclk_vddci;
>>> - if (ps->medium.mclk > max_mclk_vddci)
>>> - ps->medium.mclk = max_mclk_vddci;
>>> - if (ps->high.mclk > max_mclk_vddci)
>>> - ps->high.mclk = max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->low.mclk > max_mclk_vddc)
>>> - ps->low.mclk = max_mclk_vddc;
>>> - if (ps->medium.mclk > max_mclk_vddc)
>>> - ps->medium.mclk = max_mclk_vddc;
>>> - if (ps->high.mclk > max_mclk_vddc)
>>> - ps->high.mclk = max_mclk_vddc;
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> if (disable_mclk_switching) {
>>> diff --git a/drivers/gpu/drm/radeon/btc_dpm.h
>>> b/drivers/gpu/drm/radeon/btc_dpm.h
>>> index 3b6f12b..1a15e0e 100644
>>> --- a/drivers/gpu/drm/radeon/btc_dpm.h
>>> +++ b/drivers/gpu/drm/radeon/btc_dpm.h
>>> @@ -46,8 +46,6 @@ void btc_adjust_clock_combinations(struct radeon_device
>>> *rdev,
>>> struct rv7xx_pl *pl);
>>> void btc_apply_voltage_dependency_rules(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> u32 clock, u16 max_voltage, u16
>>> *voltage);
>>> -void btc_get_max_clock_from_voltage_dependency_table(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> - u32 *max_clock);
>>> void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
>>> u16 max_vddc, u16 max_vddci,
>>> u16 *vddc, u16 *vddci);
>>> diff --git a/drivers/gpu/drm/radeon/ci_dpm.c
>>> b/drivers/gpu/drm/radeon/ci_dpm.c
>>> index d416bb2..d199be3 100644
>>> --- a/drivers/gpu/drm/radeon/ci_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/ci_dpm.c
>>> @@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[]
>>> =
>>> };
>>> extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
>>> -extern void btc_get_max_clock_from_voltage_dependency_table(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> - u32
>>> *max_clock);
>>> extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
>>> u32 arb_freq_src, u32
>>> arb_freq_dest);
>>> extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
>>> @@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> struct radeon_clock_and_voltage_limits *max_limits;
>>> bool disable_mclk_switching;
>>> u32 sclk, mclk;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> int i;
>>> if (rps->vce_active) {
>>> @@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> }
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - for (i = 0; i < ps->performance_level_count; i++) {
>>> - if (max_sclk_vddc) {
>>> - if (ps->performance_levels[i].sclk >
>>> max_sclk_vddc)
>>> - ps->performance_levels[i].sclk =
>>> max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddci)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddc)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddc;
>>> - }
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> if (disable_mclk_switching) {
>>> diff --git a/drivers/gpu/drm/radeon/ni_dpm.c
>>> b/drivers/gpu/drm/radeon/ni_dpm.c
>>> index 01fc488..715b181 100644
>>> --- a/drivers/gpu/drm/radeon/ni_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/ni_dpm.c
>>> @@ -789,7 +789,6 @@ static void ni_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> bool disable_mclk_switching;
>>> u32 mclk;
>>> u16 vddci;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> int i;
>>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>>> @@ -816,29 +815,6 @@ static void ni_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> }
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - for (i = 0; i < ps->performance_level_count; i++) {
>>> - if (max_sclk_vddc) {
>>> - if (ps->performance_levels[i].sclk >
>>> max_sclk_vddc)
>>> - ps->performance_levels[i].sclk =
>>> max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddci)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddc)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddc;
>>> - }
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> /* adjust low state */
>>> diff --git a/drivers/gpu/drm/radeon/si_dpm.c
>>> b/drivers/gpu/drm/radeon/si_dpm.c
>>> index 70e61ff..9e4d5d7 100644
>>> --- a/drivers/gpu/drm/radeon/si_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/si_dpm.c
>>> @@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> bool disable_sclk_switching = false;
>>> u32 mclk, sclk;
>>> u16 vddc, vddci;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> int i;
>>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>>> @@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> }
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - for (i = 0; i < ps->performance_level_count; i++) {
>>> - if (max_sclk_vddc) {
>>> - if (ps->performance_levels[i].sclk >
>>> max_sclk_vddc)
>>> - ps->performance_levels[i].sclk =
>>> max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddci)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddc)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddc;
>>> - }
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> if (disable_mclk_switching) {
>>
>>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-09-23 19:38 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-23 4:42 [PATCH] drm/radeon: Remove limitation on clock speeds Alexandre Demers
2014-09-23 5:08 ` Alexandre Demers
2014-09-23 13:52 ` Alex Deucher
2014-09-23 19:38 ` Alexandre Demers
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