Re: [PATCH] PCI: quirks: Quirk PCI d3hot delay for AMD xhci

[Alex Deucher <alexdeucher@gmail.com>]

On Thu, Mar 18, 2021 at 2:36 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> On Tue, Mar 16, 2021 at 03:28:51PM -0400, Alex Deucher wrote:
> > From: Marcin Bachry <hegel666@gmail.com>
> >
> > Renoir needs a similar delay.
>
> See https://lore.kernel.org/linux-pci/20210311125322.GA2122226@bjorn-Precision-5520/
>
> This is becoming a problem.  We shouldn't have to merge a quirk for
> every new device.  Either the devices are defective, and AMD should
> publish errata and have a plan for fixing them, or Linux is broken and
> we should fix that.
>
> There are quite a few mechanisms for controlling delays like this
> (Config Request Retry Status (PCIe r5.0, sec 2.3.1), Readiness
> Notifications (sec 6.23), ACPI _DSM for power-on delays (PCI Firmware
> Spec r3.3)), but most are for *reducing* delay, not for extending it.
>
> Linux supports CRS, but not all the others.  Maybe we're missing
> something we should support?
>
> How do you deal with these issues for Windows?  If it works on Windows
> without quirks, we should be able to make it work on Linux as well.

It works fine in windows.  Unfortunately, it's hard to tell what
windows does exactly since MS supplies the USB driver in that case.
Also, the extended delays are not necessary on our reference
platforms, these seem to only be an issue on some OEM platforms.  I
did confirm with the windows team that we use d3hot for USB on our
current platforms due to bios bugs, but this is fixed on upcoming
platforms.  Still digging for any more details.

>
> > Signed-off-by: Marcin Bachry <hegel666@gmail.com>
> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> > ---
> >  drivers/pci/quirks.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > index 653660e3ba9e..36e5ec670fae 100644
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
> > @@ -1904,6 +1904,9 @@ static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
> >  }
> >  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
> >  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
> > +/* Renoir XHCI requires longer delay when transitioning from D0 to
> > + * D3hot */
>
> No need for "me too" comments that add no additional information.

Will drop that.

Alex

>
> > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1639, quirk_ryzen_xhci_d3hot);
> >
> >  #ifdef CONFIG_X86_IO_APIC
> >  static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
> > --
> > 2.30.2
> >
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