some minor dal cleanups and example of future patches

some minor dal cleanups and example of future patches

[Dave Airlie]

So whenever I look at DAL I find myself trying to figure out what
all of it does, and this leads me to deleting things, so I'm just
sending out some stuff that I cleaned today.

One thing I noticed in passing is the displayport code seems
possibly endian unsafe, it casts bytes read from hardware into
bitfields, this is the best defined behaviour and is generally
a pattern we try to steer away from.

The porting the displayport code to use drm defines is the
sort of example of a cleanup patch that might cause problems
for you in code sharing, but is the exact sort of patch that
has been applied to other drivers in the past.

Dave.

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[PATCH 1/8] dc: remove dc hub - this seems unused.

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c           | 27 ----------------------
 drivers/gpu/drm/amd/display/dc/dc.h                | 17 --------------
 .../drm/amd/display/dc/dce110/dce110_mem_input.c   |  1 -
 .../gpu/drm/amd/display/dc/dce80/dce80_mem_input.c |  1 -
 drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h  |  3 ---
 5 files changed, 49 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 8e1d695..8697d7c 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1828,30 +1828,3 @@ const struct dc_stream_status *dc_stream_get_status(
 	return &stream->status;
 }
 
-bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data)
-{
-	int i;
-	struct core_dc *core_dc = DC_TO_CORE(dc);
-	struct mem_input *mi = NULL;
-
-	for (i = 0; i < core_dc->res_pool->pipe_count; i++) {
-		if (core_dc->res_pool->mis[i] != NULL) {
-			mi = core_dc->res_pool->mis[i];
-			break;
-		}
-	}
-	if (mi == NULL) {
-		dm_error("no mem_input!\n");
-		return false;
-	}
-
-	if (mi->funcs->mem_input_update_dchub)
-		mi->funcs->mem_input_update_dchub(mi, dh_data);
-	else
-		ASSERT(mi->funcs->mem_input_update_dchub);
-
-
-	return true;
-
-}
-
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 5f60800..376981e 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -157,21 +157,6 @@ struct dc {
 	struct dc_debug debug;
 };
 
-enum frame_buffer_mode {
-	FRAME_BUFFER_MODE_LOCAL_ONLY = 0,
-	FRAME_BUFFER_MODE_ZFB_ONLY,
-	FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL,
-} ;
-
-struct dchub_init_data {
-	bool dchub_initialzied;
-	bool dchub_info_valid;
-	int64_t zfb_phys_addr_base;
-	int64_t zfb_mc_base_addr;
-	uint64_t zfb_size_in_byte;
-	enum frame_buffer_mode fb_mode;
-};
-
 struct dc_init_data {
 	struct hw_asic_id asic_id;
 	void *driver; /* ctx */
@@ -192,8 +177,6 @@ struct dc *dc_create(const struct dc_init_data *init_params);
 
 void dc_destroy(struct dc **dc);
 
-bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data);
-
 /*******************************************************************************
  * Surface Interfaces
  ******************************************************************************/
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input.c
index af9d682..a28bb4d 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input.c
@@ -396,7 +396,6 @@ static struct mem_input_funcs dce110_mem_input_funcs = {
 			dce_mem_input_program_surface_config,
 	.mem_input_is_flip_pending =
 			dce110_mem_input_is_flip_pending,
-	.mem_input_update_dchub = NULL
 };
 /*****************************************/
 /* Constructor, Destructor               */
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c
index ebb8df3..704a7ce 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c
@@ -54,7 +54,6 @@ static struct mem_input_funcs dce80_mem_input_funcs = {
 			dce_mem_input_program_surface_config,
 	.mem_input_is_flip_pending =
 			dce110_mem_input_is_flip_pending,
-	.mem_input_update_dchub = NULL
 };
 
 /*****************************************/
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
index 80566c8..d960db6 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
@@ -98,9 +98,6 @@ struct mem_input_funcs {
 		bool horizontal_mirror);
 
 	bool (*mem_input_is_flip_pending)(struct mem_input *mem_input);
-
-	void (*mem_input_update_dchub)(struct mem_input *mem_input,
-			struct dchub_init_data *dh_data);
 };
 
 #endif
-- 
2.9.3

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[PATCH 2/8] dal: remove some unused wrappers

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index 9d51259..9c852a3 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -36,10 +36,6 @@
 #include "amdgpu_dm_types.h"
 #include "amdgpu_pm.h"
 
-#define dm_alloc(size) kzalloc(size, GFP_KERNEL)
-#define dm_realloc(ptr, size) krealloc(ptr, size, GFP_KERNEL)
-#define dm_free(ptr) kfree(ptr)
-
 /******************************************************************************
  * IRQ Interfaces.
  *****************************************************************************/
-- 
2.9.3

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[PATCH 3/8] dal: drop register logger and pid/tgid getters

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

While I'm sure this is useful I think we should bring it back later.

It's usage of pid/tgid is incorrect, you have to get/put
pid/tgids not store them away.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c |  10 --
 drivers/gpu/drm/amd/display/dc/basics/Makefile     |   2 +-
 .../drm/amd/display/dc/basics/register_logger.c    | 197 ---------------------
 drivers/gpu/drm/amd/display/dc/dm_services.h       |  16 --
 .../drm/amd/display/include/dal_register_logger.h  |  42 -----
 5 files changed, 1 insertion(+), 266 deletions(-)
 delete mode 100644 drivers/gpu/drm/amd/display/dc/basics/register_logger.c
 delete mode 100644 drivers/gpu/drm/amd/display/include/dal_register_logger.h

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index 9c852a3..565be05 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -447,13 +447,3 @@ void dal_notify_setmode_complete(struct dc_context *ctx,
 	/*TODO*/
 }
 /* End of calls to notification */
-
-long dm_get_pid(void)
-{
-	return current->pid;
-}
-
-long dm_get_tgid(void)
-{
-	return current->tgid;
-}
diff --git a/drivers/gpu/drm/amd/display/dc/basics/Makefile b/drivers/gpu/drm/amd/display/dc/basics/Makefile
index a263cad..0658162 100644
--- a/drivers/gpu/drm/amd/display/dc/basics/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/basics/Makefile
@@ -4,7 +4,7 @@
 # subcomponents.
 
 BASICS = conversion.o fixpt31_32.o fixpt32_32.o grph_object_id.o \
-	logger.o log_helpers.o register_logger.o signal_types.o vector.o
+	logger.o log_helpers.o signal_types.o vector.o
 
 AMD_DAL_BASICS = $(addprefix $(AMDDALPATH)/dc/basics/,$(BASICS))
 
diff --git a/drivers/gpu/drm/amd/display/dc/basics/register_logger.c b/drivers/gpu/drm/amd/display/dc/basics/register_logger.c
deleted file mode 100644
index b8d57d9..0000000
--- a/drivers/gpu/drm/amd/display/dc/basics/register_logger.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * Copyright 2012-15 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#include "dm_services.h"
-#include "include/dal_types.h"
-#include "include/logger_interface.h"
-#include "logger.h"
-
-/******************************************************************************
- * Register Logger.
- * A facility to create register R/W logs.
- * Currently used for DAL Test.
- *****************************************************************************/
-
-/******************************************************************************
- * Private structures
- *****************************************************************************/
-struct dal_reg_dump_stack_location {
-	const char *current_caller_func;
-	long current_pid;
-	long current_tgid;
-	uint32_t rw_count;/* register access counter for current function. */
-};
-
-/* This the maximum number of nested calls to the 'reg_dump' facility. */
-#define DAL_REG_DUMP_STACK_MAX_SIZE 32
-
-struct dal_reg_dump_stack {
-	int32_t stack_pointer;
-	struct dal_reg_dump_stack_location
-		stack_locations[DAL_REG_DUMP_STACK_MAX_SIZE];
-	uint32_t total_rw_count; /* Total count for *all* functions. */
-};
-
-static struct dal_reg_dump_stack reg_dump_stack = {0};
-
-/******************************************************************************
- * Private functions
- *****************************************************************************/
-
-/* Check if current process is the one which requested register dump.
- * The reason for the check:
- * mmCRTC_STATUS_FRAME_COUNT is accessed by dal_controller_get_vblank_counter().
- * Which runs all the time when at least one display is connected.
- * (Triggered by drm_mode_page_flip_ioctl()). */
-static bool is_reg_dump_process(void)
-{
-	uint32_t i;
-
-	/* walk the list of our processes */
-	for (i = 0; i < reg_dump_stack.stack_pointer; i++) {
-		struct dal_reg_dump_stack_location *stack_location
-					= &reg_dump_stack.stack_locations[i];
-
-		if (stack_location->current_pid == dm_get_pid()
-			&& stack_location->current_tgid == dm_get_tgid())
-			return true;
-	}
-
-	return false;
-}
-
-static bool dal_reg_dump_stack_is_empty(void)
-{
-	if (reg_dump_stack.stack_pointer <= 0)
-		return true;
-	else
-		return false;
-}
-
-static struct dal_reg_dump_stack_location *dal_reg_dump_stack_push(void)
-{
-	struct dal_reg_dump_stack_location *current_location = NULL;
-
-	if (reg_dump_stack.stack_pointer >= DAL_REG_DUMP_STACK_MAX_SIZE) {
-		/* stack is full */
-		dm_output_to_console("[REG_DUMP]: %s: stack is full!\n",
-				__func__);
-	} else {
-		current_location =
-		&reg_dump_stack.stack_locations[reg_dump_stack.stack_pointer];
-		++reg_dump_stack.stack_pointer;
-	}
-
-	return current_location;
-}
-
-static struct dal_reg_dump_stack_location *dal_reg_dump_stack_pop(void)
-{
-	struct dal_reg_dump_stack_location *current_location = NULL;
-
-	if (dal_reg_dump_stack_is_empty()) {
-		/* stack is empty */
-		dm_output_to_console("[REG_DUMP]: %s: stack is empty!\n",
-				__func__);
-	} else {
-		--reg_dump_stack.stack_pointer;
-		current_location =
-		&reg_dump_stack.stack_locations[reg_dump_stack.stack_pointer];
-	}
-
-	return current_location;
-}
-
-/******************************************************************************
- * Public functions
- *****************************************************************************/
-
-void dal_reg_logger_push(const char *caller_func)
-{
-	struct dal_reg_dump_stack_location *free_stack_location;
-
-	free_stack_location = dal_reg_dump_stack_push();
-
-	if (NULL == free_stack_location)
-		return;
-
-	memset(free_stack_location, 0, sizeof(*free_stack_location));
-
-	free_stack_location->current_caller_func = caller_func;
-	free_stack_location->current_pid = dm_get_pid();
-	free_stack_location->current_tgid = dm_get_tgid();
-
-	dm_output_to_console("[REG_DUMP]:%s - start (pid:%ld, tgid:%ld)\n",
-		caller_func,
-		free_stack_location->current_pid,
-		free_stack_location->current_tgid);
-}
-
-void dal_reg_logger_pop(void)
-{
-	struct dal_reg_dump_stack_location *top_stack_location;
-
-	top_stack_location = dal_reg_dump_stack_pop();
-
-	if (NULL == top_stack_location) {
-		dm_output_to_console("[REG_DUMP]:%s - Stack is Empty!\n",
-				__func__);
-		return;
-	}
-
-	dm_output_to_console(
-	"[REG_DUMP]:%s - end."\
-	" Reg R/W Count: Total=%d Function=%d. (pid:%ld, tgid:%ld)\n",
-			top_stack_location->current_caller_func,
-			reg_dump_stack.total_rw_count,
-			top_stack_location->rw_count,
-			dm_get_pid(),
-			dm_get_tgid());
-
-	memset(top_stack_location, 0, sizeof(*top_stack_location));
-}
-
-void dal_reg_logger_rw_count_increment(void)
-{
-	++reg_dump_stack.total_rw_count;
-
-	++reg_dump_stack.stack_locations
-		[reg_dump_stack.stack_pointer - 1].rw_count;
-}
-
-bool dal_reg_logger_should_dump_register(void)
-{
-	if (true == dal_reg_dump_stack_is_empty())
-		return false;
-
-	if (false == is_reg_dump_process())
-		return false;
-
-	return true;
-}
-
-/******************************************************************************
- * End of File.
- *****************************************************************************/
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
index 7a3f103..f3f9a40 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
@@ -109,12 +109,6 @@ static inline uint32_t dm_read_reg_func(
 
 	value = cgs_read_register(ctx->cgs_device, address);
 
-#if defined(__DAL_REGISTER_LOGGER__)
-	if (true == dal_reg_logger_should_dump_register()) {
-		dal_reg_logger_rw_count_increment();
-		DRM_INFO("%s DC_READ_REG: 0x%x 0x%x\n", func_name, address, value);
-	}
-#endif
 	return value;
 }
 
@@ -127,13 +121,6 @@ static inline void dm_write_reg_func(
 	uint32_t value,
 	const char *func_name)
 {
-#if defined(__DAL_REGISTER_LOGGER__)
-	if (true == dal_reg_logger_should_dump_register()) {
-		dal_reg_logger_rw_count_increment();
-		DRM_INFO("%s DC_WRITE_REG: 0x%x 0x%x\n", func_name, address, value);
-	}
-#endif
-
 	if (address == 0) {
 		DC_ERR("invalid register write. address = 0");
 		return;
@@ -418,7 +405,4 @@ bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
 #define dm_log_to_buffer(buffer, size, fmt, args)\
 	vsnprintf(buffer, size, fmt, args)
 
-long dm_get_pid(void);
-long dm_get_tgid(void);
-
 #endif /* __DM_SERVICES_H__ */
diff --git a/drivers/gpu/drm/amd/display/include/dal_register_logger.h b/drivers/gpu/drm/amd/display/include/dal_register_logger.h
deleted file mode 100644
index 00dfcd7..0000000
--- a/drivers/gpu/drm/amd/display/include/dal_register_logger.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright 2012-15 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_REGISTER_LOGGER__
-#define __DAL_REGISTER_LOGGER__
-
-/****************
- * API functions
- ***************/
-
-/* dal_reg_logger_push - begin Register Logging */
-void dal_reg_logger_push(const char *caller_func);
-/* dal_reg_logger_pop - stop Register Logging */
-void dal_reg_logger_pop(void);
-
-/* for internal use of the Logger only */
-void dal_reg_logger_rw_count_increment(void);
-bool dal_reg_logger_should_dump_register(void);
-
-#endif /* __DAL_REGISTER_LOGGER__ */
-- 
2.9.3

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[PATCH 4/8] dal: drop get platform info

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c |  7 -----
 drivers/gpu/drm/amd/display/dc/dm_services.h       | 32 ----------------------
 2 files changed, 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index 565be05..b842eaf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -77,13 +77,6 @@ void dal_isr_release_lock(struct dc_context *ctx)
  * End-of-IRQ Interfaces.
  *****************************************************************************/
 
-bool dm_get_platform_info(struct dc_context *ctx,
-			struct platform_info_params *params)
-{
-	/*TODO*/
-	return false;
-}
-
 bool dm_write_persistent_data(struct dc_context *ctx,
 		const struct dc_sink *sink,
 		const char *module_name,
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
index f3f9a40..11a0abf 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
@@ -282,38 +282,6 @@ bool dm_pp_get_static_clocks(
 
 /****** end of PP interfaces ******/
 
-enum platform_method {
-	PM_GET_AVAILABLE_METHODS = 1 << 0,
-	PM_GET_LID_STATE = 1 << 1,
-	PM_GET_EXTENDED_BRIGHNESS_CAPS = 1 << 2
-};
-
-struct platform_info_params {
-	enum platform_method method;
-	void *data;
-};
-
-struct platform_info_brightness_caps {
-	uint8_t ac_level_percentage;
-	uint8_t dc_level_percentage;
-};
-
-struct platform_info_ext_brightness_caps {
-	struct platform_info_brightness_caps basic_caps;
-	struct data_point {
-		uint8_t luminance;
-		uint8_t	signal_level;
-	} data_points[99];
-
-	uint8_t	data_points_num;
-	uint8_t	min_input_signal;
-	uint8_t	max_input_signal;
-};
-
-bool dm_get_platform_info(
-	struct dc_context *ctx,
-	struct platform_info_params *params);
-
 struct persistent_data_flag {
 	bool save_per_link;
 	bool save_per_edid;
-- 
2.9.3

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[PATCH 5/8] dal: drop setmode complete notifier

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 13 -------------
 1 file changed, 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index b842eaf..5af27aa 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -427,16 +427,3 @@ bool dm_pp_get_static_clocks(
 }
 
 /**** end of power component interfaces ****/
-
-/* Calls to notification */
-
-void dal_notify_setmode_complete(struct dc_context *ctx,
-	uint32_t h_total,
-	uint32_t v_total,
-	uint32_t h_active,
-	uint32_t v_active,
-	uint32_t pix_clk_in_khz)
-{
-	/*TODO*/
-}
-/* End of calls to notification */
-- 
2.9.3

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[PATCH 6/8] drm/dp-helper: add missing defines needed by AMD display core.

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

These are all the ones required by the AMD display core.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 include/drm/drm_dp_helper.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9d03f16..3d5910b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -400,6 +400,8 @@
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
 
+#define DP_ADJUST_REQUEST_POST_CURSOR2      0x20c
+
 #define DP_TEST_REQUEST			    0x218
 # define DP_TEST_LINK_TRAINING		    (1 << 0)
 # define DP_TEST_LINK_VIDEO_PATTERN	    (1 << 1)
@@ -415,6 +417,8 @@
 
 #define DP_TEST_PATTERN			    0x221
 
+#define DP_TEST_MISC1                       0x232
+
 #define DP_TEST_CRC_R_CR		    0x240
 #define DP_TEST_CRC_G_Y			    0x242
 #define DP_TEST_CRC_B_CB		    0x244
@@ -423,6 +427,18 @@
 # define DP_TEST_CRC_SUPPORTED		    (1 << 5)
 # define DP_TEST_COUNT_MASK		    0xf
 
+#define DP_TEST_PHY_PATTERN                 0x248
+#define DP_TEST_80BIT_CUSTOM_PATTERN_7_0    0x250
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_15_8   0x251
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_23_16  0x252
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_31_24  0x253
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_39_32  0x254
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_47_40  0x255
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_55_48  0x256
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_63_56  0x257
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_71_64  0x258
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_79_72  0x259
+
 #define DP_TEST_RESPONSE		    0x260
 # define DP_TEST_ACK			    (1 << 0)
 # define DP_TEST_NAK			    (1 << 1)
@@ -443,6 +459,7 @@
 #define DP_SOURCE_OUI			    0x300
 #define DP_SINK_OUI			    0x400
 #define DP_BRANCH_OUI			    0x500
+#define DP_BRANCH_REVISION_START            0x509
 
 #define DP_SET_POWER                        0x600
 # define DP_SET_POWER_D0                    0x1
@@ -563,6 +580,9 @@
 #define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP 1.4 */
 # define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
 
+#define DP_DP13_DPCD_REV                    0x2200
+#define DP_DP13_MAX_LINK_RATE               0x2201
+
 /* DP 1.2 Sideband message defines */
 /* peer device type - DP 1.2a Table 2-92 */
 #define DP_PEER_DEVICE_NONE		0x0
-- 
2.9.3

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[PATCH 7/8] dal: port to using drm dpcd defines

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

We only keep one list of these defines in the kernel, so we should use it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c      |   8 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c  |   2 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   | 144 ++++++-------
 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c |   2 +-
 drivers/gpu/drm/amd/display/include/dpcd_defs.h    | 223 +--------------------
 5 files changed, 79 insertions(+), 300 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 47f22d4..657ec0a 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1157,7 +1157,7 @@ static void dpcd_configure_panel_mode(
 		/*set edp panel mode in receiver*/
 		core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_EDP_CONFIG_SET,
+			DP_EDP_CONFIGURATION_SET,
 			&edp_config_set.raw,
 			sizeof(edp_config_set.raw));
 
@@ -1169,7 +1169,7 @@ static void dpcd_configure_panel_mode(
 			panel_mode_edp;
 			result = core_link_write_dpcd(
 				link,
-				DPCD_ADDRESS_EDP_CONFIG_SET,
+				DP_EDP_CONFIGURATION_SET,
 				&edp_config_set.raw,
 				sizeof(edp_config_set.raw));
 
@@ -1190,13 +1190,13 @@ static void enable_stream_features(struct pipe_ctx *pipe_ctx)
 	struct core_link *link = stream->sink->link;
 	union down_spread_ctrl downspread;
 
-	core_link_read_dpcd(link, DPCD_ADDRESS_DOWNSPREAD_CNTL,
+	core_link_read_dpcd(link, DP_DOWNSPREAD_CTRL,
 			&downspread.raw, sizeof(downspread));
 
 	downspread.bits.IGNORE_MSA_TIMING_PARAM =
 			(stream->public.ignore_msa_timing_param) ? 1 : 0;
 
-	core_link_write_dpcd(link, DPCD_ADDRESS_DOWNSPREAD_CNTL,
+	core_link_write_dpcd(link, DP_DOWNSPREAD_CTRL,
 			&downspread.raw, sizeof(downspread));
 }
 
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
index 6379ccf..cd66941 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
@@ -872,7 +872,7 @@ void dal_ddc_service_i2c_query_dp_dual_mode_adaptor(
 
 enum {
 	DP_SINK_CAP_SIZE =
-		DPCD_ADDRESS_EDP_CONFIG_CAP - DPCD_ADDRESS_DPCD_REV + 1
+		DP_EDP_CONFIGURATION_CAP - DP_DPCD_REV + 1
 };
 
 bool dal_ddc_service_query_ddc_data(
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 2585ec3..d3625c2 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -70,7 +70,7 @@ static void wait_for_training_aux_rd_interval(
 		 * "DPCD_ADDR_TRAINING_AUX_RD_INTERVAL" register */
 		core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_TRAINING_AUX_RD_INTERVAL,
+			DP_TRAINING_AUX_RD_INTERVAL,
 			(uint8_t *)&training_rd_interval,
 			sizeof(training_rd_interval));
 
@@ -93,14 +93,14 @@ static void dpcd_set_training_pattern(
 {
 	core_link_write_dpcd(
 		link,
-		DPCD_ADDRESS_TRAINING_PATTERN_SET,
+		DP_TRAINING_PATTERN_SET,
 		&dpcd_pattern.raw,
 		1);
 
 	dm_logger_write(link->ctx->logger, LOG_HW_LINK_TRAINING,
 		"%s\n %x pattern = %x\n",
 		__func__,
-		DPCD_ADDRESS_TRAINING_PATTERN_SET,
+		DP_TRAINING_PATTERN_SET,
 		dpcd_pattern.v1_4.TRAINING_PATTERN_SET);
 }
 
@@ -129,19 +129,19 @@ static void dpcd_set_link_settings(
 	link_set_buffer[0] = rate;
 	link_set_buffer[1] = lane_count_set.raw;
 
-	core_link_write_dpcd(link, DPCD_ADDRESS_LINK_BW_SET,
+	core_link_write_dpcd(link, DP_LINK_BW_SET,
 	link_set_buffer, 2);
-	core_link_write_dpcd(link, DPCD_ADDRESS_DOWNSPREAD_CNTL,
+	core_link_write_dpcd(link, DP_DOWNSPREAD_CTRL,
 	&downspread.raw, sizeof(downspread));
 
 	dm_logger_write(link->ctx->logger, LOG_HW_LINK_TRAINING,
 		"%s\n %x rate = %x\n %x lane = %x\n %x spread = %x\n",
 		__func__,
-		DPCD_ADDRESS_LINK_BW_SET,
+		DP_LINK_BW_SET,
 		lt_settings->link_settings.link_rate,
-		DPCD_ADDRESS_LANE_COUNT_SET,
+		DP_LANE_COUNT_SET,
 		lt_settings->link_settings.lane_count,
-		DPCD_ADDRESS_DOWNSPREAD_CNTL,
+		DP_DOWNSPREAD_CTRL,
 		lt_settings->link_settings.link_spread);
 
 }
@@ -186,7 +186,7 @@ static void dpcd_set_lt_pattern_and_lane_settings(
 {
 	union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = {{{0}}};
 	const uint32_t dpcd_base_lt_offset =
-	DPCD_ADDRESS_TRAINING_PATTERN_SET;
+	DP_TRAINING_PATTERN_SET;
 	uint8_t dpcd_lt_buffer[5] = {0};
 	union dpcd_training_pattern dpcd_pattern = {{0}};
 	uint32_t lane;
@@ -199,13 +199,13 @@ static void dpcd_set_lt_pattern_and_lane_settings(
 	dpcd_pattern.v1_4.TRAINING_PATTERN_SET =
 		hw_training_pattern_to_dpcd_training_pattern(link, pattern);
 
-	dpcd_lt_buffer[DPCD_ADDRESS_TRAINING_PATTERN_SET - dpcd_base_lt_offset]
+	dpcd_lt_buffer[DP_TRAINING_PATTERN_SET - dpcd_base_lt_offset]
 		= dpcd_pattern.raw;
 
 	dm_logger_write(link->ctx->logger, LOG_HW_LINK_TRAINING,
 		"%s\n %x pattern = %x\n",
 		__func__,
-		DPCD_ADDRESS_TRAINING_PATTERN_SET,
+		DP_TRAINING_PATTERN_SET,
 		dpcd_pattern.v1_4.TRAINING_PATTERN_SET);
 
 	/*****************************************************************
@@ -233,7 +233,7 @@ static void dpcd_set_lt_pattern_and_lane_settings(
 
 	 // 0x00103 - 0x00102
 	memmove(
-		&dpcd_lt_buffer[DPCD_ADDRESS_LANE0_SET - dpcd_base_lt_offset],
+		&dpcd_lt_buffer[DP_TRAINING_LANE0_SET - dpcd_base_lt_offset],
 		dpcd_lane,
 		size_in_bytes);
 
@@ -241,7 +241,7 @@ static void dpcd_set_lt_pattern_and_lane_settings(
 		"%s:\n %x VS set = %x  PE set = %x \
 		max VS Reached = %x  max PE Reached = %x\n",
 		__func__,
-		DPCD_ADDRESS_LANE0_SET,
+		DP_TRAINING_LANE0_SET,
 		dpcd_lane[0].bits.VOLTAGE_SWING_SET,
 		dpcd_lane[0].bits.PRE_EMPHASIS_SET,
 		dpcd_lane[0].bits.MAX_SWING_REACHED,
@@ -253,13 +253,13 @@ static void dpcd_set_lt_pattern_and_lane_settings(
 		*/
 		core_link_write_dpcd(
 			link,
-			DPCD_ADDRESS_TRAINING_PATTERN_SET,
+			DP_TRAINING_PATTERN_SET,
 			&dpcd_pattern.raw,
 			sizeof(dpcd_pattern.raw) );
 
 		core_link_write_dpcd(
 			link,
-			DPCD_ADDRESS_LANE0_SET,
+			DP_TRAINING_LANE0_SET,
 			(uint8_t *)(dpcd_lane),
 			size_in_bytes);
 
@@ -459,7 +459,7 @@ static void get_lane_status_and_drive_settings(
 
 	core_link_read_dpcd(
 		link,
-		DPCD_ADDRESS_LANE_01_STATUS,
+		DP_LANE0_1_STATUS,
 		(uint8_t *)(dpcd_buf),
 		sizeof(dpcd_buf));
 
@@ -478,15 +478,15 @@ static void get_lane_status_and_drive_settings(
 	dm_logger_write(link->ctx->logger, LOG_HW_LINK_TRAINING,
 		"%s:\n%x Lane01Status = %x\n %x Lane23Status = %x\n ",
 		__func__,
-		DPCD_ADDRESS_LANE_01_STATUS, dpcd_buf[0],
-		DPCD_ADDRESS_LANE_23_STATUS, dpcd_buf[1]);
+		DP_LANE0_1_STATUS, dpcd_buf[0],
+		DP_LANE2_3_STATUS, dpcd_buf[1]);
 
 	dm_logger_write(link->ctx->logger, LOG_HW_LINK_TRAINING,
 		"%s:\n %x Lane01AdjustRequest = %x\n %x Lane23AdjustRequest = %x\n",
 		__func__,
-		DPCD_ADDRESS_ADJUST_REQUEST_LANE0_1,
+		DP_ADJUST_REQUEST_LANE0_1,
 		dpcd_buf[4],
-		DPCD_ADDRESS_ADJUST_REQUEST_LANE2_3,
+		DP_ADJUST_REQUEST_LANE2_3,
 		dpcd_buf[5]);
 
 	/*copy to req_settings*/
@@ -552,7 +552,7 @@ static void dpcd_set_lane_settings(
 	}
 
 	core_link_write_dpcd(link,
-		DPCD_ADDRESS_LANE0_SET,
+		DP_TRAINING_LANE0_SET,
 		(uint8_t *)(dpcd_lane),
 		link_training_setting->link_settings.lane_count);
 
@@ -579,7 +579,7 @@ static void dpcd_set_lane_settings(
 		"%s\n %x VS set = %x  PE set = %x \
 		max VS Reached = %x  max PE Reached = %x\n",
 		__func__,
-		DPCD_ADDRESS_LANE0_SET,
+		DP_TRAINING_LANE0_SET,
 		dpcd_lane[0].bits.VOLTAGE_SWING_SET,
 		dpcd_lane[0].bits.PRE_EMPHASIS_SET,
 		dpcd_lane[0].bits.MAX_SWING_REACHED,
@@ -935,7 +935,7 @@ static inline bool perform_link_training_int(
 
 	core_link_write_dpcd(
 		link,
-		DPCD_ADDRESS_LANE_COUNT_SET,
+		DP_LANE_COUNT_SET,
 		&lane_count_set.raw,
 		sizeof(lane_count_set));
 
@@ -1385,18 +1385,18 @@ static bool hpd_rx_irq_check_link_loss_status(
 	 */
 
 	dpcd_result = core_link_read_dpcd(link,
-		DPCD_ADDRESS_POWER_STATE,
+		DP_SET_POWER,
 		&irq_reg_rx_power_state,
 		sizeof(irq_reg_rx_power_state));
 
 	if (dpcd_result != DC_OK) {
-		irq_reg_rx_power_state = DP_PWR_STATE_D0;
+		irq_reg_rx_power_state = DP_SET_POWER_D0;
 		dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ,
 			"%s: DPCD read failed to obtain power state.\n",
 			__func__);
 	}
 
-	if (irq_reg_rx_power_state == DP_PWR_STATE_D0) {
+	if (irq_reg_rx_power_state == DP_SET_POWER_D0) {
 
 		/*2. Check that Link Status changed, before re-training.*/
 
@@ -1452,7 +1452,7 @@ static enum dc_status read_hpd_rx_irq_data(
 	 */
 	return core_link_read_dpcd(
 	link,
-	DPCD_ADDRESS_SINK_COUNT,
+	DP_SINK_COUNT,
 	irq_data->raw,
 	sizeof(union hpd_irq_data));
 }
@@ -1536,12 +1536,12 @@ static void dp_test_send_link_training(struct core_link *link)
 
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_LANE_COUNT,
+			DP_TEST_LANE_COUNT,
 			(unsigned char *)(&link_settings.lane_count),
 			1);
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_LINK_RATE,
+			DP_TEST_LINK_RATE,
 			(unsigned char *)(&link_settings.link_rate),
 			1);
 
@@ -1558,8 +1558,8 @@ static void dp_test_send_phy_test_pattern(struct core_link *link)
 	union lane_adjust dpcd_lane_adjustment[2];
 	unsigned char dpcd_post_cursor_2_adjustment = 0;
 	unsigned char test_80_bit_pattern[
-			(DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_79_72 -
-			DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_7_0)+1] = {0};
+			(DP_TEST_80BIT_CUSTOM_PATTERN_79_72 -
+			DP_TEST_80BIT_CUSTOM_PATTERN_7_0)+1] = {0};
 	enum dp_test_pattern test_pattern;
 	struct dc_link_training_settings link_settings;
 	union lane_adjust dpcd_lane_adjust;
@@ -1574,12 +1574,12 @@ static void dp_test_send_phy_test_pattern(struct core_link *link)
 	/* get phy test pattern and pattern parameters from DP receiver */
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_PHY_PATTERN,
+			DP_TEST_PHY_PATTERN,
 			&dpcd_test_pattern.raw,
 			sizeof(dpcd_test_pattern));
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_ADJUST_REQUEST_LANE0_1,
+			DP_ADJUST_REQUEST_LANE0_1,
 			&dpcd_lane_adjustment[0].raw,
 			sizeof(dpcd_lane_adjustment));
 
@@ -1591,7 +1591,7 @@ static void dp_test_send_phy_test_pattern(struct core_link *link)
 	 */
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_ADJUST_REQUEST_POST_CURSOR2,
+			DP_ADJUST_REQUEST_POST_CURSOR2,
 			&dpcd_post_cursor_2_adjustment,
 			sizeof(dpcd_post_cursor_2_adjustment));
 
@@ -1620,7 +1620,7 @@ static void dp_test_send_phy_test_pattern(struct core_link *link)
 	if (test_pattern == DP_TEST_PATTERN_80BIT_CUSTOM)
 		core_link_read_dpcd(
 				link,
-				DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_7_0,
+				DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
 				test_80_bit_pattern,
 				sizeof(test_80_bit_pattern));
 
@@ -1660,8 +1660,8 @@ static void dp_test_send_phy_test_pattern(struct core_link *link)
 		test_pattern,
 		&link_training_settings,
 		test_80_bit_pattern,
-		(DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_79_72 -
-		DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_7_0)+1);
+		(DP_TEST_80BIT_CUSTOM_PATTERN_79_72 -
+		DP_TEST_80BIT_CUSTOM_PATTERN_7_0)+1);
 }
 
 static void dp_test_send_link_test_pattern(struct core_link *link)
@@ -1676,12 +1676,12 @@ static void dp_test_send_link_test_pattern(struct core_link *link)
 	/* get link test pattern and pattern parameters */
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_PATTERN,
+			DP_TEST_PATTERN,
 			&dpcd_test_pattern.raw,
 			sizeof(dpcd_test_pattern));
 	core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_MISC1,
+			DP_TEST_MISC1,
 			&dpcd_test_params.raw,
 			sizeof(dpcd_test_params));
 
@@ -1721,7 +1721,7 @@ static void handle_automated_test(struct core_link *link)
 
 	core_link_read_dpcd(
 		link,
-		DPCD_ADDRESS_TEST_REQUEST,
+		DP_TEST_REQUEST,
 		&test_request.raw,
 		sizeof(union test_request));
 	if (test_request.bits.LINK_TRAINING) {
@@ -1729,7 +1729,7 @@ static void handle_automated_test(struct core_link *link)
 		test_response.bits.ACK = 1;
 		core_link_write_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_RESPONSE,
+			DP_TEST_RESPONSE,
 			&test_response.raw,
 			sizeof(test_response));
 		dp_test_send_link_training(link);
@@ -1754,7 +1754,7 @@ static void handle_automated_test(struct core_link *link)
 	if (test_response.bits.ACK)
 		core_link_write_dpcd(
 			link,
-			DPCD_ADDRESS_TEST_RESPONSE,
+			DP_TEST_RESPONSE,
 			&test_response.raw,
 			sizeof(test_response));
 }
@@ -1792,7 +1792,7 @@ bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link)
 		device_service_clear.bits.AUTOMATED_TEST = 1;
 		core_link_write_dpcd(
 			link,
-			DPCD_ADDRESS_DEVICE_SERVICE_IRQ_VECTOR,
+			DP_DEVICE_SERVICE_IRQ_VECTOR,
 			&device_service_clear.raw,
 			sizeof(device_service_clear.raw));
 		device_service_clear.raw = 0;
@@ -1872,12 +1872,12 @@ bool is_mst_supported(struct core_link *link)
 	rev.raw  = 0;
 	cap.raw  = 0;
 
-	st = core_link_read_dpcd(link, DPCD_ADDRESS_DPCD_REV, &rev.raw,
+	st = core_link_read_dpcd(link, DP_DPCD_REV, &rev.raw,
 			sizeof(rev));
 
 	if (st == DC_OK && rev.raw >= DPCD_REV_12) {
 
-		st = core_link_read_dpcd(link, DPCD_ADDRESS_MSTM_CAP,
+		st = core_link_read_dpcd(link, DP_MSTM_CAP,
 				&cap.raw, sizeof(cap));
 		if (st == DC_OK && cap.bits.MST_CAP == 1)
 			mst = true;
@@ -1926,7 +1926,7 @@ static void get_active_converter_info(
 		uint8_t det_caps[4];
 		union dwnstream_port_caps_byte0 *port_caps =
 			(union dwnstream_port_caps_byte0 *)det_caps;
-		core_link_read_dpcd(link, DPCD_ADDRESS_DWN_STRM_PORT0_CAPS,
+		core_link_read_dpcd(link, DP_DOWNSTREAM_PORT_0,
 				det_caps, sizeof(det_caps));
 
 		switch (port_caps->bits.DWN_STRM_PORTX_TYPE) {
@@ -1962,7 +1962,7 @@ static void get_active_converter_info(
 		/* read IEEE branch device id */
 		core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_BRANCH_DEVICE_ID_START,
+			DP_BRANCH_OUI,
 			(uint8_t *)&dp_id,
 			sizeof(dp_id));
 
@@ -1982,7 +1982,7 @@ static void get_active_converter_info(
 
 		core_link_read_dpcd(
 			link,
-			DPCD_ADDRESS_BRANCH_REVISION_START,
+			DP_BRANCH_REVISION_START,
 			(uint8_t *)&dp_hw_fw_revision,
 			sizeof(dp_hw_fw_revision));
 
@@ -2000,16 +2000,16 @@ static void dp_wa_power_up_0010FA(struct core_link *link, uint8_t *dpcd_data,
 	if (!link->dpcd_caps.dpcd_rev.raw) {
 		do {
 			dp_receiver_power_ctrl(link, true);
-			core_link_read_dpcd(link, DPCD_ADDRESS_DPCD_REV,
+			core_link_read_dpcd(link, DP_DPCD_REV,
 							dpcd_data, length);
 			link->dpcd_caps.dpcd_rev.raw = dpcd_data[
-				DPCD_ADDRESS_DPCD_REV -
-				DPCD_ADDRESS_DPCD_REV];
+				DP_DPCD_REV -
+				DP_DPCD_REV];
 		} while (retry++ < 4 && !link->dpcd_caps.dpcd_rev.raw);
 	}
 
-	ds_port.byte = dpcd_data[DPCD_ADDRESS_DOWNSTREAM_PORT_PRESENT -
-				 DPCD_ADDRESS_DPCD_REV];
+	ds_port.byte = dpcd_data[DP_DOWNSTREAMPORT_PRESENT -
+				 DP_DPCD_REV];
 
 	if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER) {
 		switch (link->dpcd_caps.branch_dev_id) {
@@ -2037,14 +2037,14 @@ static void retrieve_psr_link_cap(struct core_link *link,
 {
 	if (edp_revision >= EDP_REVISION_13) {
 		core_link_read_dpcd(link,
-				DPCD_ADDRESS_PSR_SUPPORT_VER,
+				DP_PSR_SUPPORT,
 				(uint8_t *)(&link->public.psr_caps),
 				sizeof(link->public.psr_caps));
 		if (link->public.psr_caps.psr_version != 0) {
 			unsigned char psr_capability = 0;
 
 			core_link_read_dpcd(link,
-					DPCD_ADDRESS_PSR_CAPABILITY,
+					    DP_PSR_CAPS,
 						&psr_capability,
 						sizeof(psr_capability));
 			/* Bit 0 determines whether fast link training is
@@ -2064,7 +2064,7 @@ static void retrieve_psr_link_cap(struct core_link *link,
 
 static void retrieve_link_cap(struct core_link *link)
 {
-	uint8_t dpcd_data[DPCD_ADDRESS_TRAINING_AUX_RD_INTERVAL - DPCD_ADDRESS_DPCD_REV + 1];
+	uint8_t dpcd_data[DP_TRAINING_AUX_RD_INTERVAL - DP_DPCD_REV + 1];
 
 	union down_stream_port_count down_strm_port_count;
 	union edp_configuration_cap edp_config_cap;
@@ -2078,30 +2078,30 @@ static void retrieve_link_cap(struct core_link *link)
 
 	core_link_read_dpcd(
 		link,
-		DPCD_ADDRESS_DPCD_REV,
+		DP_DPCD_REV,
 		dpcd_data,
 		sizeof(dpcd_data));
 
 	link->dpcd_caps.dpcd_rev.raw =
-		dpcd_data[DPCD_ADDRESS_DPCD_REV - DPCD_ADDRESS_DPCD_REV];
+		dpcd_data[DP_DPCD_REV - DP_DPCD_REV];
 
 	{
 		union training_aux_rd_interval aux_rd_interval;
 
 		aux_rd_interval.raw =
-			dpcd_data[DPCD_ADDRESS_TRAINING_AUX_RD_INTERVAL];
+			dpcd_data[DP_TRAINING_AUX_RD_INTERVAL];
 
 		if (aux_rd_interval.bits.EXT_RECIEVER_CAP_FIELD_PRESENT == 1) {
 			core_link_read_dpcd(
 				link,
-				DPCD_ADDRESS_DP13_DPCD_REV,
+				DP_DP13_DPCD_REV,
 				dpcd_data,
 				sizeof(dpcd_data));
 		}
 	}
 
-	ds_port.byte = dpcd_data[DPCD_ADDRESS_DOWNSTREAM_PORT_PRESENT -
-				 DPCD_ADDRESS_DPCD_REV];
+	ds_port.byte = dpcd_data[DP_DOWNSTREAMPORT_PRESENT -
+				 DP_DPCD_REV];
 
 	get_active_converter_info(ds_port.byte, link);
 
@@ -2111,21 +2111,21 @@ static void retrieve_link_cap(struct core_link *link)
 		down_strm_port_count.bits.IGNORE_MSA_TIMING_PARAM;
 
 	link->dpcd_caps.max_ln_count.raw = dpcd_data[
-		DPCD_ADDRESS_MAX_LANE_COUNT - DPCD_ADDRESS_DPCD_REV];
+		DP_MAX_LANE_COUNT - DP_DPCD_REV];
 
 	link->dpcd_caps.max_down_spread.raw = dpcd_data[
-		DPCD_ADDRESS_MAX_DOWNSPREAD - DPCD_ADDRESS_DPCD_REV];
+		DP_MAX_DOWNSPREAD - DP_DPCD_REV];
 
 	link->public.reported_link_cap.lane_count =
 		link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT;
 	link->public.reported_link_cap.link_rate = dpcd_data[
-		DPCD_ADDRESS_MAX_LINK_RATE - DPCD_ADDRESS_DPCD_REV];
+		DP_MAX_LINK_RATE - DP_DPCD_REV];
 	link->public.reported_link_cap.link_spread =
 		link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ?
 		LINK_SPREAD_05_DOWNSPREAD_30KHZ : LINK_SPREAD_DISABLED;
 
 	edp_config_cap.raw = dpcd_data[
-		DPCD_ADDRESS_EDP_CONFIG_CAP - DPCD_ADDRESS_DPCD_REV];
+		DP_EDP_CONFIGURATION_CAP - DP_DPCD_REV];
 	link->dpcd_caps.panel_mode_edp =
 		edp_config_cap.bits.ALT_SCRAMBLER_RESET;
 
@@ -2142,7 +2142,7 @@ static void retrieve_link_cap(struct core_link *link)
 
 	/* read sink count */
 	core_link_read_dpcd(link,
-			DPCD_ADDRESS_SINK_COUNT,
+			DP_SINK_COUNT,
 			&link->dpcd_caps.sink_count.raw,
 			sizeof(link->dpcd_caps.sink_count.raw));
 
@@ -2151,7 +2151,7 @@ static void retrieve_link_cap(struct core_link *link)
 	if (edp_config_cap.bits.DPCD_DISPLAY_CONTROL_CAPABLE) {
 		/* Read the Panel's eDP revision at DPCD 700h. */
 		core_link_read_dpcd(link,
-			DPCD_ADDRESS_EDP_REV,
+			DP_EDP_DPCD_REV,
 			(uint8_t *)(&link->edp_revision),
 			sizeof(link->edp_revision));
 	}
@@ -2415,7 +2415,7 @@ bool dc_link_dp_set_test_pattern(
 						(unsigned char)(pattern);
 
 			core_link_write_dpcd(core_link,
-					DPCD_ADDRESS_LINK_QUAL_LANE0_SET,
+					DP_LINK_QUAL_LANE0_SET,
 					link_qual_pattern,
 					sizeof(link_qual_pattern));
 		} else if (core_link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 ||
@@ -2428,12 +2428,12 @@ bool dc_link_dp_set_test_pattern(
 			 * setting test pattern for DP 1.1.
 			 */
 			core_link_read_dpcd(core_link,
-					DPCD_ADDRESS_TRAINING_PATTERN_SET,
+					DP_TRAINING_PATTERN_SET,
 					&training_pattern.raw,
 					sizeof(training_pattern));
 			training_pattern.v1_3.LINK_QUAL_PATTERN_SET = pattern;
 			core_link_write_dpcd(core_link,
-					DPCD_ADDRESS_TRAINING_PATTERN_SET,
+					DP_TRAINING_PATTERN_SET,
 					&training_pattern.raw,
 					sizeof(training_pattern));
 		}
@@ -2452,7 +2452,7 @@ bool dc_link_dp_set_test_pattern(
 						SET_TEST_PATTERN_PENDING = 0;
 			test_response.bits.ACK = 1;
 			core_link_write_dpcd(core_link,
-					DPCD_ADDRESS_TEST_RESPONSE,
+					DP_TEST_RESPONSE,
 					&test_response.raw,
 					sizeof(test_response));
 		}
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index e89f5f1..7b9fbfb 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -48,7 +48,7 @@ void dp_receiver_power_ctrl(struct core_link *link, bool on)
 
 	state = on ? DP_POWER_STATE_D0 : DP_POWER_STATE_D3;
 
-	core_link_write_dpcd(link, DPCD_ADDRESS_POWER_STATE, &state,
+	core_link_write_dpcd(link, DP_SET_POWER, &state,
 			sizeof(state));
 }
 
diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
index fbb2729..f0376f4 100644
--- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h
+++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
@@ -26,223 +26,7 @@
 #ifndef __DAL_DPCD_DEFS_H__
 #define __DAL_DPCD_DEFS_H__
 
-enum dpcd_address {
-/* addresses marked with 1.2 are only defined since DP 1.2 spec */
-
-	/* Reciever Capability Field */
-	DPCD_ADDRESS_DPCD_REV = 0x00000,
-	DPCD_ADDRESS_MAX_LINK_RATE = 0x00001,
-	DPCD_ADDRESS_MAX_LANE_COUNT = 0x00002,
-	DPCD_ADDRESS_MAX_DOWNSPREAD = 0x00003,
-	DPCD_ADDRESS_NORP = 0x00004,
-	DPCD_ADDRESS_DOWNSTREAM_PORT_PRESENT = 0x00005,
-	DPCD_ADDRESS_MAIN_LINK_CHANNEL_CODING = 0x00006,
-	DPCD_ADDRESS_DOWNSTREAM_PORT_COUNT = 0x00007,
-	DPCD_ADDRESS_RECEIVE_PORT0_CAP0 = 0x00008,
-	DPCD_ADDRESS_RECEIVE_PORT0_CAP1 = 0x00009,
-	DPCD_ADDRESS_RECEIVE_PORT1_CAP0 = 0x0000A,
-	DPCD_ADDRESS_RECEIVE_PORT1_CAP1 = 0x0000B,
-
-	DPCD_ADDRESS_I2C_SPEED_CNTL_CAP = 0x0000C,/*1.2*/
-	DPCD_ADDRESS_EDP_CONFIG_CAP = 0x0000D,/*1.2*/
-	DPCD_ADDRESS_TRAINING_AUX_RD_INTERVAL = 0x000E,/*1.2*/
-
-	DPCD_ADDRESS_MSTM_CAP = 0x00021,/*1.2*/
-
-	/* Audio Video Sync Data Feild */
-	DPCD_ADDRESS_AV_GRANULARITY = 0x0023,
-	DPCD_ADDRESS_AUDIO_DECODE_LATENCY1 = 0x0024,
-	DPCD_ADDRESS_AUDIO_DECODE_LATENCY2 = 0x0025,
-	DPCD_ADDRESS_AUDIO_POSTPROCESSING_LATENCY1 = 0x0026,
-	DPCD_ADDRESS_AUDIO_POSTPROCESSING_LATENCY2 = 0x0027,
-	DPCD_ADDRESS_VIDEO_INTERLACED_LATENCY = 0x0028,
-	DPCD_ADDRESS_VIDEO_PROGRESSIVE_LATENCY = 0x0029,
-	DPCD_ADDRESS_AUDIO_DELAY_INSERT1 = 0x0002B,
-	DPCD_ADDRESS_AUDIO_DELAY_INSERT2 = 0x0002C,
-	DPCD_ADDRESS_AUDIO_DELAY_INSERT3 = 0x0002D,
-
-	/* Audio capability */
-	DPCD_ADDRESS_NUM_OF_AUDIO_ENDPOINTS = 0x00022,
-
-	DPCD_ADDRESS_GUID_START = 0x00030,/*1.2*/
-	DPCD_ADDRESS_GUID_END = 0x0003f,/*1.2*/
-
-	DPCD_ADDRESS_PSR_SUPPORT_VER = 0x00070,
-	DPCD_ADDRESS_PSR_CAPABILITY = 0x00071,
-
-	DPCD_ADDRESS_DWN_STRM_PORT0_CAPS = 0x00080,/*1.2a*/
-
-	/* Link Configuration Field */
-	DPCD_ADDRESS_LINK_BW_SET = 0x00100,
-	DPCD_ADDRESS_LANE_COUNT_SET = 0x00101,
-	DPCD_ADDRESS_TRAINING_PATTERN_SET = 0x00102,
-	DPCD_ADDRESS_LANE0_SET = 0x00103,
-	DPCD_ADDRESS_LANE1_SET = 0x00104,
-	DPCD_ADDRESS_LANE2_SET = 0x00105,
-	DPCD_ADDRESS_LANE3_SET = 0x00106,
-	DPCD_ADDRESS_DOWNSPREAD_CNTL = 0x00107,
-	DPCD_ADDRESS_I2C_SPEED_CNTL = 0x00109,/*1.2*/
-
-	DPCD_ADDRESS_EDP_CONFIG_SET = 0x0010A,
-	DPCD_ADDRESS_LINK_QUAL_LANE0_SET = 0x0010B,
-	DPCD_ADDRESS_LINK_QUAL_LANE1_SET = 0x0010C,
-	DPCD_ADDRESS_LINK_QUAL_LANE2_SET = 0x0010D,
-	DPCD_ADDRESS_LINK_QUAL_LANE3_SET = 0x0010E,
-
-	DPCD_ADDRESS_LANE0_SET2 = 0x0010F,/*1.2*/
-	DPCD_ADDRESS_LANE2_SET2 = 0x00110,/*1.2*/
-
-	DPCD_ADDRESS_MSTM_CNTL = 0x00111,/*1.2*/
-
-	DPCD_ADDRESS_PSR_ENABLE_CFG = 0x0170,
-
-	/* Payload Table Configuration Field 1.2 */
-	DPCD_ADDRESS_PAYLOAD_ALLOCATE_SET = 0x001C0,
-	DPCD_ADDRESS_PAYLOAD_ALLOCATE_START_TIMESLOT = 0x001C1,
-	DPCD_ADDRESS_PAYLOAD_ALLOCATE_TIMESLOT_COUNT = 0x001C2,
-
-	DPCD_ADDRESS_SINK_COUNT = 0x0200,
-	DPCD_ADDRESS_DEVICE_SERVICE_IRQ_VECTOR = 0x0201,
-
-	/* Link / Sink Status Field */
-	DPCD_ADDRESS_LANE_01_STATUS = 0x00202,
-	DPCD_ADDRESS_LANE_23_STATUS = 0x00203,
-	DPCD_ADDRESS_LANE_ALIGN_STATUS_UPDATED = 0x0204,
-	DPCD_ADDRESS_SINK_STATUS = 0x0205,
-
-	/* Adjust Request Field */
-	DPCD_ADDRESS_ADJUST_REQUEST_LANE0_1 = 0x0206,
-	DPCD_ADDRESS_ADJUST_REQUEST_LANE2_3 = 0x0207,
-	DPCD_ADDRESS_ADJUST_REQUEST_POST_CURSOR2 = 0x020C,
-
-	/* Test Request Field */
-	DPCD_ADDRESS_TEST_REQUEST = 0x0218,
-	DPCD_ADDRESS_TEST_LINK_RATE = 0x0219,
-	DPCD_ADDRESS_TEST_LANE_COUNT = 0x0220,
-	DPCD_ADDRESS_TEST_PATTERN = 0x0221,
-	DPCD_ADDRESS_TEST_MISC1 = 0x0232,
-
-	/* Phy Test Pattern Field */
-	DPCD_ADDRESS_TEST_PHY_PATTERN = 0x0248,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_7_0 = 0x0250,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_15_8 = 0x0251,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_23_16 = 0x0252,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_31_24 = 0x0253,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_39_32 = 0x0254,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_47_40 = 0x0255,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_55_48 = 0x0256,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_63_56 = 0x0257,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_71_64 = 0x0258,
-	DPCD_ADDRESS_TEST_80BIT_CUSTOM_PATTERN_79_72 = 0x0259,
-
-	/* Test Response Field*/
-	DPCD_ADDRESS_TEST_RESPONSE = 0x0260,
-
-	/* Audio Test Pattern Field 1.2*/
-	DPCD_ADDRESS_TEST_AUDIO_MODE = 0x0271,
-	DPCD_ADDRESS_TEST_AUDIO_PATTERN_TYPE = 0x0272,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_1 = 0x0273,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_2 = 0x0274,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_3 = 0x0275,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_4 = 0x0276,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_5 = 0x0277,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_6 = 0x0278,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_7 = 0x0279,
-	DPCD_ADDRESS_TEST_AUDIO_PERIOD_CH_8 = 0x027A,
-
-	/* Payload Table Status Field */
-	DPCD_ADDRESS_PAYLOAD_TABLE_UPDATE_STATUS = 0x002C0,/*1.2*/
-	DPCD_ADDRESS_VC_PAYLOAD_ID_SLOT1 = 0x002C1,/*1.2*/
-	DPCD_ADDRESS_VC_PAYLOAD_ID_SLOT63 = 0x002FF,/*1.2*/
-
-	/* Source Device Specific Field */
-	DPCD_ADDRESS_SOURCE_DEVICE_ID_START = 0x0300,
-	DPCD_ADDRESS_SOURCE_DEVICE_ID_END = 0x0301,
-	DPCD_ADDRESS_AMD_INTERNAL_DEBUG_START       = 0x030C,
-	DPCD_ADDRESS_AMD_INTERNAL_DEBUG_END         = 0x030F,
-	DPCD_ADDRESS_SOURCE_SPECIFIC_TABLE_START    = 0x0310,
-	DPCD_ADDRESS_SOURCE_SPECIFIC_TABLE_END      = 0x037F,
-	DPCD_ADDRESS_SOURCE_RESERVED_START         = 0x0380,
-	DPCD_ADDRESS_SOURCE_RESERVED_END           = 0x03FF,
-
-	/* Sink Device Specific Field */
-	DPCD_ADDRESS_SINK_DEVICE_ID_START = 0x0400,
-	DPCD_ADDRESS_SINK_DEVICE_ID_END = 0x0402,
-	DPCD_ADDRESS_SINK_DEVICE_STR_START = 0x0403,
-	DPCD_ADDRESS_SINK_DEVICE_STR_END = 0x0408,
-	DPCD_ADDRESS_SINK_REVISION_START = 0x409,
-	DPCD_ADDRESS_SINK_REVISION_END = 0x40B,
-
-	/* Branch Device Specific Field */
-	DPCD_ADDRESS_BRANCH_DEVICE_ID_START = 0x0500,
-	DPCD_ADDRESS_BRANCH_DEVICE_ID_END = 0x0502,
-	DPCD_ADDRESS_BRANCH_DEVICE_STR_START = 0x0503,
-	DPCD_ADDRESS_BRANCH_DEVICE_STR_END = 0x0508,
-	DPCD_ADDRESS_BRANCH_REVISION_START = 0x0509,
-	DPCD_ADDRESS_BRANCH_REVISION_END = 0x050B,
-
-	DPCD_ADDRESS_POWER_STATE = 0x0600,
-
-	/* EDP related */
-	DPCD_ADDRESS_EDP_REV = 0x0700,
-	DPCD_ADDRESS_EDP_CAPABILITY = 0x0701,
-	DPCD_ADDRESS_EDP_BACKLIGHT_ADJUST_CAP = 0x0702,
-	DPCD_ADDRESS_EDP_GENERAL_CAP2 = 0x0703,
-
-	DPCD_ADDRESS_EDP_DISPLAY_CONTROL = 0x0720,
-	DPCD_ADDRESS_SUPPORTED_LINK_RATES = 0x00010, /* edp 1.4 */
-	DPCD_ADDRESS_EDP_BACKLIGHT_SET = 0x0721,
-	DPCD_ADDRESS_EDP_BACKLIGHT_BRIGHTNESS_MSB = 0x0722,
-	DPCD_ADDRESS_EDP_BACKLIGHT_BRIGHTNESS_LSB = 0x0723,
-	DPCD_ADDRESS_EDP_PWMGEN_BIT_COUNT = 0x0724,
-	DPCD_ADDRESS_EDP_PWMGEN_BIT_COUNT_CAP_MIN = 0x0725,
-	DPCD_ADDRESS_EDP_PWMGEN_BIT_COUNT_CAP_MAX = 0x0726,
-	DPCD_ADDRESS_EDP_BACKLIGHT_CONTROL_STATUS = 0x0727,
-	DPCD_ADDRESS_EDP_BACKLIGHT_FREQ_SET = 0x0728,
-	DPCD_ADDRESS_EDP_REVERVED = 0x0729,
-	DPCD_ADDRESS_EDP_BACKLIGNT_FREQ_CAP_MIN_MSB = 0x072A,
-	DPCD_ADDRESS_EDP_BACKLIGNT_FREQ_CAP_MIN_MID = 0x072B,
-	DPCD_ADDRESS_EDP_BACKLIGNT_FREQ_CAP_MIN_LSB = 0x072C,
-	DPCD_ADDRESS_EDP_BACKLIGNT_FREQ_CAP_MAX_MSB = 0x072D,
-	DPCD_ADDRESS_EDP_BACKLIGNT_FREQ_CAP_MAX_MID = 0x072E,
-	DPCD_ADDRESS_EDP_BACKLIGNT_FREQ_CAP_MAX_LSB = 0x072F,
-
-	DPCD_ADDRESS_EDP_DBC_MINIMUM_BRIGHTNESS_SET = 0x0732,
-	DPCD_ADDRESS_EDP_DBC_MAXIMUM_BRIGHTNESS_SET = 0x0733,
-
-	/* Sideband MSG Buffers 1.2 */
-	DPCD_ADDRESS_DOWN_REQ_START = 0x01000,
-	DPCD_ADDRESS_DOWN_REQ_END = 0x011ff,
-
-	DPCD_ADDRESS_UP_REP_START = 0x01200,
-	DPCD_ADDRESS_UP_REP_END = 0x013ff,
-
-	DPCD_ADDRESS_DOWN_REP_START = 0x01400,
-	DPCD_ADDRESS_DOWN_REP_END = 0x015ff,
-
-	DPCD_ADDRESS_UP_REQ_START = 0x01600,
-	DPCD_ADDRESS_UP_REQ_END = 0x017ff,
-
-	/* ESI (Event Status Indicator) Field 1.2 */
-	DPCD_ADDRESS_SINK_COUNT_ESI = 0x02002,
-	DPCD_ADDRESS_DEVICE_IRQ_ESI0 = 0x02003,
-	DPCD_ADDRESS_DEVICE_IRQ_ESI1 = 0x02004,
-	/*@todo move dpcd_address_Lane01Status back here*/
-
-	DPCD_ADDRESS_PSR_ERROR_STATUS = 0x2006,
-	DPCD_ADDRESS_PSR_EVENT_STATUS = 0x2007,
-	DPCD_ADDRESS_PSR_SINK_STATUS = 0x2008,
-	DPCD_ADDRESS_PSR_DBG_REGISTER0 = 0x2009,
-	DPCD_ADDRESS_PSR_DBG_REGISTER1 = 0x200A,
-
-	DPCD_ADDRESS_DP13_DPCD_REV = 0x2200,
-	DPCD_ADDRESS_DP13_MAX_LINK_RATE = 0x2201,
-
-	/* Travis specific addresses */
-	DPCD_ADDRESS_TRAVIS_SINK_DEV_SEL = 0x5f0,
-	DPCD_ADDRESS_TRAVIS_SINK_ACCESS_OFFSET	= 0x5f1,
-	DPCD_ADDRESS_TRAVIS_SINK_ACCESS_REG = 0x5f2,
-};
+#include "drm_dp_helper.h"
 
 enum dpcd_revision {
 	DPCD_REV_10 = 0x10,
@@ -252,11 +36,6 @@ enum dpcd_revision {
 	DPCD_REV_14 = 0x14
 };
 
-enum dp_pwr_state {
-	DP_PWR_STATE_D0 = 1,/* direct HW translation! */
-	DP_PWR_STATE_D3
-};
-
 /* these are the types stored at DOWNSTREAMPORT_PRESENT */
 enum dpcd_downstream_port_type {
 	DOWNSTREAM_DP = 0,
-- 
2.9.3

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[PATCH 8/8] dal: assign correct enum for edp revision

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

There are 2 edp enum revisions, no idea why, drop one, and just
assign 1.1 to the default value.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c |  2 +-
 drivers/gpu/drm/amd/display/include/dpcd_defs.h  | 16 ----------------
 2 files changed, 1 insertion(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index d3625c2..a4b6a6a 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2129,7 +2129,7 @@ static void retrieve_link_cap(struct core_link *link)
 	link->dpcd_caps.panel_mode_edp =
 		edp_config_cap.bits.ALT_SCRAMBLER_RESET;
 
-	link->edp_revision = DPCD_EDP_REVISION_EDP_UNKNOWN;
+	link->edp_revision = EDP_REVISION_11;
 
 	link->public.test_pattern_enabled = false;
 	link->public.compliance_test_state.raw = 0;
diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
index f0376f4..ba99e6b 100644
--- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h
+++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
@@ -144,22 +144,6 @@ enum dpcd_psr_sink_states {
 	PSR_SINK_STATE_SINK_INTERNAL_ERROR = 7,
 };
 
-/* This enum defines the Panel's eDP revision at DPCD 700h
- * 00h = eDP v1.1 or lower
- * 01h = eDP v1.2
- * 02h = eDP v1.3 (PSR support starts here)
- * 03h = eDP v1.4
- * If unknown revision, treat as eDP v1.1, meaning least functionality set.
- * This enum has values matched to eDP spec, thus values should not change.
- */
-enum dpcd_edp_revision {
-	DPCD_EDP_REVISION_EDP_V1_1 = 0,
-	DPCD_EDP_REVISION_EDP_V1_2 = 1,
-	DPCD_EDP_REVISION_EDP_V1_3 = 2,
-	DPCD_EDP_REVISION_EDP_V1_4 = 3,
-	DPCD_EDP_REVISION_EDP_UNKNOWN = DPCD_EDP_REVISION_EDP_V1_1,
-};
-
 union dpcd_rev {
 	struct {
 		uint8_t MINOR:4;
-- 
2.9.3

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Re: some minor dal cleanups and example of future patches

[Dave Airlie]

On 13 December 2016 at 16:41, Dave Airlie <airlied@gmail.com> wrote:
> So whenever I look at DAL I find myself trying to figure out what
> all of it does, and this leads me to deleting things, so I'm just
> sending out some stuff that I cleaned today.
>
> One thing I noticed in passing is the displayport code seems
> possibly endian unsafe, it casts bytes read from hardware into
> bitfields, this is the best defined behaviour and is generally
> a pattern we try to steer away from.
>
> The porting the displayport code to use drm defines is the
> sort of example of a cleanup patch that might cause problems
> for you in code sharing, but is the exact sort of patch that
> has been applied to other drivers in the past.

I've also just noticed every dpcd access (read/write) causes
a traversal of the connector list.

Dave.
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Re: some minor dal cleanups and example of future patches

[Edward O'Callaghan]

[-- Attachment #1.1.1: Type: text/plain, Size: 1033 bytes --]

This series is,
Acked-by: Edward O'Callaghan <funfunctor-dczkZgxz+BNUPWh3PAxdjQ@public.gmane.org>

On 12/13/2016 05:41 PM, Dave Airlie wrote:
> So whenever I look at DAL I find myself trying to figure out what
> all of it does, and this leads me to deleting things, so I'm just
> sending out some stuff that I cleaned today.
> 
> One thing I noticed in passing is the displayport code seems
> possibly endian unsafe, it casts bytes read from hardware into
> bitfields, this is the best defined behaviour and is generally
> a pattern we try to steer away from.
> 
> The porting the displayport code to use drm defines is the
> sort of example of a cleanup patch that might cause problems
> for you in code sharing, but is the exact sort of patch that
> has been applied to other drivers in the past.
> 
> Dave.
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 


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Re: [PATCH 3/8] dal: drop register logger and pid/tgid getters

[Christian König]

Am 13.12.2016 um 07:41 schrieb Dave Airlie:
> From: Dave Airlie <airlied@redhat.com>
>
> While I'm sure this is useful I think we should bring it back later.

Actually we have a trace point in the amdgpu module whenever we access a 
register.

If I'm not completely mistaken this allows us to have all the same 
functionality as this code.

Regards,
Christian.

>
> It's usage of pid/tgid is incorrect, you have to get/put
> pid/tgids not store them away.
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>
> ---
>   .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c |  10 --
>   drivers/gpu/drm/amd/display/dc/basics/Makefile     |   2 +-
>   .../drm/amd/display/dc/basics/register_logger.c    | 197 ---------------------
>   drivers/gpu/drm/amd/display/dc/dm_services.h       |  16 --
>   .../drm/amd/display/include/dal_register_logger.h  |  42 -----
>   5 files changed, 1 insertion(+), 266 deletions(-)
>   delete mode 100644 drivers/gpu/drm/amd/display/dc/basics/register_logger.c
>   delete mode 100644 drivers/gpu/drm/amd/display/include/dal_register_logger.h
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> index 9c852a3..565be05 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> @@ -447,13 +447,3 @@ void dal_notify_setmode_complete(struct dc_context *ctx,
>   	/*TODO*/
>   }
>   /* End of calls to notification */
> -
> -long dm_get_pid(void)
> -{
> -	return current->pid;
> -}
> -
> -long dm_get_tgid(void)
> -{
> -	return current->tgid;
> -}
> diff --git a/drivers/gpu/drm/amd/display/dc/basics/Makefile b/drivers/gpu/drm/amd/display/dc/basics/Makefile
> index a263cad..0658162 100644
> --- a/drivers/gpu/drm/amd/display/dc/basics/Makefile
> +++ b/drivers/gpu/drm/amd/display/dc/basics/Makefile
> @@ -4,7 +4,7 @@
>   # subcomponents.
>   
>   BASICS = conversion.o fixpt31_32.o fixpt32_32.o grph_object_id.o \
> -	logger.o log_helpers.o register_logger.o signal_types.o vector.o
> +	logger.o log_helpers.o signal_types.o vector.o
>   
>   AMD_DAL_BASICS = $(addprefix $(AMDDALPATH)/dc/basics/,$(BASICS))
>   
> diff --git a/drivers/gpu/drm/amd/display/dc/basics/register_logger.c b/drivers/gpu/drm/amd/display/dc/basics/register_logger.c
> deleted file mode 100644
> index b8d57d9..0000000
> --- a/drivers/gpu/drm/amd/display/dc/basics/register_logger.c
> +++ /dev/null
> @@ -1,197 +0,0 @@
> -/*
> - * Copyright 2012-15 Advanced Micro Devices, Inc.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - * Authors: AMD
> - *
> - */
> -
> -#include "dm_services.h"
> -#include "include/dal_types.h"
> -#include "include/logger_interface.h"
> -#include "logger.h"
> -
> -/******************************************************************************
> - * Register Logger.
> - * A facility to create register R/W logs.
> - * Currently used for DAL Test.
> - *****************************************************************************/
> -
> -/******************************************************************************
> - * Private structures
> - *****************************************************************************/
> -struct dal_reg_dump_stack_location {
> -	const char *current_caller_func;
> -	long current_pid;
> -	long current_tgid;
> -	uint32_t rw_count;/* register access counter for current function. */
> -};
> -
> -/* This the maximum number of nested calls to the 'reg_dump' facility. */
> -#define DAL_REG_DUMP_STACK_MAX_SIZE 32
> -
> -struct dal_reg_dump_stack {
> -	int32_t stack_pointer;
> -	struct dal_reg_dump_stack_location
> -		stack_locations[DAL_REG_DUMP_STACK_MAX_SIZE];
> -	uint32_t total_rw_count; /* Total count for *all* functions. */
> -};
> -
> -static struct dal_reg_dump_stack reg_dump_stack = {0};
> -
> -/******************************************************************************
> - * Private functions
> - *****************************************************************************/
> -
> -/* Check if current process is the one which requested register dump.
> - * The reason for the check:
> - * mmCRTC_STATUS_FRAME_COUNT is accessed by dal_controller_get_vblank_counter().
> - * Which runs all the time when at least one display is connected.
> - * (Triggered by drm_mode_page_flip_ioctl()). */
> -static bool is_reg_dump_process(void)
> -{
> -	uint32_t i;
> -
> -	/* walk the list of our processes */
> -	for (i = 0; i < reg_dump_stack.stack_pointer; i++) {
> -		struct dal_reg_dump_stack_location *stack_location
> -					= &reg_dump_stack.stack_locations[i];
> -
> -		if (stack_location->current_pid == dm_get_pid()
> -			&& stack_location->current_tgid == dm_get_tgid())
> -			return true;
> -	}
> -
> -	return false;
> -}
> -
> -static bool dal_reg_dump_stack_is_empty(void)
> -{
> -	if (reg_dump_stack.stack_pointer <= 0)
> -		return true;
> -	else
> -		return false;
> -}
> -
> -static struct dal_reg_dump_stack_location *dal_reg_dump_stack_push(void)
> -{
> -	struct dal_reg_dump_stack_location *current_location = NULL;
> -
> -	if (reg_dump_stack.stack_pointer >= DAL_REG_DUMP_STACK_MAX_SIZE) {
> -		/* stack is full */
> -		dm_output_to_console("[REG_DUMP]: %s: stack is full!\n",
> -				__func__);
> -	} else {
> -		current_location =
> -		&reg_dump_stack.stack_locations[reg_dump_stack.stack_pointer];
> -		++reg_dump_stack.stack_pointer;
> -	}
> -
> -	return current_location;
> -}
> -
> -static struct dal_reg_dump_stack_location *dal_reg_dump_stack_pop(void)
> -{
> -	struct dal_reg_dump_stack_location *current_location = NULL;
> -
> -	if (dal_reg_dump_stack_is_empty()) {
> -		/* stack is empty */
> -		dm_output_to_console("[REG_DUMP]: %s: stack is empty!\n",
> -				__func__);
> -	} else {
> -		--reg_dump_stack.stack_pointer;
> -		current_location =
> -		&reg_dump_stack.stack_locations[reg_dump_stack.stack_pointer];
> -	}
> -
> -	return current_location;
> -}
> -
> -/******************************************************************************
> - * Public functions
> - *****************************************************************************/
> -
> -void dal_reg_logger_push(const char *caller_func)
> -{
> -	struct dal_reg_dump_stack_location *free_stack_location;
> -
> -	free_stack_location = dal_reg_dump_stack_push();
> -
> -	if (NULL == free_stack_location)
> -		return;
> -
> -	memset(free_stack_location, 0, sizeof(*free_stack_location));
> -
> -	free_stack_location->current_caller_func = caller_func;
> -	free_stack_location->current_pid = dm_get_pid();
> -	free_stack_location->current_tgid = dm_get_tgid();
> -
> -	dm_output_to_console("[REG_DUMP]:%s - start (pid:%ld, tgid:%ld)\n",
> -		caller_func,
> -		free_stack_location->current_pid,
> -		free_stack_location->current_tgid);
> -}
> -
> -void dal_reg_logger_pop(void)
> -{
> -	struct dal_reg_dump_stack_location *top_stack_location;
> -
> -	top_stack_location = dal_reg_dump_stack_pop();
> -
> -	if (NULL == top_stack_location) {
> -		dm_output_to_console("[REG_DUMP]:%s - Stack is Empty!\n",
> -				__func__);
> -		return;
> -	}
> -
> -	dm_output_to_console(
> -	"[REG_DUMP]:%s - end."\
> -	" Reg R/W Count: Total=%d Function=%d. (pid:%ld, tgid:%ld)\n",
> -			top_stack_location->current_caller_func,
> -			reg_dump_stack.total_rw_count,
> -			top_stack_location->rw_count,
> -			dm_get_pid(),
> -			dm_get_tgid());
> -
> -	memset(top_stack_location, 0, sizeof(*top_stack_location));
> -}
> -
> -void dal_reg_logger_rw_count_increment(void)
> -{
> -	++reg_dump_stack.total_rw_count;
> -
> -	++reg_dump_stack.stack_locations
> -		[reg_dump_stack.stack_pointer - 1].rw_count;
> -}
> -
> -bool dal_reg_logger_should_dump_register(void)
> -{
> -	if (true == dal_reg_dump_stack_is_empty())
> -		return false;
> -
> -	if (false == is_reg_dump_process())
> -		return false;
> -
> -	return true;
> -}
> -
> -/******************************************************************************
> - * End of File.
> - *****************************************************************************/
> diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
> index 7a3f103..f3f9a40 100644
> --- a/drivers/gpu/drm/amd/display/dc/dm_services.h
> +++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
> @@ -109,12 +109,6 @@ static inline uint32_t dm_read_reg_func(
>   
>   	value = cgs_read_register(ctx->cgs_device, address);
>   
> -#if defined(__DAL_REGISTER_LOGGER__)
> -	if (true == dal_reg_logger_should_dump_register()) {
> -		dal_reg_logger_rw_count_increment();
> -		DRM_INFO("%s DC_READ_REG: 0x%x 0x%x\n", func_name, address, value);
> -	}
> -#endif
>   	return value;
>   }
>   
> @@ -127,13 +121,6 @@ static inline void dm_write_reg_func(
>   	uint32_t value,
>   	const char *func_name)
>   {
> -#if defined(__DAL_REGISTER_LOGGER__)
> -	if (true == dal_reg_logger_should_dump_register()) {
> -		dal_reg_logger_rw_count_increment();
> -		DRM_INFO("%s DC_WRITE_REG: 0x%x 0x%x\n", func_name, address, value);
> -	}
> -#endif
> -
>   	if (address == 0) {
>   		DC_ERR("invalid register write. address = 0");
>   		return;
> @@ -418,7 +405,4 @@ bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
>   #define dm_log_to_buffer(buffer, size, fmt, args)\
>   	vsnprintf(buffer, size, fmt, args)
>   
> -long dm_get_pid(void);
> -long dm_get_tgid(void);
> -
>   #endif /* __DM_SERVICES_H__ */
> diff --git a/drivers/gpu/drm/amd/display/include/dal_register_logger.h b/drivers/gpu/drm/amd/display/include/dal_register_logger.h
> deleted file mode 100644
> index 00dfcd7..0000000
> --- a/drivers/gpu/drm/amd/display/include/dal_register_logger.h
> +++ /dev/null
> @@ -1,42 +0,0 @@
> -/*
> - * Copyright 2012-15 Advanced Micro Devices, Inc.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - * Authors: AMD
> - *
> - */
> -
> -#ifndef __DAL_REGISTER_LOGGER__
> -#define __DAL_REGISTER_LOGGER__
> -
> -/****************
> - * API functions
> - ***************/
> -
> -/* dal_reg_logger_push - begin Register Logging */
> -void dal_reg_logger_push(const char *caller_func);
> -/* dal_reg_logger_pop - stop Register Logging */
> -void dal_reg_logger_pop(void);
> -
> -/* for internal use of the Logger only */
> -void dal_reg_logger_rw_count_increment(void);
> -bool dal_reg_logger_should_dump_register(void);
> -
> -#endif /* __DAL_REGISTER_LOGGER__ */


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Re: [PATCH 2/8] dal: remove some unused wrappers

[Harry Wentland]

They are still used all over the place (e.g. 
dc/dce110/dce110_resource.c:413).

We should at least do an spatch to use kzalloc/krealloc/kfree across the 
board if the wrappers are an issue.

NAKed

Harry

On 2016-12-13 01:41 AM, Dave Airlie wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> index 9d51259..9c852a3 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> @@ -36,10 +36,6 @@
>  #include "amdgpu_dm_types.h"
>  #include "amdgpu_pm.h"
>
> -#define dm_alloc(size) kzalloc(size, GFP_KERNEL)
> -#define dm_realloc(ptr, size) krealloc(ptr, size, GFP_KERNEL)
> -#define dm_free(ptr) kfree(ptr)
> -
>  /******************************************************************************
>   * IRQ Interfaces.
>   *****************************************************************************/
>
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Alex Deucher]

On Wed, Dec 14, 2016 at 11:26 AM, Harry Wentland <harry.wentland@amd.com> wrote:
> They are still used all over the place (e.g.
> dc/dce110/dce110_resource.c:413).
>
> We should at least do an spatch to use kzalloc/krealloc/kfree across the
> board if the wrappers are an issue.

Please do.

Alex

>
> NAKed
>
> Harry
>
> On 2016-12-13 01:41 AM, Dave Airlie wrote:
>>
>> From: Dave Airlie <airlied@redhat.com>
>>
>> Signed-off-by: Dave Airlie <airlied@redhat.com>
>> ---
>>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 4 ----
>>  1 file changed, 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
>> index 9d51259..9c852a3 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
>> @@ -36,10 +36,6 @@
>>  #include "amdgpu_dm_types.h"
>>  #include "amdgpu_pm.h"
>>
>> -#define dm_alloc(size) kzalloc(size, GFP_KERNEL)
>> -#define dm_realloc(ptr, size) krealloc(ptr, size, GFP_KERNEL)
>> -#define dm_free(ptr) kfree(ptr)
>> -
>>
>> /******************************************************************************
>>   * IRQ Interfaces.
>>
>> *****************************************************************************/
>>
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Dave Airlie]

[-- Attachment #1.1: Type: text/plain, Size: 1670 bytes --]

On 15 Dec. 2016 02:27, "Harry Wentland" <harry.wentland-5C7GfCeVMHo@public.gmane.org> wrote:

They are still used all over the place (e.g. dc/dce110/dce110_resource.c:41
3).

We should at least do an spatch to use kzalloc/krealloc/kfree across the
board if the wrappers are an issue.


Some are used, these 3 defines are not, there is another header defining
them,

But yes it would be good to drop all alloc wrappers

Dave.


NAKed

Harry


On 2016-12-13 01:41 AM, Dave Airlie wrote:

> From: Dave Airlie <airlied-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
>
> Signed-off-by: Dave Airlie <airlied-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> index 9d51259..9c852a3 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> @@ -36,10 +36,6 @@
>  #include "amdgpu_dm_types.h"
>  #include "amdgpu_pm.h"
>
> -#define dm_alloc(size) kzalloc(size, GFP_KERNEL)
> -#define dm_realloc(ptr, size) krealloc(ptr, size, GFP_KERNEL)
> -#define dm_free(ptr) kfree(ptr)
> -
>  /**********************************************************
> ********************
>   * IRQ Interfaces.
>   ************************************************************
> *****************/
>
> _______________________________________________
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Re: some minor dal cleanups and example of future patches

[Harry Wentland]

The series is Reviewed-by: Harry Wentland <harry.wentland@amd.com>


On 2016-12-13 01:41 AM, Dave Airlie wrote:
> So whenever I look at DAL I find myself trying to figure out what
> all of it does, and this leads me to deleting things, so I'm just
> sending out some stuff that I cleaned today.
>

We really appreciate the cleanup working while looking at our code. 
There's still lots to clean up.

> One thing I noticed in passing is the displayport code seems
> possibly endian unsafe, it casts bytes read from hardware into
> bitfields, this is the best defined behaviour and is generally
> a pattern we try to steer away from.
>

Yeah, we generally assume we run on x86. I haven't looked at all the 
bitfields lately but I do know that we generally use two definitions, 
one for little, one for big endian, for every bitfield.

> The porting the displayport code to use drm defines is the
> sort of example of a cleanup patch that might cause problems
> for you in code sharing, but is the exact sort of patch that
> has been applied to other drivers in the past.
>

Thanks for the concrete example. I'm still discussing with some guys how 
exactly we want to deal with this in shared code but am confident this 
can be done, hence the r-b above.

Harry

> Dave.
>
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Re: some minor dal cleanups and example of future patches

[Michel Dänzer]

On 16/12/16 05:44 AM, Harry Wentland wrote:
> On 2016-12-13 01:41 AM, Dave Airlie wrote:
> 
>> One thing I noticed in passing is the displayport code seems
>> possibly endian unsafe, it casts bytes read from hardware into
>> bitfields, this is the best defined behaviour and is generally
>> a pattern we try to steer away from.
> 
> Yeah, we generally assume we run on x86. I haven't looked at all the
> bitfields lately but I do know that we generally use two definitions,
> one for little, one for big endian, for every bitfield.

The memory layout of C bit-fields doesn't only vary due to endianness,
it's completely up to each architecture's ABI. This is just one reason
why we generally avoid bit-fields for modelling fixed memory layouts.


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Emil Velikov]

Hi Harry,

On 14 December 2016 at 16:26, Harry Wentland <harry.wentland@amd.com> wrote:
> They are still used all over the place (e.g.
> dc/dce110/dce110_resource.c:413).
>
> We should at least do an spatch to use kzalloc/krealloc/kfree across the
> board if the wrappers are an issue.
>
> NAKed
>
[Ignoring all the heat around the DC/DAL topic for a moment]

Pardon for reviving this old thread, yet I believe it's beneficial,
esp. for the less experienced open-source/kernel devs.

There is little-to-no merit of keeping dead code in upstream kernels.
That is, unless there's a series in discussion which uses the code ;-)

NACKs like this one are not cool, furthermore the tend to
alienate/push away people trying to help. With DC/DAL in mind, I think
you/others want all the help people can offer ;-)

Regards,
Emil
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Re: [PATCH 2/8] dal: remove some unused wrappers

[StDenis, Tom]

[-- Attachment #1.1: Type: text/plain, Size: 2613 bytes --]

Hi Emil,


Thing is, with all due respect, the vast majority of DC contributions are likely to come from AMD at the moment.  The code is in high flux and requires knowledge about the hardware that the public does not possess.


That's not to say that submissions aren't welcomed.  But on code that is in flux don't be shocked if you get a higher percentage of NAKs than in other parts of the driver which are relatively static.


It's a bit of a catch.  The public (re: Linux) wants open, stable, efficient, and featureful drivers but then they want to dictate to the vendor exactly how that's going to be executed.  That doesn't really work in practice or theory.  The kernel team has standards that AMD has to meet but the process to get there won't always make everyone happy.


Once DC is actually cleaned up, validated, and merged into the kernel I suspect the RB/NAK ratio will clean up.


Cheers,

Tom


________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Sent: Monday, December 19, 2016 07:46
To: Wentland, Harry
Cc: amd-gfx mailing list
Subject: Re: [PATCH 2/8] dal: remove some unused wrappers

Hi Harry,

On 14 December 2016 at 16:26, Harry Wentland <harry.wentland-5C7GfCeVMHo@public.gmane.org> wrote:
> They are still used all over the place (e.g.
> dc/dce110/dce110_resource.c:413).
>
> We should at least do an spatch to use kzalloc/krealloc/kfree across the
> board if the wrappers are an issue.
>
> NAKed
>
[Ignoring all the heat around the DC/DAL topic for a moment]

Pardon for reviving this old thread, yet I believe it's beneficial,
esp. for the less experienced open-source/kernel devs.

There is little-to-no merit of keeping dead code in upstream kernels.
That is, unless there's a series in discussion which uses the code ;-)

NACKs like this one are not cool, furthermore the tend to
alienate/push away people trying to help. With DC/DAL in mind, I think
you/others want all the help people can offer ;-)

Regards,
Emil
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Harry Wentland]

Hi Emil,

On 2016-12-19 07:46 AM, Emil Velikov wrote:
> Hi Harry,
>
> On 14 December 2016 at 16:26, Harry Wentland <harry.wentland@amd.com> wrote:
>> They are still used all over the place (e.g.
>> dc/dce110/dce110_resource.c:413).
>>
>> We should at least do an spatch to use kzalloc/krealloc/kfree across the
>> board if the wrappers are an issue.
>>
>> NAKed
>>
> [Ignoring all the heat around the DC/DAL topic for a moment]
>
> Pardon for reviving this old thread, yet I believe it's beneficial,
> esp. for the less experienced open-source/kernel devs.
>
> There is little-to-no merit of keeping dead code in upstream kernels.
> That is, unless there's a series in discussion which uses the code ;-)
>
> NACKs like this one are not cool, furthermore the tend to
> alienate/push away people trying to help. With DC/DAL in mind, I think
> you/others want all the help people can offer ;-)
>

Very good point. I think Dave set me straight pretty quickly there. :)

I'll make sure I'll take a much closer look at patches in the future 
before considering NAKs. My impression here was that this code was not 
dead, which was obviously a wrong one and a good indication that a lot 
of the DC codebase is still quite messy.

Thanks,
Harry

> Regards,
> Emil
>
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Emil Velikov]

On 19 December 2016 at 12:53, StDenis, Tom <Tom.StDenis@amd.com> wrote:
>
> Hi Emil,
>
Hey there, Tom.

Seems my "ignoring the heat around DC/DAL ..." wasn't enough and
things have gone there :-(

Cutting down to the important piece...

>
> It's a bit of a catch.  The public (re: Linux) wants open, stable, efficient, and featureful drivers but then they want to dictate to the vendor exactly how that's going to be executed.  That doesn't really work in practice or theory.  The kernel team has standards that AMD has to meet but the process to get there won't always make everyone happy.
>
... here.

Intel has managed to get there and it would be amazing if the whole
AMD team paves in that direction. It's not quick or easy route, yet
you can use any of the materials (presentations, etc.) from Daniel
Vetter's blog.

I'm stupid^Wnice enough to repeat one unwritten rule(?) in a hope that
people who do not know it will take note.
And yes, rules are _not_ mean to be all fun all/most of the time :-\

To reiterate in a different light: upstream kernel should not (and
does not most of the time) cater for non-upstream kernel code.


Thanks
Emil
P.S. Please try to avoid html emails and/or top-posting.
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Sagalovitch, Serguei]

>  Intel has managed to get there 
I am not 100% sure. 
E.g.  http://www.phoronix.com/scan.php?page=article&item=intel-win10-mesa121&num=1

In general Intel driver under Linux is still  behind MS Windows 
version.

Regards,
Serguei Sagalovitch

From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Emil Velikov <emil.l.velikov@gmail.com>
Sent: December 21, 2016 9:50 AM
To: StDenis, Tom
Cc: Wentland, Harry; amd-gfx mailing list
Subject: Re: [PATCH 2/8] dal: remove some unused wrappers
    
On 19 December 2016 at 12:53, StDenis, Tom <Tom.StDenis@amd.com> wrote:
>
> Hi Emil,
>
Hey there, Tom.

Seems my "ignoring the heat around DC/DAL ..." wasn't enough and
things have gone there :-(

Cutting down to the important piece...

>
> It's a bit of a catch.  The public (re: Linux) wants open, stable, efficient, and featureful drivers but then they want to dictate to the vendor exactly how that's going to be executed.  That doesn't really work in practice or theory.  The kernel team has  standards that AMD has to meet but the process to get there won't always make everyone happy.
>
... here.

Intel has managed to get there and it would be amazing if the whole
AMD team paves in that direction. It's not quick or easy route, yet
you can use any of the materials (presentations, etc.) from Daniel
Vetter's blog.

I'm stupid^Wnice enough to repeat one unwritten rule(?) in a hope that
people who do not know it will take note.
And yes, rules are _not_ mean to be all fun all/most of the time :-\

To reiterate in a different light: upstream kernel should not (and
does not most of the time) cater for non-upstream kernel code.


Thanks
Emil
P.S. Please try to avoid html emails and/or top-posting.
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Re: [PATCH 2/8] dal: remove some unused wrappers

[Emil Velikov]

On 21 December 2016 at 15:04, Sagalovitch, Serguei
<Serguei.Sagalovitch@amd.com> wrote:
>>  Intel has managed to get there
> I am not 100% sure.
> E.g.  http://www.phoronix.com/scan.php?page=article&item=intel-win10-mesa121&num=1
>
> In general Intel driver under Linux is still  behind MS Windows
> version.
>
The article is pretty old (6 months as of today) and no longer
applicable. AFAICT on virtually every chipset, but Gen7, the Linux
driver reached and even has surpassed the respective Windows and/or
Android ones. Check the Wikipedia page [1] for exact details ;-)

Side node:
Although amd-gfx is ok, other mailing lists will _explicitly_ discard
HTML emails. If you/others are interested in participating in
open-source communities, I'll repeat my suggestion - avoid
html/top-posting.
Please ?

Thanks
Emil
[1] https://en.wikipedia.org/wiki/List_of_Intel_graphics_processing_units
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