[AMDGPU][TAHITI XT] new display code

[AMDGPU][TAHITI XT] new display code

[sylvain.bertrand]

Hi,

I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
display code is not available for gcn1 hardware?

regards,

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Re: [AMDGPU][TAHITI XT] new display code

[Alex Deucher]

On Mon, Jan 29, 2018 at 12:56 PM,  <sylvain.bertrand@gmail.com> wrote:
> Hi,
>
> I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
> display code is not available for gcn1 hardware?

No one has written the code.

Alex
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Re: [AMDGPU][TAHITI XT] new display code

[sylvain.bertrand]

On Mon, Jan 29, 2018 at 01:04:08PM -0500, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 12:56 PM,  <sylvain.bertrand@gmail.com> wrote:
> > Hi,
> >
> > I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
> > display code is not available for gcn1 hardware?
> 
> No one has written the code.

I don't understand. Isn't the code for DCE programing pretty similar across all
generations due to the atombios?

I guess I miss something.

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Re: [AMDGPU][TAHITI XT] new display code

[Alex Deucher]

On Mon, Jan 29, 2018 at 1:45 PM,  <sylvain.bertrand@gmail.com> wrote:
> On Mon, Jan 29, 2018 at 01:04:08PM -0500, Alex Deucher wrote:
>> On Mon, Jan 29, 2018 at 12:56 PM,  <sylvain.bertrand@gmail.com> wrote:
>> > Hi,
>> >
>> > I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
>> > display code is not available for gcn1 hardware?
>>
>> No one has written the code.
>
> I don't understand. Isn't the code for DCE programing pretty similar across all
> generations due to the atombios?
>
> I guess I miss something.

It's similar, but there is still a bunch of DCE specific code.  No one
has written that DC code for DCE 6 yet.  One could use the DC DCE8
code as a guide, but it still has to be done.

Alex
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Re: [AMDGPU][TAHITI XT] new display code

[sylvain.bertrand]

On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
> It's similar, but there is still a bunch of DCE specific code.  No one
> has written that DC code for DCE 6 yet.  One could use the DC DCE8
> code as a guide, but it still has to be done.

I have not checked the new code, but does it mean the atombios is gone for DCE
programming?

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Re: [AMDGPU][TAHITI XT] new display code

[Alex Deucher]

On Mon, Jan 29, 2018 at 2:31 PM,  <sylvain.bertrand@gmail.com> wrote:
> On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
>> It's similar, but there is still a bunch of DCE specific code.  No one
>> has written that DC code for DCE 6 yet.  One could use the DC DCE8
>> code as a guide, but it still has to be done.
>
> I have not checked the new code, but does it mean the atombios is gone for DCE
> programming?

It's still there. Even with atombios, there is still a bunch of DCE
specific programming required (page flips, interrupts, hotplug,
watermarks, LUTs, cursors, etc.).  DC also adds support for a bunch of
new features that are were not supported by either atombios or the old
modesetting code (regamma/CTM, DP/HDMI audio, dchub programming for
display buffers in system memory for APUs, etc.).

Alex
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Re: [AMDGPU][TAHITI XT] new display code

[sylvain.bertrand]

On Mon, Jan 29, 2018 at 02:39:53PM -0500, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 2:31 PM,  <sylvain.bertrand@gmail.com> wrote:
> > On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
> >> It's similar, but there is still a bunch of DCE specific code.  No one
> >> has written that DC code for DCE 6 yet.  One could use the DC DCE8
> >> code as a guide, but it still has to be done.
> >
> > I have not checked the new code, but does it mean the atombios is gone for DCE
> > programming?
> 
> It's still there. Even with atombios, there is still a bunch of DCE
> specific programming required (page flips, interrupts, hotplug,
> watermarks, LUTs, cursors, etc.).  DC also adds support for a bunch of
> new features that are were not supported by either atombios or the old
> modesetting code (regamma/CTM, DP/HDMI audio, dchub programming for
> display buffers in system memory for APUs, etc.).

As far as I can remember, not for the new features ofc, DCE programming for GCN1 
is very similar if not mostly the same than DCE programming for GCN1.1/2 which
is supported by the new DC code.

Is this planned?

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Re: [AMDGPU][TAHITI XT] new display code

[Alex Deucher]

On Mon, Jan 29, 2018 at 3:34 PM,  <sylvain.bertrand@gmail.com> wrote:
> On Mon, Jan 29, 2018 at 02:39:53PM -0500, Alex Deucher wrote:
>> On Mon, Jan 29, 2018 at 2:31 PM,  <sylvain.bertrand@gmail.com> wrote:
>> > On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
>> >> It's similar, but there is still a bunch of DCE specific code.  No one
>> >> has written that DC code for DCE 6 yet.  One could use the DC DCE8
>> >> code as a guide, but it still has to be done.
>> >
>> > I have not checked the new code, but does it mean the atombios is gone for DCE
>> > programming?
>>
>> It's still there. Even with atombios, there is still a bunch of DCE
>> specific programming required (page flips, interrupts, hotplug,
>> watermarks, LUTs, cursors, etc.).  DC also adds support for a bunch of
>> new features that are were not supported by either atombios or the old
>> modesetting code (regamma/CTM, DP/HDMI audio, dchub programming for
>> display buffers in system memory for APUs, etc.).
>
> As far as I can remember, not for the new features ofc, DCE programming for GCN1
> is very similar if not mostly the same than DCE programming for GCN1.1/2 which
> is supported by the new DC code.
>
> Is this planned?

Right, as I said, you could definitely leverage the support for DCE8
in DC.  The blocks are very similar.  At the moment, we have no plans
to implement DC support for DCE6.

Alex
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Re: [AMDGPU][TAHITI XT] new display code

[sylvain.bertrand]

On Mon, Jan 29, 2018 at 03:40:34PM -0500, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 3:34 PM,  <sylvain.bertrand@gmail.com> wrote:
> > As far as I can remember, not for the new features ofc, DCE programming for GCN1
> > is very similar if not mostly the same than DCE programming for GCN1.1/2 which
> > is supported by the new DC code.
> >
> > Is this planned?
> 
> Right, as I said, you could definitely leverage the support for DCE8
> in DC.  The blocks are very similar.  At the moment, we have no plans
> to implement DC support for DCE6.

Ok.

Which git repo/branch has the most up-to-date DCE code?

Is there a fine granularity selection system for supported DCE features? That
to expose the available/implemented DCE features to userland DRM (I can test only discret
tahiti XT code paths).

I'll try to get something working.

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Re: [AMDGPU][TAHITI XT] new display code

[Alex Deucher]

On Mon, Jan 29, 2018 at 5:35 PM,  <sylvain.bertrand@gmail.com> wrote:
> On Mon, Jan 29, 2018 at 03:40:34PM -0500, Alex Deucher wrote:
>> On Mon, Jan 29, 2018 at 3:34 PM,  <sylvain.bertrand@gmail.com> wrote:
>> > As far as I can remember, not for the new features ofc, DCE programming for GCN1
>> > is very similar if not mostly the same than DCE programming for GCN1.1/2 which
>> > is supported by the new DC code.
>> >
>> > Is this planned?
>>
>> Right, as I said, you could definitely leverage the support for DCE8
>> in DC.  The blocks are very similar.  At the moment, we have no plans
>> to implement DC support for DCE6.
>
> Ok.
>
> Which git repo/branch has the most up-to-date DCE code?

https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next

>
> Is there a fine granularity selection system for supported DCE features? That
> to expose the available/implemented DCE features to userland DRM (I can test only discret
> tahiti XT code paths).
>
> I'll try to get something working.

amdgpu only supports SI and newer parts so you don't have to worry
about DCE6-based APUs in this case.  The current DCE8, 10, and 11
implementations share a lot of code.  Your best bet would be to follow
a similar model for DCE6.

Alex
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Re: [AMDGPU][TAHITI XT] new display code

[Harry Wentland]

On 2018-01-29 05:55 PM, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 5:35 PM,  <sylvain.bertrand@gmail.com> wrote:
>> On Mon, Jan 29, 2018 at 03:40:34PM -0500, Alex Deucher wrote:
>>> On Mon, Jan 29, 2018 at 3:34 PM,  <sylvain.bertrand@gmail.com> wrote:
>>>> As far as I can remember, not for the new features ofc, DCE programming for GCN1
>>>> is very similar if not mostly the same than DCE programming for GCN1.1/2 which
>>>> is supported by the new DC code.
>>>>
>>>> Is this planned?
>>>
>>> Right, as I said, you could definitely leverage the support for DCE8
>>> in DC.  The blocks are very similar.  At the moment, we have no plans
>>> to implement DC support for DCE6.
>>
>> Ok.
>>
>> Which git repo/branch has the most up-to-date DCE code?
> 
> https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next
> 
>>
>> Is there a fine granularity selection system for supported DCE features? That
>> to expose the available/implemented DCE features to userland DRM (I can test only discret
>> tahiti XT code paths).
>>
>> I'll try to get something working.
> 
> amdgpu only supports SI and newer parts so you don't have to worry
> about DCE6-based APUs in this case.  The current DCE8, 10, and 11
> implementations share a lot of code.  Your best bet would be to follow
> a similar model for DCE6.
> 

A good start would be to try re-using the DCE8 code for DCE6. You can probably create a new dce60_resource.c and dce60_hw_sequencer.c, copying the register structs, caps, function pointers, constructors and destructors from the dce80_ versions. Then add a new dce_version and hook it up all over the place, add the CHIP IDs for DC support in amdgpu_device_asic_has_dc_support and you should pretty much be good to go. If you're lucky you'll light up. If not you'll have to debug.

As Alex mentioned, implementing DC support SI parts are not a priority for us, but if you have a working patchset I'll be happy to review.

Harry

> Alex
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Re: [AMDGPU][TAHITI XT] new display code

[sylvain.bertrand]

On Tue, Jan 30, 2018 at 10:17:06AM -0500, Harry Wentland wrote:
> A good start would be to try re-using the DCE8 code for DCE6. You can
> probably create a new dce60_resource.c and dce60_hw_sequencer.c, copying the
> register structs, caps, function pointers, constructors and destructors from
> the dce80_ versions. Then add a new dce_version and hook it up all over the
> place, add the CHIP IDs for DC support in amdgpu_device_asic_has_dc_support
> and you should pretty much be good to go. If you're lucky you'll light up. If
> not you'll have to debug.
> 
> As Alex mentioned, implementing DC support SI parts are not a priority for
> us, but if you have a working patchset I'll be happy to review.

I have massive IRL interference though. I'll give it a try anyway.

Thx for the quickstart tips.

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