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From: Alex Deucher <alexdeucher@gmail.com>
To: Cai Huoqing <caihuoqing@baidu.com>
Cc: "Leo \(Sunpeng\) Li" <sunpeng.li@amd.com>,
	amd-gfx list <amd-gfx@lists.freedesktop.org>,
	Maling list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amd/display: Fix typo in comments
Date: Thu, 29 Jul 2021 22:16:22 -0400	[thread overview]
Message-ID: <CADnq5_Np+uyy2EHvXaGiv_AFiTZ=2WtwbAuFYz6hoVzz5JAkXA@mail.gmail.com> (raw)
In-Reply-To: <20210729081814.1738-1-caihuoqing@baidu.com>

On Thu, Jul 29, 2021 at 4:18 AM Cai Huoqing <caihuoqing@baidu.com> wrote:
>
> Remove the repeated word 'the' from comments
>
> Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>

Applied.  Thanks!

> ---
>  drivers/gpu/drm/amd/display/dc/core/dc_resource.c             | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 2 +-
>  .../drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c   | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c | 2 +-
>  drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c | 4 ++--
>  7 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> index 1596f6b7fed7..7f12ca902f7d 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> @@ -1030,7 +1030,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
>
>         /* Timing borders are part of vactive that we are also supposed to skip in addition
>          * to any stream dst offset. Since dm logic assumes dst is in addressable
> -        * space we need to add the the left and top borders to dst offsets temporarily.
> +        * space we need to add the left and top borders to dst offsets temporarily.
>          * TODO: fix in DM, stream dst is supposed to be in vactive
>          */
>         pipe_ctx->stream->dst.x += timing->h_border_left;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> index 799bae229e67..2091dd8c252d 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> @@ -488,7 +488,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib,
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                         - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> index 6a6d5970d1d5..1a0c14e465fa 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> @@ -488,7 +488,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib,
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                         - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> index dc1c81a6e377..287e31052b30 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> @@ -482,7 +482,7 @@ static void get_meta_and_pte_attr(
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                         - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> index 04601a767a8f..0d934fae1c3a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> @@ -549,7 +549,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib,
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>                                  // each 64b meta request for dcn is 8x8 meta elements and
> -                                // a meta element covers one 256b block of the the data surface.
> +                                // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                 - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> index 3def093ef88e..c23905bc733a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> @@ -563,7 +563,7 @@ static void get_meta_and_pte_attr(
>         log2_meta_req_bytes = 6;        // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3;  // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element - log2_meta_req_height;
>         meta_req_width = 1 << log2_meta_req_width;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> index 414da64f5734..8f2b1684c231 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> @@ -456,7 +456,7 @@ static void dml1_rq_dlg_get_row_heights(
>         log2_meta_req_bytes = 6; /* meta request is 64b and is 8x8byte meta element */
>
>         /* each 64b meta request for dcn is 8x8 meta elements and
> -        * a meta element covers one 256b block of the the data surface.
> +        * a meta element covers one 256b block of the data surface.
>          */
>         log2_meta_req_height = log2_blk256_height + 3; /* meta req is 8x8 */
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
> @@ -718,7 +718,7 @@ static void get_surf_rq_param(
>         log2_meta_req_bytes = 6; /* meta request is 64b and is 8x8byte meta element */
>
>         /* each 64b meta request for dcn is 8x8 meta elements and
> -        * a meta element covers one 256b block of the the data surface.
> +        * a meta element covers one 256b block of the data surface.
>          */
>         log2_meta_req_height = log2_blk256_height + 3; /* meta req is 8x8 byte, each byte represent 1 blk256 */
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
> --
> 2.25.1
>

WARNING: multiple messages have this Message-ID (diff)
From: Alex Deucher <alexdeucher@gmail.com>
To: Cai Huoqing <caihuoqing@baidu.com>
Cc: "Leo \(Sunpeng\) Li" <sunpeng.li@amd.com>,
	"Wentland, Harry" <harry.wentland@amd.com>,
	amd-gfx list <amd-gfx@lists.freedesktop.org>,
	Maling list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amd/display: Fix typo in comments
Date: Thu, 29 Jul 2021 22:16:22 -0400	[thread overview]
Message-ID: <CADnq5_Np+uyy2EHvXaGiv_AFiTZ=2WtwbAuFYz6hoVzz5JAkXA@mail.gmail.com> (raw)
In-Reply-To: <20210729081814.1738-1-caihuoqing@baidu.com>

On Thu, Jul 29, 2021 at 4:18 AM Cai Huoqing <caihuoqing@baidu.com> wrote:
>
> Remove the repeated word 'the' from comments
>
> Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>

Applied.  Thanks!

> ---
>  drivers/gpu/drm/amd/display/dc/core/dc_resource.c             | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 2 +-
>  .../drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c   | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 2 +-
>  .../gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c | 2 +-
>  drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c | 4 ++--
>  7 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> index 1596f6b7fed7..7f12ca902f7d 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> @@ -1030,7 +1030,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
>
>         /* Timing borders are part of vactive that we are also supposed to skip in addition
>          * to any stream dst offset. Since dm logic assumes dst is in addressable
> -        * space we need to add the the left and top borders to dst offsets temporarily.
> +        * space we need to add the left and top borders to dst offsets temporarily.
>          * TODO: fix in DM, stream dst is supposed to be in vactive
>          */
>         pipe_ctx->stream->dst.x += timing->h_border_left;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> index 799bae229e67..2091dd8c252d 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> @@ -488,7 +488,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib,
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                         - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> index 6a6d5970d1d5..1a0c14e465fa 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> @@ -488,7 +488,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib,
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                         - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> index dc1c81a6e377..287e31052b30 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> @@ -482,7 +482,7 @@ static void get_meta_and_pte_attr(
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                         - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> index 04601a767a8f..0d934fae1c3a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> @@ -549,7 +549,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib,
>         log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element
>
>                                  // each 64b meta request for dcn is 8x8 meta elements and
> -                                // a meta element covers one 256b block of the the data surface.
> +                                // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
>                 - log2_meta_req_height;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> index 3def093ef88e..c23905bc733a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> @@ -563,7 +563,7 @@ static void get_meta_and_pte_attr(
>         log2_meta_req_bytes = 6;        // meta request is 64b and is 8x8byte meta element
>
>         // each 64b meta request for dcn is 8x8 meta elements and
> -       // a meta element covers one 256b block of the the data surface.
> +       // a meta element covers one 256b block of the data surface.
>         log2_meta_req_height = log2_blk256_height + 3;  // meta req is 8x8 byte, each byte represent 1 blk256
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element - log2_meta_req_height;
>         meta_req_width = 1 << log2_meta_req_width;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> index 414da64f5734..8f2b1684c231 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> @@ -456,7 +456,7 @@ static void dml1_rq_dlg_get_row_heights(
>         log2_meta_req_bytes = 6; /* meta request is 64b and is 8x8byte meta element */
>
>         /* each 64b meta request for dcn is 8x8 meta elements and
> -        * a meta element covers one 256b block of the the data surface.
> +        * a meta element covers one 256b block of the data surface.
>          */
>         log2_meta_req_height = log2_blk256_height + 3; /* meta req is 8x8 */
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
> @@ -718,7 +718,7 @@ static void get_surf_rq_param(
>         log2_meta_req_bytes = 6; /* meta request is 64b and is 8x8byte meta element */
>
>         /* each 64b meta request for dcn is 8x8 meta elements and
> -        * a meta element covers one 256b block of the the data surface.
> +        * a meta element covers one 256b block of the data surface.
>          */
>         log2_meta_req_height = log2_blk256_height + 3; /* meta req is 8x8 byte, each byte represent 1 blk256 */
>         log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element
> --
> 2.25.1
>
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  reply	other threads:[~2021-07-30  2:16 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-29  8:18 [PATCH] drm/amd/display: Fix typo in comments Cai Huoqing
2021-07-29  8:18 ` Cai Huoqing
2021-07-30  2:16 ` Alex Deucher [this message]
2021-07-30  2:16   ` Alex Deucher

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