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From: Alex Deucher <alexdeucher@gmail.com>
To: Peng Ju Zhou <PengJu.Zhou@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v5 10/10] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV
Date: Wed, 19 May 2021 23:47:28 -0400	[thread overview]
Message-ID: <CADnq5_NtV-tzvWNGpXu239r805tvu0muQhmUYyG_w-ezBZ_rWQ@mail.gmail.com> (raw)
In-Reply-To: <20210517143910.2125-10-PengJu.Zhou@amd.com>

On Mon, May 17, 2021 at 10:39 AM Peng Ju Zhou <PengJu.Zhou@amd.com> wrote:
>
> KMD should not program these registers, the value were
> defined in the host, so skip them in the SRIOV environment.
>
> Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> index e24225b3d42a..422d106a650b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> @@ -197,12 +197,12 @@ static void mmhub_v2_0_init_system_aperture_regs(struct amdgpu_device *adev)
>         uint64_t value;
>         uint32_t tmp;
>
> -       /* Program the AGP BAR */
> -       WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0);
> -       WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> -       WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
> -
>         if (!amdgpu_sriov_vf(adev)) {
> +               /* Program the AGP BAR */
> +               WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0);
> +               WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> +               WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
> +
>                 /* Program the system aperture low logical page number. */
>                 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>                              min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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  reply	other threads:[~2021-05-20  3:47 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 14:39 [PATCH v5 01/10] drm/amdgpu: Indirect register access for Navi12 sriov Peng Ju Zhou
2021-05-17 14:39 ` [PATCH v5 02/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10* Peng Ju Zhou
2021-05-17 14:39 ` [PATCH v5 03/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10* Peng Ju Zhou
2021-05-20  4:33   ` Felix Kuehling
2021-05-17 14:39 ` [PATCH v5 04/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c Peng Ju Zhou
2021-05-17 14:39 ` [PATCH v5 05/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5* Peng Ju Zhou
2021-05-17 14:39 ` [PATCH v5 06/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c Peng Ju Zhou
2021-05-17 14:39 ` [PATCH v5 07/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c Peng Ju Zhou
2021-05-17 14:39 ` [PATCH v5 08/10] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2* Peng Ju Zhou
2021-05-20  3:48   ` Alex Deucher
2021-05-17 14:39 ` [PATCH v5 09/10] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers Peng Ju Zhou
2021-05-20  3:46   ` Alex Deucher
2021-05-21  9:58     ` Zhou, Peng Ju
2021-05-21 10:07       ` Deng, Emily
2021-05-21 14:25         ` Alex Deucher
2021-05-23 11:41         ` Zhou, Peng Ju
2021-05-17 14:39 ` [PATCH v5 10/10] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV Peng Ju Zhou
2021-05-20  3:47   ` Alex Deucher [this message]
2021-05-17 14:49 ` [PATCH v5 01/10] drm/amdgpu: Indirect register access for Navi12 sriov Zhou, Peng Ju
2021-05-19 14:34   ` Zhou, Peng Ju
2021-05-25 15:18     ` Ming, Davis

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