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* [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index
@ 2018-11-21 15:52 Oak Zeng
       [not found] ` <1542815518-8124-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 28+ messages in thread
From: Oak Zeng @ 2018-11-21 15:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zeng, Oak

This is a preparation work to make reserved doorbell index per device,
instead of using a global macro definition. By doing this, we can easily
change doorbell layout for future ASICs while not affecting ASICs in
production.

Change-Id: If08e2bc9d0749748ed4083ba4eb32a4698763085
Signed-off-by: Oak Zeng <ozeng@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 +++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2c80453..b7ee4ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -813,6 +813,55 @@ struct amd_powerplay {
 	uint32_t pp_feature;
 };
 
+/* Reserved doorbells for amdgpu (including multimedia).
+ * KFD can use all the rest in the 2M doorbell bar.
+ * For asic before vega10, doorbell is 32-bit, so the
+ * index/offset is in dword. For vega10 and after, doorbell
+ * can be 64-bit, so the index defined is in qword.
+ */
+struct amdgpu_doorbell_index {
+	uint32_t kiq;
+	uint32_t mec_ring0;
+	uint32_t mec_ring1;
+	uint32_t mec_ring2;
+	uint32_t mec_ring3;
+	uint32_t mec_ring4;
+	uint32_t mec_ring5;
+	uint32_t mec_ring6;
+	uint32_t mec_ring7;
+	uint32_t userqueue_start;
+	uint32_t userqueue_end;
+	uint32_t gfx_ring0;
+	uint32_t sdma_engine0;
+	uint32_t sdma_engine1;
+	uint32_t sdma_engine2;
+	uint32_t sdma_engine3;
+	uint32_t sdma_engine4;
+	uint32_t sdma_engine5;
+	uint32_t sdma_engine6;
+	uint32_t sdma_engine7;
+	uint32_t ih;
+	union {
+		struct {
+			uint32_t vcn_ring0_1;
+			uint32_t vcn_ring2_3;
+			uint32_t vcn_ring4_5;
+			uint32_t vcn_ring6_7;
+		} vcn;
+		struct {
+			uint32_t uvd_ring0_1;
+			uint32_t uvd_ring2_3;
+			uint32_t uvd_ring4_5;
+			uint32_t uvd_ring6_7;
+			uint32_t vce_ring0_1;
+			uint32_t vce_ring2_3;
+			uint32_t vce_ring4_5;
+			uint32_t vce_ring6_7;
+		} uvd_vce;
+	};
+	uint32_t max_assignment;
+};
+
 #define AMDGPU_RESET_MAGIC_NUM 64
 struct amdgpu_device {
 	struct device			*dev;
@@ -1026,6 +1075,7 @@ struct amdgpu_device {
 	unsigned long last_mm_index;
 	bool                            in_gpu_reset;
 	struct mutex  lock_reset;
+	struct amdgpu_doorbell_index doorbell_index;
 };
 
 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 28+ messages in thread
* [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index
@ 2018-11-21 22:00 Oak Zeng
       [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 28+ messages in thread
From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zeng, Oak

This is a preparation work to make reserved doorbell index per device,
instead of using a global macro definition. By doing this, we can easily
change doorbell layout for future ASICs while not affecting ASICs in
production.

Change-Id: If08e2bc9d0749748ed4083ba4eb32a4698763085
Signed-off-by: Oak Zeng <ozeng@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 +++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2c80453..b7ee4ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -813,6 +813,55 @@ struct amd_powerplay {
 	uint32_t pp_feature;
 };
 
+/* Reserved doorbells for amdgpu (including multimedia).
+ * KFD can use all the rest in the 2M doorbell bar.
+ * For asic before vega10, doorbell is 32-bit, so the
+ * index/offset is in dword. For vega10 and after, doorbell
+ * can be 64-bit, so the index defined is in qword.
+ */
+struct amdgpu_doorbell_index {
+	uint32_t kiq;
+	uint32_t mec_ring0;
+	uint32_t mec_ring1;
+	uint32_t mec_ring2;
+	uint32_t mec_ring3;
+	uint32_t mec_ring4;
+	uint32_t mec_ring5;
+	uint32_t mec_ring6;
+	uint32_t mec_ring7;
+	uint32_t userqueue_start;
+	uint32_t userqueue_end;
+	uint32_t gfx_ring0;
+	uint32_t sdma_engine0;
+	uint32_t sdma_engine1;
+	uint32_t sdma_engine2;
+	uint32_t sdma_engine3;
+	uint32_t sdma_engine4;
+	uint32_t sdma_engine5;
+	uint32_t sdma_engine6;
+	uint32_t sdma_engine7;
+	uint32_t ih;
+	union {
+		struct {
+			uint32_t vcn_ring0_1;
+			uint32_t vcn_ring2_3;
+			uint32_t vcn_ring4_5;
+			uint32_t vcn_ring6_7;
+		} vcn;
+		struct {
+			uint32_t uvd_ring0_1;
+			uint32_t uvd_ring2_3;
+			uint32_t uvd_ring4_5;
+			uint32_t uvd_ring6_7;
+			uint32_t vce_ring0_1;
+			uint32_t vce_ring2_3;
+			uint32_t vce_ring4_5;
+			uint32_t vce_ring6_7;
+		} uvd_vce;
+	};
+	uint32_t max_assignment;
+};
+
 #define AMDGPU_RESET_MAGIC_NUM 64
 struct amdgpu_device {
 	struct device			*dev;
@@ -1026,6 +1075,7 @@ struct amdgpu_device {
 	unsigned long last_mm_index;
 	bool                            in_gpu_reset;
 	struct mutex  lock_reset;
+	struct amdgpu_doorbell_index doorbell_index;
 };
 
 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 28+ messages in thread

end of thread, other threads:[~2018-11-26 18:05 UTC | newest]

Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-21 15:52 [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index Oak Zeng
     [not found] ` <1542815518-8124-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 15:52   ` [PATCH 2/7] drm/amdgpu: Vega10 doorbell index initialization Oak Zeng
     [not found]     ` <1542815518-8124-2-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 16:14       ` Alex Deucher
2018-11-21 15:52   ` [PATCH 3/7] drm/amdgpu: Vega12 " Oak Zeng
     [not found]     ` <1542815518-8124-3-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 16:16       ` Alex Deucher
     [not found]         ` <CADnq5_PjTtoyYDROkVA8DVytBv2sdwS4_z840xzWCdL=RwXbrw@mail.gmail.com>
     [not found]           ` <CADnq5_PjTtoyYDROkVA8DVytBv2sdwS4_z840xzWCdL=RwXbrw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-11-26 15:06             ` Zeng, Oak
2018-11-21 15:52   ` [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 Oak Zeng
     [not found]     ` <1542815518-8124-4-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 16:17       ` Alex Deucher
2018-11-21 15:52   ` [PATCH 5/7] drm/amdgpu: Call doorbell index init on device initialization Oak Zeng
     [not found]     ` <1542815518-8124-5-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 16:21       ` Alex Deucher
     [not found]         ` <CADnq5_O-ajV9xMFF5BsKUei48LLY1dGV3C_i+oDy+5J+Y2VwHA@mail.gmail.com>
     [not found]           ` <CADnq5_O-ajV9xMFF5BsKUei48LLY1dGV3C_i+oDy+5J+Y2VwHA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-11-26 15:31             ` Zeng, Oak
     [not found]               ` <BN6PR12MB165183EC3AAC7436C0E6846C80D70-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-26 15:59                 ` Deucher, Alexander
     [not found]                   ` <BN6PR12MB1809D7A7892DC1A246F47750F7D70-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-26 16:02                     ` Deucher, Alexander
     [not found]                       ` <BN6PR12MB180989D8B99769C89F6F710FF7D70-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-26 16:20                         ` Zeng, Oak
2018-11-21 15:52   ` [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition Oak Zeng
2018-11-21 15:52   ` [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic Oak Zeng
     [not found]     ` <1542815518-8124-7-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 16:10       ` Liu, Shaoyun
     [not found]         ` <76e4deda-4539-4fdb-3e96-3a3b6f668ec7-5C7GfCeVMHo@public.gmane.org>
2018-11-21 16:32           ` Zeng, Oak
2018-11-21 16:22       ` Alex Deucher
     [not found]         ` <CADnq5_M6+jQpJGF0wscUP917QWbDSwCQTF4TYMTtTXp2vsKXEQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-11-21 16:37           ` Zeng, Oak
     [not found]             ` <BN6PR12MB1651198C70B58BE69A44EBFF80DA0-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-21 16:39               ` Alex Deucher
     [not found]                 ` <CADnq5_Omgd=yLKuqpb8-ZsrBJdjkEord0OL0WwVpXXcntQaB1A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-11-22  9:26                   ` Christian König
     [not found]                     ` <5a171836-f0bc-4edf-db9d-51746e8c9c4e-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-11-23 18:56                       ` Deucher, Alexander
     [not found]                         ` <BN6PR12MB180946F99B5AA562E542C4EBF7D40-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-23 19:38                           ` Zeng, Oak
2018-11-21 22:00 [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index Oak Zeng
     [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:00   ` [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 Oak Zeng
     [not found]     ` <1542837620-13571-4-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:40       ` Alex Deucher
     [not found]         ` <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg@mail.gmail.com>
     [not found]           ` <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-11-26 17:20             ` Zeng, Oak
     [not found]               ` <BN6PR12MB165126A9513105183F63194880D70-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-26 18:05                 ` Deucher, Alexander

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