[PATCH 1/5] drm/amdgpu: reverts commit b01245ff54db66073b104ac9d9fbefb7b264b36d.

[PATCH 1/5] drm/amdgpu: reverts commit b01245ff54db66073b104ac9d9fbefb7b264b36d.

[Andrey Grodzovsky]

In preparation for doing XGMI reset synchronization using task barrier.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 76 +++++-------------------------
 2 files changed, 12 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a78a363..50bab33 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1001,8 +1001,6 @@ struct amdgpu_device {
 
 	bool                            pm_sysfs_en;
 	bool                            ucode_sysfs_en;
-
-	bool				in_baco;
 };
 
 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 7324a5f..1d19edfa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2667,7 +2667,7 @@ static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)
 	if (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)
 		adev->asic_reset_res = (adev->in_baco == false) ?
 				amdgpu_device_baco_enter(adev->ddev) :
-				amdgpu_device_baco_exit(adev->ddev);
+				qamdgpu_device_baco_exit(adev->ddev);
 	else
 		adev->asic_reset_res = amdgpu_asic_reset(adev);
 
@@ -3796,18 +3796,13 @@ static int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
 	return r;
 }
 
-static int amdgpu_do_asic_reset(struct amdgpu_device *adev,
-			       struct amdgpu_hive_info *hive,
+static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
 			       struct list_head *device_list_handle,
 			       bool *need_full_reset_arg)
 {
 	struct amdgpu_device *tmp_adev = NULL;
 	bool need_full_reset = *need_full_reset_arg, vram_lost = false;
 	int r = 0;
-	int cpu = smp_processor_id();
-	bool use_baco =
-		(amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) ?
-		true : false;
 
 	/*
 	 * ASIC reset has to be done on all HGMI hive nodes ASAP
@@ -3815,62 +3810,22 @@ static int amdgpu_do_asic_reset(struct amdgpu_device *adev,
 	 */
 	if (need_full_reset) {
 		list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
-			/*
-			 * For XGMI run all resets in parallel to speed up the
-			 * process by scheduling the highpri wq on different
-			 * cpus. For XGMI with baco reset, all nodes must enter
-			 * baco within close proximity before anyone exit.
-			 */
+			/* For XGMI run all resets in parallel to speed up the process */
 			if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {
-				if (!queue_work_on(cpu, system_highpri_wq,
-						   &tmp_adev->xgmi_reset_work))
+				if (!queue_work(system_highpri_wq, &tmp_adev->xgmi_reset_work))
 					r = -EALREADY;
-				cpu = cpumask_next(cpu, cpu_online_mask);
 			} else
 				r = amdgpu_asic_reset(tmp_adev);
-			if (r)
-				break;
-		}
-
-		/* For XGMI wait for all work to complete before proceed */
-		if (!r) {
-			list_for_each_entry(tmp_adev, device_list_handle,
-					    gmc.xgmi.head) {
-				if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {
-					flush_work(&tmp_adev->xgmi_reset_work);
-					r = tmp_adev->asic_reset_res;
-					if (r)
-						break;
-					if (use_baco)
-						tmp_adev->in_baco = true;
-				}
-			}
-		}
 
-		/*
-		 * For XGMI with baco reset, need exit baco phase by scheduling
-		 * xgmi_reset_work one more time. PSP reset and sGPU skips this
-		 * phase. Not assume the situation that PSP reset and baco reset
-		 * coexist within an XGMI hive.
-		 */
-
-		if (!r && use_baco) {
-			cpu = smp_processor_id();
-			list_for_each_entry(tmp_adev, device_list_handle,
-					    gmc.xgmi.head) {
-				if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {
-					if (!queue_work_on(cpu,
-						system_highpri_wq,
-						&tmp_adev->xgmi_reset_work))
-						r = -EALREADY;
-					if (r)
-						break;
-					cpu = cpumask_next(cpu, cpu_online_mask);
-				}
+			if (r) {
+				DRM_ERROR("ASIC reset failed with error, %d for drm dev, %s",
+					 r, tmp_adev->ddev->unique);
+				break;
 			}
 		}
 
-		if (!r && use_baco) {
+		/* For XGMI wait for all PSP resets to complete before proceed */
+		if (!r) {
 			list_for_each_entry(tmp_adev, device_list_handle,
 					    gmc.xgmi.head) {
 				if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {
@@ -3878,21 +3833,15 @@ static int amdgpu_do_asic_reset(struct amdgpu_device *adev,
 					r = tmp_adev->asic_reset_res;
 					if (r)
 						break;
-					tmp_adev->in_baco = false;
 				}
 			}
 		}
-
-		if (r) {
-			DRM_ERROR("ASIC reset failed with error, %d for drm dev, %s",
-				 r, tmp_adev->ddev->unique);
-			goto end;
-		}
 	}
 
 	if (!r && amdgpu_ras_intr_triggered())
 		amdgpu_ras_intr_cleared();
 
+
 	list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
 		if (need_full_reset) {
 			/* post card */
@@ -4181,8 +4130,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
 		if (r)
 			adev->asic_reset_res = r;
 	} else {
-		r  = amdgpu_do_asic_reset(adev, hive, device_list_handle,
-					  &need_full_reset);
+		r  = amdgpu_do_asic_reset(hive, device_list_handle, &need_full_reset);
 		if (r && r == -EAGAIN)
 			goto retry;
 	}
-- 
2.7.4

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[PATCH 2/5] drm: Add Reusable task barrier.

[Andrey Grodzovsky]

It is used to synchronize N threads at a rendevouz point before execution
of critical code that has to be started by all the threads at approximatly
the same time.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 include/drm/task_barrier.h | 106 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 106 insertions(+)
 create mode 100644 include/drm/task_barrier.h

diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
new file mode 100644
index 0000000..81fb0f7
--- /dev/null
+++ b/include/drm/task_barrier.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2019 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#include <linux/semaphore.h>
+#include <linux/atomic.h>
+
+/*
+ * Reusable 2 PHASE task barrier (randevouz point) implementation for N tasks.
+ * Based on the Little book of sempahores - https://greenteapress.com/wp/semaphores/
+ */
+
+
+
+#ifndef DRM_TASK_BARRIER_H_
+#define DRM_TASK_BARRIER_H_
+
+/*
+ * Represents an instance of a task barrier.
+ */
+struct task_barrier {
+	unsigned int n;
+	atomic_t count;
+	struct semaphore enter_turnstile;
+	struct semaphore exit_turnstile;
+};
+
+static inline void task_barrier_signal_turnstile(struct semaphore *turnstile,
+						 unsigned int n)
+{
+	int i;
+
+	for (i = 0 ; i < n; i++)
+		up(turnstile);
+}
+
+static inline void task_barrier_init(struct task_barrier *tb)
+{
+	tb->n = 0;
+	atomic_set(&tb->count, 0);
+	sema_init(&tb->enter_turnstile, 0);
+	sema_init(&tb->exit_turnstile, 0);
+}
+
+static inline void task_barrier_add_task(struct task_barrier *tb)
+{
+	tb->n++;
+}
+
+static inline void task_barrier_rem_task(struct task_barrier *tb)
+{
+	tb->n--;
+}
+
+/*
+ * Lines up all the threads BEFORE the critical point.
+ *
+ * When all thread passed this code the entry barrier is back to locked state.
+ */
+static inline void task_barrier_enter(struct task_barrier *tb)
+{
+	if (atomic_inc_return(&tb->count) == tb->n)
+		task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
+
+	down(&tb->enter_turnstile);
+}
+
+/*
+ * Lines up all the threads AFTER the critical point.
+ *
+ * This function is used to avoid any one thread running ahead of the reset if
+ * the barrier is used in a loop (repeatedly) .
+ */
+static inline void task_barrier_exit(struct task_barrier *tb)
+{
+	if (atomic_dec_return(&tb->count) == 0)
+		task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
+
+	down(&tb->exit_turnstile);
+}
+
+static inline void task_barrier_full(struct task_barrier *tb)
+{
+	task_barrier_enter(tb);
+	task_barrier_exit(tb);
+}
+
+#endif
-- 
2.7.4

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[PATCH 3/5] drm/amdgpu: Add task barrier to XGMI hive.

[Andrey Grodzovsky]

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 4 ++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 61d13d8..5cf920d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -261,6 +261,7 @@ struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lo
 	INIT_LIST_HEAD(&tmp->device_list);
 	mutex_init(&tmp->hive_lock);
 	mutex_init(&tmp->reset_lock);
+	task_barrier_init(&tmp->tb);
 
 	if (lock)
 		mutex_lock(&tmp->hive_lock);
@@ -408,6 +409,8 @@ int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
 	top_info->num_nodes = count;
 	hive->number_devices = count;
 
+	task_barrier_add_task(&hive->tb);
+
 	if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
 		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
 			/* update node list for other device in the hive */
@@ -470,6 +473,7 @@ void amdgpu_xgmi_remove_device(struct amdgpu_device *adev)
 		mutex_destroy(&hive->hive_lock);
 		mutex_destroy(&hive->reset_lock);
 	} else {
+		task_barrier_rem_task(&hive->tb);
 		amdgpu_xgmi_sysfs_rem_dev_info(adev, hive);
 		mutex_unlock(&hive->hive_lock);
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
index bbf504f..74011fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
@@ -22,6 +22,7 @@
 #ifndef __AMDGPU_XGMI_H__
 #define __AMDGPU_XGMI_H__
 
+#include <drm/task_barrier.h>
 #include "amdgpu_psp.h"
 
 struct amdgpu_hive_info {
@@ -33,6 +34,7 @@ struct amdgpu_hive_info {
 	struct device_attribute dev_attr;
 	struct amdgpu_device *adev;
 	int pstate; /*0 -- low , 1 -- high , -1 unknown*/
+	struct task_barrier tb;
 };
 
 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock);
-- 
2.7.4

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[PATCH 4/5] Subject: drm/amdgpu: Redo XGMI reset synchronization.

[Andrey Grodzovsky]

Use task barrier in XGMI hive to synchronize ASIC resets
across devices in XGMI hive.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 42 +++++++++++++++++++++++++-----
 1 file changed, 36 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 1d19edfa..e4089a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -67,6 +67,7 @@
 #include "amdgpu_tmz.h"
 
 #include <linux/suspend.h>
+#include <drm/task_barrier.h>
 
 MODULE_FIRMWARE("amdgpu/vega10_gpu_info.bin");
 MODULE_FIRMWARE("amdgpu/vega12_gpu_info.bin");
@@ -2663,14 +2664,43 @@ static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)
 {
 	struct amdgpu_device *adev =
 		container_of(__work, struct amdgpu_device, xgmi_reset_work);
+	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0);
 
-	if (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)
-		adev->asic_reset_res = (adev->in_baco == false) ?
-				amdgpu_device_baco_enter(adev->ddev) :
-				qamdgpu_device_baco_exit(adev->ddev);
-	else
-		adev->asic_reset_res = amdgpu_asic_reset(adev);
+	/*
+	 * Use task barrier to synchronize all xgmi reset works across the
+	 * hive.
+	 * task_barrier_enter and task_barrier_exit will block untill all the
+	 * threads running the xgmi reset works reach those points. I assume
+	 * guarantee of progress here for all the threads as the workqueue code
+	 * creates new worker threads as needed by amount of work items in queue
+	 * (see worker_thread) and also each thread sleeps in the barrir and by
+	 * this yielding the CPU for other work threads to make progress.
+	 */
+	if (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
+
+		if (hive)
+			task_barrier_enter(&hive->tb);
+
+		adev->asic_reset_res = amdgpu_device_baco_enter(adev->ddev);
+
+		if (adev->asic_reset_res)
+			goto fail;
+
+		if (hive)
+			task_barrier_exit(&hive->tb);
+
+		adev->asic_reset_res = amdgpu_device_baco_exit(adev->ddev);
+
+		if (adev->asic_reset_res)
+			goto fail;
+	} else {
+		if (hive)
+			task_barrier_full(&hive->tb);
+
+		adev->asic_reset_res =  amdgpu_asic_reset(adev);
+	}
 
+fail:
 	if (adev->asic_reset_res)
 		DRM_WARN("ASIC reset failed with error, %d for drm dev, %s",
 			 adev->asic_reset_res, adev->ddev->unique);
-- 
2.7.4

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[PATCH 5/5] drm/amdgpu: Switch from system_highpri_wq to system_unbound_wq

[Andrey Grodzovsky]

This is to avoid queueing jobs to same CPU during XGMI hive reset
because there is a strict timeline for when the reset commands
must reach all the GPUs in the hive.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index e4089a0..1518565 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3842,7 +3842,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
 		list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
 			/* For XGMI run all resets in parallel to speed up the process */
 			if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {
-				if (!queue_work(system_highpri_wq, &tmp_adev->xgmi_reset_work))
+				if (!queue_work(system_unbound_wq, &tmp_adev->xgmi_reset_work))
 					r = -EALREADY;
 			} else
 				r = amdgpu_asic_reset(tmp_adev);
-- 
2.7.4

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Re: [PATCH 2/5] drm: Add Reusable task barrier.

[Alex Deucher]

On Wed, Dec 11, 2019 at 3:07 PM Andrey Grodzovsky
<andrey.grodzovsky@amd.com> wrote:
>
> It is used to synchronize N threads at a rendevouz point before execution
> of critical code that has to be started by all the threads at approximatly
> the same time.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>

You should resend to dri-devel since this task barrier is being added
to common code.

Alex

> ---
>  include/drm/task_barrier.h | 106 +++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 106 insertions(+)
>  create mode 100644 include/drm/task_barrier.h
>
> diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
> new file mode 100644
> index 0000000..81fb0f7
> --- /dev/null
> +++ b/include/drm/task_barrier.h
> @@ -0,0 +1,106 @@
> +/*
> + * Copyright 2019 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +#include <linux/semaphore.h>
> +#include <linux/atomic.h>
> +
> +/*
> + * Reusable 2 PHASE task barrier (randevouz point) implementation for N tasks.
> + * Based on the Little book of sempahores - https://greenteapress.com/wp/semaphores/
> + */
> +
> +
> +
> +#ifndef DRM_TASK_BARRIER_H_
> +#define DRM_TASK_BARRIER_H_
> +
> +/*
> + * Represents an instance of a task barrier.
> + */
> +struct task_barrier {
> +       unsigned int n;
> +       atomic_t count;
> +       struct semaphore enter_turnstile;
> +       struct semaphore exit_turnstile;
> +};
> +
> +static inline void task_barrier_signal_turnstile(struct semaphore *turnstile,
> +                                                unsigned int n)
> +{
> +       int i;
> +
> +       for (i = 0 ; i < n; i++)
> +               up(turnstile);
> +}
> +
> +static inline void task_barrier_init(struct task_barrier *tb)
> +{
> +       tb->n = 0;
> +       atomic_set(&tb->count, 0);
> +       sema_init(&tb->enter_turnstile, 0);
> +       sema_init(&tb->exit_turnstile, 0);
> +}
> +
> +static inline void task_barrier_add_task(struct task_barrier *tb)
> +{
> +       tb->n++;
> +}
> +
> +static inline void task_barrier_rem_task(struct task_barrier *tb)
> +{
> +       tb->n--;
> +}
> +
> +/*
> + * Lines up all the threads BEFORE the critical point.
> + *
> + * When all thread passed this code the entry barrier is back to locked state.
> + */
> +static inline void task_barrier_enter(struct task_barrier *tb)
> +{
> +       if (atomic_inc_return(&tb->count) == tb->n)
> +               task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
> +
> +       down(&tb->enter_turnstile);
> +}
> +
> +/*
> + * Lines up all the threads AFTER the critical point.
> + *
> + * This function is used to avoid any one thread running ahead of the reset if
> + * the barrier is used in a loop (repeatedly) .
> + */
> +static inline void task_barrier_exit(struct task_barrier *tb)
> +{
> +       if (atomic_dec_return(&tb->count) == 0)
> +               task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
> +
> +       down(&tb->exit_turnstile);
> +}
> +
> +static inline void task_barrier_full(struct task_barrier *tb)
> +{
> +       task_barrier_enter(tb);
> +       task_barrier_exit(tb);
> +}
> +
> +#endif
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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Re: [PATCH 2/5] drm: Add Reusable task barrier.

[Christian König]

Am 11.12.19 um 21:19 schrieb Alex Deucher:
> On Wed, Dec 11, 2019 at 3:07 PM Andrey Grodzovsky
> <andrey.grodzovsky@amd.com> wrote:
>> It is used to synchronize N threads at a rendevouz point before execution
>> of critical code that has to be started by all the threads at approximatly
>> the same time.
>>
>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
> You should resend to dri-devel since this task barrier is being added
> to common code.

Additional to that this whole thing has the potential to raise lockdep 
warnings and if I'm not completely mistaken doesn't even work correctly.

See Linux kernel semaphores don't allow negative values (the count field 
in struct semaphore is unsigned).

Regards,
Christian.

>
> Alex
>
>> ---
>>   include/drm/task_barrier.h | 106 +++++++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 106 insertions(+)
>>   create mode 100644 include/drm/task_barrier.h
>>
>> diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
>> new file mode 100644
>> index 0000000..81fb0f7
>> --- /dev/null
>> +++ b/include/drm/task_barrier.h
>> @@ -0,0 +1,106 @@
>> +/*
>> + * Copyright 2019 Advanced Micro Devices, Inc.
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + *
>> + */
>> +#include <linux/semaphore.h>
>> +#include <linux/atomic.h>
>> +
>> +/*
>> + * Reusable 2 PHASE task barrier (randevouz point) implementation for N tasks.
>> + * Based on the Little book of sempahores - https://greenteapress.com/wp/semaphores/
>> + */
>> +
>> +
>> +
>> +#ifndef DRM_TASK_BARRIER_H_
>> +#define DRM_TASK_BARRIER_H_
>> +
>> +/*
>> + * Represents an instance of a task barrier.
>> + */
>> +struct task_barrier {
>> +       unsigned int n;
>> +       atomic_t count;
>> +       struct semaphore enter_turnstile;
>> +       struct semaphore exit_turnstile;
>> +};
>> +
>> +static inline void task_barrier_signal_turnstile(struct semaphore *turnstile,
>> +                                                unsigned int n)
>> +{
>> +       int i;
>> +
>> +       for (i = 0 ; i < n; i++)
>> +               up(turnstile);
>> +}
>> +
>> +static inline void task_barrier_init(struct task_barrier *tb)
>> +{
>> +       tb->n = 0;
>> +       atomic_set(&tb->count, 0);
>> +       sema_init(&tb->enter_turnstile, 0);
>> +       sema_init(&tb->exit_turnstile, 0);
>> +}
>> +
>> +static inline void task_barrier_add_task(struct task_barrier *tb)
>> +{
>> +       tb->n++;
>> +}
>> +
>> +static inline void task_barrier_rem_task(struct task_barrier *tb)
>> +{
>> +       tb->n--;
>> +}
>> +
>> +/*
>> + * Lines up all the threads BEFORE the critical point.
>> + *
>> + * When all thread passed this code the entry barrier is back to locked state.
>> + */
>> +static inline void task_barrier_enter(struct task_barrier *tb)
>> +{
>> +       if (atomic_inc_return(&tb->count) == tb->n)
>> +               task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
>> +
>> +       down(&tb->enter_turnstile);
>> +}
>> +
>> +/*
>> + * Lines up all the threads AFTER the critical point.
>> + *
>> + * This function is used to avoid any one thread running ahead of the reset if
>> + * the barrier is used in a loop (repeatedly) .
>> + */
>> +static inline void task_barrier_exit(struct task_barrier *tb)
>> +{
>> +       if (atomic_dec_return(&tb->count) == 0)
>> +               task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
>> +
>> +       down(&tb->exit_turnstile);
>> +}
>> +
>> +static inline void task_barrier_full(struct task_barrier *tb)
>> +{
>> +       task_barrier_enter(tb);
>> +       task_barrier_exit(tb);
>> +}
>> +
>> +#endif
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

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Re: [PATCH 2/5] drm: Add Reusable task barrier.

[Christian König]

Am 12.12.19 um 09:24 schrieb Christian König:
> Am 11.12.19 um 21:19 schrieb Alex Deucher:
>> On Wed, Dec 11, 2019 at 3:07 PM Andrey Grodzovsky
>> <andrey.grodzovsky@amd.com> wrote:
>>> It is used to synchronize N threads at a rendevouz point before 
>>> execution
>>> of critical code that has to be started by all the threads at 
>>> approximatly
>>> the same time.
>>>
>>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
>> You should resend to dri-devel since this task barrier is being added
>> to common code.
>
> Additional to that this whole thing has the potential to raise lockdep 
> warnings and if I'm not completely mistaken doesn't even work correctly.
>
> See Linux kernel semaphores don't allow negative values (the count 
> field in struct semaphore is unsigned).

Ok, forget what I've wrote. That indeed seems to be supported, some 
other drivers are already using semaphores the same way.

Regards,
Christian.

>
> Regards,
> Christian.
>
>>
>> Alex
>>
>>> ---
>>>   include/drm/task_barrier.h | 106 
>>> +++++++++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 106 insertions(+)
>>>   create mode 100644 include/drm/task_barrier.h
>>>
>>> diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
>>> new file mode 100644
>>> index 0000000..81fb0f7
>>> --- /dev/null
>>> +++ b/include/drm/task_barrier.h
>>> @@ -0,0 +1,106 @@
>>> +/*
>>> + * Copyright 2019 Advanced Micro Devices, Inc.
>>> + *
>>> + * Permission is hereby granted, free of charge, to any person 
>>> obtaining a
>>> + * copy of this software and associated documentation files (the 
>>> "Software"),
>>> + * to deal in the Software without restriction, including without 
>>> limitation
>>> + * the rights to use, copy, modify, merge, publish, distribute, 
>>> sublicense,
>>> + * and/or sell copies of the Software, and to permit persons to 
>>> whom the
>>> + * Software is furnished to do so, subject to the following 
>>> conditions:
>>> + *
>>> + * The above copyright notice and this permission notice shall be 
>>> included in
>>> + * all copies or substantial portions of the Software.
>>> + *
>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
>>> EXPRESS OR
>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
>>> MERCHANTABILITY,
>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO 
>>> EVENT SHALL
>>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, 
>>> DAMAGES OR
>>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
>>> OTHERWISE,
>>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
>>> USE OR
>>> + * OTHER DEALINGS IN THE SOFTWARE.
>>> + *
>>> + */
>>> +#include <linux/semaphore.h>
>>> +#include <linux/atomic.h>
>>> +
>>> +/*
>>> + * Reusable 2 PHASE task barrier (randevouz point) implementation 
>>> for N tasks.
>>> + * Based on the Little book of sempahores - 
>>> https://greenteapress.com/wp/semaphores/
>>> + */
>>> +
>>> +
>>> +
>>> +#ifndef DRM_TASK_BARRIER_H_
>>> +#define DRM_TASK_BARRIER_H_
>>> +
>>> +/*
>>> + * Represents an instance of a task barrier.
>>> + */
>>> +struct task_barrier {
>>> +       unsigned int n;
>>> +       atomic_t count;
>>> +       struct semaphore enter_turnstile;
>>> +       struct semaphore exit_turnstile;
>>> +};
>>> +
>>> +static inline void task_barrier_signal_turnstile(struct semaphore 
>>> *turnstile,
>>> +                                                unsigned int n)
>>> +{
>>> +       int i;
>>> +
>>> +       for (i = 0 ; i < n; i++)
>>> +               up(turnstile);
>>> +}
>>> +
>>> +static inline void task_barrier_init(struct task_barrier *tb)
>>> +{
>>> +       tb->n = 0;
>>> +       atomic_set(&tb->count, 0);
>>> +       sema_init(&tb->enter_turnstile, 0);
>>> +       sema_init(&tb->exit_turnstile, 0);
>>> +}
>>> +
>>> +static inline void task_barrier_add_task(struct task_barrier *tb)
>>> +{
>>> +       tb->n++;
>>> +}
>>> +
>>> +static inline void task_barrier_rem_task(struct task_barrier *tb)
>>> +{
>>> +       tb->n--;
>>> +}
>>> +
>>> +/*
>>> + * Lines up all the threads BEFORE the critical point.
>>> + *
>>> + * When all thread passed this code the entry barrier is back to 
>>> locked state.
>>> + */
>>> +static inline void task_barrier_enter(struct task_barrier *tb)
>>> +{
>>> +       if (atomic_inc_return(&tb->count) == tb->n)
>>> + task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
>>> +
>>> +       down(&tb->enter_turnstile);
>>> +}
>>> +
>>> +/*
>>> + * Lines up all the threads AFTER the critical point.
>>> + *
>>> + * This function is used to avoid any one thread running ahead of 
>>> the reset if
>>> + * the barrier is used in a loop (repeatedly) .
>>> + */
>>> +static inline void task_barrier_exit(struct task_barrier *tb)
>>> +{
>>> +       if (atomic_dec_return(&tb->count) == 0)
>>> + task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
>>> +
>>> +       down(&tb->exit_turnstile);
>>> +}
>>> +
>>> +static inline void task_barrier_full(struct task_barrier *tb)
>>> +{
>>> +       task_barrier_enter(tb);
>>> +       task_barrier_exit(tb);
>>> +}
>>> +
>>> +#endif
>>> -- 
>>> 2.7.4
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>

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Re: [PATCH 2/5] drm: Add Reusable task barrier.

[Grodzovsky, Andrey]

[AMD Official Use Only - Internal Distribution Only]

______________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: 12 December 2019 03:31
To: Alex Deucher; Grodzovsky, Andrey
Cc: Deucher, Alexander; Ma, Le; Quan, Evan; amd-gfx list; Zhang, Hawking
Subject: Re: [PATCH 2/5] drm: Add Reusable task barrier.

Am 12.12.19 um 09:24 schrieb Christian König:
> Am 11.12.19 um 21:19 schrieb Alex Deucher:
>> On Wed, Dec 11, 2019 at 3:07 PM Andrey Grodzovsky
>> <andrey.grodzovsky@amd.com> wrote:
>>> It is used to synchronize N threads at a rendevouz point before
>>> execution
>>> of critical code that has to be started by all the threads at
>>> approximatly
>>> the same time.
>>>
>>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
>> You should resend to dri-devel since this task barrier is being added
>> to common code.
>
> Additional to that this whole thing has the potential to raise lockdep
> warnings and if I'm not completely mistaken doesn't even work correctly.

Can you give me a potential lockdep scenario ?

Andrey

>
> See Linux kernel semaphores don't allow negative values (the count
> field in struct semaphore is unsigned).

Ok, forget what I've wrote. That indeed seems to be supported, some
other drivers are already using semaphores the same way.

Regards,
Christian.

>
> Regards,
> Christian.
>
>>
>> Alex
>>
>>> ---
>>>   include/drm/task_barrier.h | 106
>>> +++++++++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 106 insertions(+)
>>>   create mode 100644 include/drm/task_barrier.h
>>>
>>> diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
>>> new file mode 100644
>>> index 0000000..81fb0f7
>>> --- /dev/null
>>> +++ b/include/drm/task_barrier.h
>>> @@ -0,0 +1,106 @@
>>> +/*
>>> + * Copyright 2019 Advanced Micro Devices, Inc.
>>> + *
>>> + * Permission is hereby granted, free of charge, to any person
>>> obtaining a
>>> + * copy of this software and associated documentation files (the
>>> "Software"),
>>> + * to deal in the Software without restriction, including without
>>> limitation
>>> + * the rights to use, copy, modify, merge, publish, distribute,
>>> sublicense,
>>> + * and/or sell copies of the Software, and to permit persons to
>>> whom the
>>> + * Software is furnished to do so, subject to the following
>>> conditions:
>>> + *
>>> + * The above copyright notice and this permission notice shall be
>>> included in
>>> + * all copies or substantial portions of the Software.
>>> + *
>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>> EXPRESS OR
>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>>> MERCHANTABILITY,
>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
>>> EVENT SHALL
>>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>>> DAMAGES OR
>>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
>>> OTHERWISE,
>>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
>>> USE OR
>>> + * OTHER DEALINGS IN THE SOFTWARE.
>>> + *
>>> + */
>>> +#include <linux/semaphore.h>
>>> +#include <linux/atomic.h>
>>> +
>>> +/*
>>> + * Reusable 2 PHASE task barrier (randevouz point) implementation
>>> for N tasks.
>>> + * Based on the Little book of sempahores -
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgreenteapress.com%2Fwp%2Fsemaphores%2F&amp;data=02%7C01%7Candrey.grodzovsky%40amd.com%7C96f8c28ae4bd43f2922208d77eddb60f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637117363029062995&amp;sdata=6xXZXyDIKmQM8ET5hPIZ%2FbJrOMQqK4oYw8dGYS1rxcY%3D&amp;reserved=0
>>> + */
>>> +
>>> +
>>> +
>>> +#ifndef DRM_TASK_BARRIER_H_
>>> +#define DRM_TASK_BARRIER_H_
>>> +
>>> +/*
>>> + * Represents an instance of a task barrier.
>>> + */
>>> +struct task_barrier {
>>> +       unsigned int n;
>>> +       atomic_t count;
>>> +       struct semaphore enter_turnstile;
>>> +       struct semaphore exit_turnstile;
>>> +};
>>> +
>>> +static inline void task_barrier_signal_turnstile(struct semaphore
>>> *turnstile,
>>> +                                                unsigned int n)
>>> +{
>>> +       int i;
>>> +
>>> +       for (i = 0 ; i < n; i++)
>>> +               up(turnstile);
>>> +}
>>> +
>>> +static inline void task_barrier_init(struct task_barrier *tb)
>>> +{
>>> +       tb->n = 0;
>>> +       atomic_set(&tb->count, 0);
>>> +       sema_init(&tb->enter_turnstile, 0);
>>> +       sema_init(&tb->exit_turnstile, 0);
>>> +}
>>> +
>>> +static inline void task_barrier_add_task(struct task_barrier *tb)
>>> +{
>>> +       tb->n++;
>>> +}
>>> +
>>> +static inline void task_barrier_rem_task(struct task_barrier *tb)
>>> +{
>>> +       tb->n--;
>>> +}
>>> +
>>> +/*
>>> + * Lines up all the threads BEFORE the critical point.
>>> + *
>>> + * When all thread passed this code the entry barrier is back to
>>> locked state.
>>> + */
>>> +static inline void task_barrier_enter(struct task_barrier *tb)
>>> +{
>>> +       if (atomic_inc_return(&tb->count) == tb->n)
>>> + task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
>>> +
>>> +       down(&tb->enter_turnstile);
>>> +}
>>> +
>>> +/*
>>> + * Lines up all the threads AFTER the critical point.
>>> + *
>>> + * This function is used to avoid any one thread running ahead of
>>> the reset if
>>> + * the barrier is used in a loop (repeatedly) .
>>> + */
>>> +static inline void task_barrier_exit(struct task_barrier *tb)
>>> +{
>>> +       if (atomic_dec_return(&tb->count) == 0)
>>> + task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
>>> +
>>> +       down(&tb->exit_turnstile);
>>> +}
>>> +
>>> +static inline void task_barrier_full(struct task_barrier *tb)
>>> +{
>>> +       task_barrier_enter(tb);
>>> +       task_barrier_exit(tb);
>>> +}
>>> +
>>> +#endif
>>> --
>>> 2.7.4
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7Candrey.grodzovsky%40amd.com%7C96f8c28ae4bd43f2922208d77eddb60f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637117363029067994&amp;sdata=4skEGGfYBmQco%2FaCXneWuR1p8l%2F0JS8IrLNx%2Bddzxos%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=02%7C01%7Candrey.grodzovsky%40amd.com%7C96f8c28ae4bd43f2922208d77eddb60f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637117363029067994&amp;sdata=4skEGGfYBmQco%2FaCXneWuR1p8l%2F0JS8IrLNx%2Bddzxos%3D&amp;reserved=0
>

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Re: [PATCH 2/5] drm: Add Reusable task barrier.

[Christian König]

Am 12.12.19 um 15:50 schrieb Grodzovsky, Andrey:
> [AMD Official Use Only - Internal Distribution Only]
>
> ______________________________________
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: 12 December 2019 03:31
> To: Alex Deucher; Grodzovsky, Andrey
> Cc: Deucher, Alexander; Ma, Le; Quan, Evan; amd-gfx list; Zhang, Hawking
> Subject: Re: [PATCH 2/5] drm: Add Reusable task barrier.
>
> Am 12.12.19 um 09:24 schrieb Christian König:
>> Am 11.12.19 um 21:19 schrieb Alex Deucher:
>>> On Wed, Dec 11, 2019 at 3:07 PM Andrey Grodzovsky
>>> <andrey.grodzovsky@amd.com> wrote:
>>>> It is used to synchronize N threads at a rendevouz point before
>>>> execution
>>>> of critical code that has to be started by all the threads at
>>>> approximatly
>>>> the same time.
>>>>
>>>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
>>> You should resend to dri-devel since this task barrier is being added
>>> to common code.
>> Additional to that this whole thing has the potential to raise lockdep
>> warnings and if I'm not completely mistaken doesn't even work correctly.
> Can you give me a potential lockdep scenario ?

Lockdep usually complains if a lock is released from another thread than 
where it was locked from.

In the code you let each thread do a down() and then the last one does 
multiple up() calls.

But I think that is only illegal for mutexes, but legal for semaphores.

Christian.

>
> Andrey
>
>> See Linux kernel semaphores don't allow negative values (the count
>> field in struct semaphore is unsigned).
> Ok, forget what I've wrote. That indeed seems to be supported, some
> other drivers are already using semaphores the same way.
>
> Regards,
> Christian.
>
>> Regards,
>> Christian.
>>
>>> Alex
>>>
>>>> ---
>>>>    include/drm/task_barrier.h | 106
>>>> +++++++++++++++++++++++++++++++++++++++++++++
>>>>    1 file changed, 106 insertions(+)
>>>>    create mode 100644 include/drm/task_barrier.h
>>>>
>>>> diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
>>>> new file mode 100644
>>>> index 0000000..81fb0f7
>>>> --- /dev/null
>>>> +++ b/include/drm/task_barrier.h
>>>> @@ -0,0 +1,106 @@
>>>> +/*
>>>> + * Copyright 2019 Advanced Micro Devices, Inc.
>>>> + *
>>>> + * Permission is hereby granted, free of charge, to any person
>>>> obtaining a
>>>> + * copy of this software and associated documentation files (the
>>>> "Software"),
>>>> + * to deal in the Software without restriction, including without
>>>> limitation
>>>> + * the rights to use, copy, modify, merge, publish, distribute,
>>>> sublicense,
>>>> + * and/or sell copies of the Software, and to permit persons to
>>>> whom the
>>>> + * Software is furnished to do so, subject to the following
>>>> conditions:
>>>> + *
>>>> + * The above copyright notice and this permission notice shall be
>>>> included in
>>>> + * all copies or substantial portions of the Software.
>>>> + *
>>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>>> EXPRESS OR
>>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>>>> MERCHANTABILITY,
>>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
>>>> EVENT SHALL
>>>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>>>> DAMAGES OR
>>>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
>>>> OTHERWISE,
>>>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
>>>> USE OR
>>>> + * OTHER DEALINGS IN THE SOFTWARE.
>>>> + *
>>>> + */
>>>> +#include <linux/semaphore.h>
>>>> +#include <linux/atomic.h>
>>>> +
>>>> +/*
>>>> + * Reusable 2 PHASE task barrier (randevouz point) implementation
>>>> for N tasks.
>>>> + * Based on the Little book of sempahores -
>>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgreenteapress.com%2Fwp%2Fsemaphores%2F&amp;data=02%7C01%7Candrey.grodzovsky%40amd.com%7C96f8c28ae4bd43f2922208d77eddb60f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637117363029062995&amp;sdata=6xXZXyDIKmQM8ET5hPIZ%2FbJrOMQqK4oYw8dGYS1rxcY%3D&amp;reserved=0
>>>> + */
>>>> +
>>>> +
>>>> +
>>>> +#ifndef DRM_TASK_BARRIER_H_
>>>> +#define DRM_TASK_BARRIER_H_
>>>> +
>>>> +/*
>>>> + * Represents an instance of a task barrier.
>>>> + */
>>>> +struct task_barrier {
>>>> +       unsigned int n;
>>>> +       atomic_t count;
>>>> +       struct semaphore enter_turnstile;
>>>> +       struct semaphore exit_turnstile;
>>>> +};
>>>> +
>>>> +static inline void task_barrier_signal_turnstile(struct semaphore
>>>> *turnstile,
>>>> +                                                unsigned int n)
>>>> +{
>>>> +       int i;
>>>> +
>>>> +       for (i = 0 ; i < n; i++)
>>>> +               up(turnstile);
>>>> +}
>>>> +
>>>> +static inline void task_barrier_init(struct task_barrier *tb)
>>>> +{
>>>> +       tb->n = 0;
>>>> +       atomic_set(&tb->count, 0);
>>>> +       sema_init(&tb->enter_turnstile, 0);
>>>> +       sema_init(&tb->exit_turnstile, 0);
>>>> +}
>>>> +
>>>> +static inline void task_barrier_add_task(struct task_barrier *tb)
>>>> +{
>>>> +       tb->n++;
>>>> +}
>>>> +
>>>> +static inline void task_barrier_rem_task(struct task_barrier *tb)
>>>> +{
>>>> +       tb->n--;
>>>> +}
>>>> +
>>>> +/*
>>>> + * Lines up all the threads BEFORE the critical point.
>>>> + *
>>>> + * When all thread passed this code the entry barrier is back to
>>>> locked state.
>>>> + */
>>>> +static inline void task_barrier_enter(struct task_barrier *tb)
>>>> +{
>>>> +       if (atomic_inc_return(&tb->count) == tb->n)
>>>> + task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
>>>> +
>>>> +       down(&tb->enter_turnstile);
>>>> +}
>>>> +
>>>> +/*
>>>> + * Lines up all the threads AFTER the critical point.
>>>> + *
>>>> + * This function is used to avoid any one thread running ahead of
>>>> the reset if
>>>> + * the barrier is used in a loop (repeatedly) .
>>>> + */
>>>> +static inline void task_barrier_exit(struct task_barrier *tb)
>>>> +{
>>>> +       if (atomic_dec_return(&tb->count) == 0)
>>>> + task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
>>>> +
>>>> +       down(&tb->exit_turnstile);
>>>> +}
>>>> +
>>>> +static inline void task_barrier_full(struct task_barrier *tb)
>>>> +{
>>>> +       task_barrier_enter(tb);
>>>> +       task_barrier_exit(tb);
>>>> +}
>>>> +
>>>> +#endif
>>>> --
>>>> 2.7.4
>>>>
>>>> _______________________________________________
>>>> amd-gfx mailing list
>>>> amd-gfx@lists.freedesktop.org
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Re: [PATCH 2/5] drm: Add Reusable task barrier.

[Andrey Grodzovsky]

On 12/12/19 10:09 AM, Christian König wrote:
> Am 12.12.19 um 15:50 schrieb Grodzovsky, Andrey:
>> [AMD Official Use Only - Internal Distribution Only]
>>
>> ______________________________________
>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Sent: 12 December 2019 03:31
>> To: Alex Deucher; Grodzovsky, Andrey
>> Cc: Deucher, Alexander; Ma, Le; Quan, Evan; amd-gfx list; Zhang, Hawking
>> Subject: Re: [PATCH 2/5] drm: Add Reusable task barrier.
>>
>> Am 12.12.19 um 09:24 schrieb Christian König:
>>> Am 11.12.19 um 21:19 schrieb Alex Deucher:
>>>> On Wed, Dec 11, 2019 at 3:07 PM Andrey Grodzovsky
>>>> <andrey.grodzovsky@amd.com> wrote:
>>>>> It is used to synchronize N threads at a rendevouz point before
>>>>> execution
>>>>> of critical code that has to be started by all the threads at
>>>>> approximatly
>>>>> the same time.
>>>>>
>>>>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
>>>> You should resend to dri-devel since this task barrier is being added
>>>> to common code.
>>> Additional to that this whole thing has the potential to raise lockdep
>>> warnings and if I'm not completely mistaken doesn't even work 
>>> correctly.
>> Can you give me a potential lockdep scenario ?
>
> Lockdep usually complains if a lock is released from another thread 
> than where it was locked from.
>
> In the code you let each thread do a down() and then the last one does 
> multiple up() calls.
>
> But I think that is only illegal for mutexes, but legal for semaphores.
>
> Christian.


Yes, from what I've read for semaphores it's ok to release (up) from a 
thread which didn't acquire (down)

Andrey


>
>>
>> Andrey
>>
>>> See Linux kernel semaphores don't allow negative values (the count
>>> field in struct semaphore is unsigned).
>> Ok, forget what I've wrote. That indeed seems to be supported, some
>> other drivers are already using semaphores the same way.
>>
>> Regards,
>> Christian.
>>
>>> Regards,
>>> Christian.
>>>
>>>> Alex
>>>>
>>>>> ---
>>>>>    include/drm/task_barrier.h | 106
>>>>> +++++++++++++++++++++++++++++++++++++++++++++
>>>>>    1 file changed, 106 insertions(+)
>>>>>    create mode 100644 include/drm/task_barrier.h
>>>>>
>>>>> diff --git a/include/drm/task_barrier.h b/include/drm/task_barrier.h
>>>>> new file mode 100644
>>>>> index 0000000..81fb0f7
>>>>> --- /dev/null
>>>>> +++ b/include/drm/task_barrier.h
>>>>> @@ -0,0 +1,106 @@
>>>>> +/*
>>>>> + * Copyright 2019 Advanced Micro Devices, Inc.
>>>>> + *
>>>>> + * Permission is hereby granted, free of charge, to any person
>>>>> obtaining a
>>>>> + * copy of this software and associated documentation files (the
>>>>> "Software"),
>>>>> + * to deal in the Software without restriction, including without
>>>>> limitation
>>>>> + * the rights to use, copy, modify, merge, publish, distribute,
>>>>> sublicense,
>>>>> + * and/or sell copies of the Software, and to permit persons to
>>>>> whom the
>>>>> + * Software is furnished to do so, subject to the following
>>>>> conditions:
>>>>> + *
>>>>> + * The above copyright notice and this permission notice shall be
>>>>> included in
>>>>> + * all copies or substantial portions of the Software.
>>>>> + *
>>>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>>>> EXPRESS OR
>>>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>>>>> MERCHANTABILITY,
>>>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO
>>>>> EVENT SHALL
>>>>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>>>>> DAMAGES OR
>>>>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
>>>>> OTHERWISE,
>>>>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
>>>>> USE OR
>>>>> + * OTHER DEALINGS IN THE SOFTWARE.
>>>>> + *
>>>>> + */
>>>>> +#include <linux/semaphore.h>
>>>>> +#include <linux/atomic.h>
>>>>> +
>>>>> +/*
>>>>> + * Reusable 2 PHASE task barrier (randevouz point) implementation
>>>>> for N tasks.
>>>>> + * Based on the Little book of sempahores -
>>>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgreenteapress.com%2Fwp%2Fsemaphores%2F&amp;data=02%7C01%7CAndrey.Grodzovsky%40amd.com%7Cdcd0f1a4cfa440d7b1ae08d77f154935%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637117601707306821&amp;sdata=X3%2Bg5XpFNrNbVka6WhB8TxjhOG1yuc%2Bk6%2FdcuO2Nlw0%3D&amp;reserved=0 
>>>>>
>>>>> + */
>>>>> +
>>>>> +
>>>>> +
>>>>> +#ifndef DRM_TASK_BARRIER_H_
>>>>> +#define DRM_TASK_BARRIER_H_
>>>>> +
>>>>> +/*
>>>>> + * Represents an instance of a task barrier.
>>>>> + */
>>>>> +struct task_barrier {
>>>>> +       unsigned int n;
>>>>> +       atomic_t count;
>>>>> +       struct semaphore enter_turnstile;
>>>>> +       struct semaphore exit_turnstile;
>>>>> +};
>>>>> +
>>>>> +static inline void task_barrier_signal_turnstile(struct semaphore
>>>>> *turnstile,
>>>>> +                                                unsigned int n)
>>>>> +{
>>>>> +       int i;
>>>>> +
>>>>> +       for (i = 0 ; i < n; i++)
>>>>> +               up(turnstile);
>>>>> +}
>>>>> +
>>>>> +static inline void task_barrier_init(struct task_barrier *tb)
>>>>> +{
>>>>> +       tb->n = 0;
>>>>> +       atomic_set(&tb->count, 0);
>>>>> +       sema_init(&tb->enter_turnstile, 0);
>>>>> +       sema_init(&tb->exit_turnstile, 0);
>>>>> +}
>>>>> +
>>>>> +static inline void task_barrier_add_task(struct task_barrier *tb)
>>>>> +{
>>>>> +       tb->n++;
>>>>> +}
>>>>> +
>>>>> +static inline void task_barrier_rem_task(struct task_barrier *tb)
>>>>> +{
>>>>> +       tb->n--;
>>>>> +}
>>>>> +
>>>>> +/*
>>>>> + * Lines up all the threads BEFORE the critical point.
>>>>> + *
>>>>> + * When all thread passed this code the entry barrier is back to
>>>>> locked state.
>>>>> + */
>>>>> +static inline void task_barrier_enter(struct task_barrier *tb)
>>>>> +{
>>>>> +       if (atomic_inc_return(&tb->count) == tb->n)
>>>>> + task_barrier_signal_turnstile(&tb->enter_turnstile, tb->n);
>>>>> +
>>>>> +       down(&tb->enter_turnstile);
>>>>> +}
>>>>> +
>>>>> +/*
>>>>> + * Lines up all the threads AFTER the critical point.
>>>>> + *
>>>>> + * This function is used to avoid any one thread running ahead of
>>>>> the reset if
>>>>> + * the barrier is used in a loop (repeatedly) .
>>>>> + */
>>>>> +static inline void task_barrier_exit(struct task_barrier *tb)
>>>>> +{
>>>>> +       if (atomic_dec_return(&tb->count) == 0)
>>>>> + task_barrier_signal_turnstile(&tb->exit_turnstile, tb->n);
>>>>> +
>>>>> +       down(&tb->exit_turnstile);
>>>>> +}
>>>>> +
>>>>> +static inline void task_barrier_full(struct task_barrier *tb)
>>>>> +{
>>>>> +       task_barrier_enter(tb);
>>>>> +       task_barrier_exit(tb);
>>>>> +}
>>>>> +
>>>>> +#endif
>>>>> -- 
>>>>> 2.7.4
>>>>>
>>>>> _______________________________________________
>>>>> amd-gfx mailing list
>>>>> amd-gfx@lists.freedesktop.org
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>>>>>
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>>>>
>
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