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* [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC
@ 2020-01-16 18:57 Hawking Zhang
  2020-01-16 18:57 ` [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi Hawking Zhang
  2020-01-16 19:24 ` [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC Alex Deucher
  0 siblings, 2 replies; 6+ messages in thread
From: Hawking Zhang @ 2020-01-16 18:57 UTC (permalink / raw)
  To: amd-gfx, Alex Deucher, Likun Gao; +Cc: Hawking Zhang

discovery tmr size should be ASIC specific setting, instead
of fixed 64KB for all ASICs.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  5 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 58 ++++++++++++++-------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 12 +++---
 3 files changed, 39 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 63eab0c..792fe16 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -756,7 +756,6 @@ struct amdgpu_device {
 	uint8_t				*bios;
 	uint32_t			bios_size;
 	struct amdgpu_bo		*stolen_vga_memory;
-	struct amdgpu_bo		*discovery_memory;
 	uint32_t			bios_scratch_reg_offset;
 	uint32_t			bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
 
@@ -908,7 +907,9 @@ struct amdgpu_device {
 	struct amdgpu_display_manager dm;
 
 	/* discovery */
-	uint8_t				*discovery;
+	uint8_t				*discovery_bin;
+	uint32_t			discovery_tmr_size;
+	struct amdgpu_bo		*discovery_memory;
 
 	/* mes */
 	bool                            enable_mes;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index f950927..800cc78 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -135,9 +135,10 @@ static int hw_id_map[MAX_HWIP] = {
 static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary)
 {
 	uint64_t vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
-	uint64_t pos = vram_size - DISCOVERY_TMR_SIZE;
+	uint64_t pos = vram_size - adev->discovery_tmr_size;
 
-	amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, DISCOVERY_TMR_SIZE, false);
+	amdgpu_device_vram_access(adev, pos, (uint32_t *)binary,
+				  adev->discovery_tmr_size, false);
 	return 0;
 }
 
@@ -169,17 +170,18 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
 	uint16_t checksum;
 	int r;
 
-	adev->discovery = kzalloc(DISCOVERY_TMR_SIZE, GFP_KERNEL);
-	if (!adev->discovery)
+	adev->discovery_tmr_size = DISCOVERY_TMR_SIZE;
+	adev->discovery_bin = kzalloc(adev->discovery_tmr_size, GFP_KERNEL);
+	if (!adev->discovery_bin)
 		return -ENOMEM;
 
-	r = amdgpu_discovery_read_binary(adev, adev->discovery);
+	r = amdgpu_discovery_read_binary(adev, adev->discovery_bin);
 	if (r) {
 		DRM_ERROR("failed to read ip discovery binary\n");
 		goto out;
 	}
 
-	bhdr = (struct binary_header *)adev->discovery;
+	bhdr = (struct binary_header *)adev->discovery_bin;
 
 	if (le32_to_cpu(bhdr->binary_signature) != BINARY_SIGNATURE) {
 		DRM_ERROR("invalid ip discovery binary signature\n");
@@ -192,7 +194,7 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
 	size = bhdr->binary_size - offset;
 	checksum = bhdr->binary_checksum;
 
-	if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
+	if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
 					      size, checksum)) {
 		DRM_ERROR("invalid ip discovery binary checksum\n");
 		r = -EINVAL;
@@ -202,7 +204,7 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
 	info = &bhdr->table_list[IP_DISCOVERY];
 	offset = le16_to_cpu(info->offset);
 	checksum = le16_to_cpu(info->checksum);
-	ihdr = (struct ip_discovery_header *)(adev->discovery + offset);
+	ihdr = (struct ip_discovery_header *)(adev->discovery_bin + offset);
 
 	if (le32_to_cpu(ihdr->signature) != DISCOVERY_TABLE_SIGNATURE) {
 		DRM_ERROR("invalid ip discovery data table signature\n");
@@ -210,7 +212,7 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
 		goto out;
 	}
 
-	if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
+	if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
 					      ihdr->size, checksum)) {
 		DRM_ERROR("invalid ip discovery data table checksum\n");
 		r = -EINVAL;
@@ -220,9 +222,9 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
 	info = &bhdr->table_list[GC];
 	offset = le16_to_cpu(info->offset);
 	checksum = le16_to_cpu(info->checksum);
-	ghdr = (struct gpu_info_header *)(adev->discovery + offset);
+	ghdr = (struct gpu_info_header *)(adev->discovery_bin + offset);
 
-	if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
+	if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
 				              ghdr->size, checksum)) {
 		DRM_ERROR("invalid gc data table checksum\n");
 		r = -EINVAL;
@@ -232,16 +234,16 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
 	return 0;
 
 out:
-	kfree(adev->discovery);
-	adev->discovery = NULL;
+	kfree(adev->discovery_bin);
+	adev->discovery_bin = NULL;
 
 	return r;
 }
 
 void amdgpu_discovery_fini(struct amdgpu_device *adev)
 {
-	kfree(adev->discovery);
-	adev->discovery = NULL;
+	kfree(adev->discovery_bin);
+	adev->discovery_bin = NULL;
 }
 
 int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
@@ -258,13 +260,13 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
 	int hw_ip;
 	int i, j, k;
 
-	if (!adev->discovery) {
+	if (!adev->discovery_bin) {
 		DRM_ERROR("ip discovery uninitialized\n");
 		return -EINVAL;
 	}
 
-	bhdr = (struct binary_header *)adev->discovery;
-	ihdr = (struct ip_discovery_header *)(adev->discovery +
+	bhdr = (struct binary_header *)adev->discovery_bin;
+	ihdr = (struct ip_discovery_header *)(adev->discovery_bin +
 			le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
 	num_dies = le16_to_cpu(ihdr->num_dies);
 
@@ -272,7 +274,7 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
 
 	for (i = 0; i < num_dies; i++) {
 		die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
-		dhdr = (struct die_header *)(adev->discovery + die_offset);
+		dhdr = (struct die_header *)(adev->discovery_bin + die_offset);
 		num_ips = le16_to_cpu(dhdr->num_ips);
 		ip_offset = die_offset + sizeof(*dhdr);
 
@@ -286,7 +288,7 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
 				le16_to_cpu(dhdr->die_id), num_ips);
 
 		for (j = 0; j < num_ips; j++) {
-			ip = (struct ip *)(adev->discovery + ip_offset);
+			ip = (struct ip *)(adev->discovery_bin + ip_offset);
 			num_base_address = ip->num_base_address;
 
 			DRM_DEBUG("%s(%d) #%d v%d.%d.%d:\n",
@@ -335,24 +337,24 @@ int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id,
 	uint16_t num_ips;
 	int i, j;
 
-	if (!adev->discovery) {
+	if (!adev->discovery_bin) {
 		DRM_ERROR("ip discovery uninitialized\n");
 		return -EINVAL;
 	}
 
-	bhdr = (struct binary_header *)adev->discovery;
-	ihdr = (struct ip_discovery_header *)(adev->discovery +
+	bhdr = (struct binary_header *)adev->discovery_bin;
+	ihdr = (struct ip_discovery_header *)(adev->discovery_bin +
 			le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
 	num_dies = le16_to_cpu(ihdr->num_dies);
 
 	for (i = 0; i < num_dies; i++) {
 		die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
-		dhdr = (struct die_header *)(adev->discovery + die_offset);
+		dhdr = (struct die_header *)(adev->discovery_bin + die_offset);
 		num_ips = le16_to_cpu(dhdr->num_ips);
 		ip_offset = die_offset + sizeof(*dhdr);
 
 		for (j = 0; j < num_ips; j++) {
-			ip = (struct ip *)(adev->discovery + ip_offset);
+			ip = (struct ip *)(adev->discovery_bin + ip_offset);
 
 			if (le16_to_cpu(ip->hw_id) == hw_id) {
 				if (major)
@@ -375,13 +377,13 @@ int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev)
 	struct binary_header *bhdr;
 	struct gc_info_v1_0 *gc_info;
 
-	if (!adev->discovery) {
+	if (!adev->discovery_bin) {
 		DRM_ERROR("ip discovery uninitialized\n");
 		return -EINVAL;
 	}
 
-	bhdr = (struct binary_header *)adev->discovery;
-	gc_info = (struct gc_info_v1_0 *)(adev->discovery +
+	bhdr = (struct binary_header *)adev->discovery_bin;
+	gc_info = (struct gc_info_v1_0 *)(adev->discovery_bin +
 			le16_to_cpu(bhdr->table_list[GC].offset));
 
 	adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->gc_num_se);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index ae1b00d..967f6d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1819,15 +1819,15 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 		return r;
 
 	/*
-	 * reserve one TMR (64K) memory at the top of VRAM which holds
+	 * reserve TMR memory at the top of VRAM which holds
 	 * IP Discovery data and is protected by PSP.
 	 */
 	r = amdgpu_bo_create_kernel_at(adev,
-				       adev->gmc.real_vram_size - DISCOVERY_TMR_SIZE,
-				       DISCOVERY_TMR_SIZE,
-				       AMDGPU_GEM_DOMAIN_VRAM,
-				       &adev->discovery_memory,
-				       NULL);
+			adev->gmc.real_vram_size - adev->discovery_tmr_size,
+			adev->discovery_tmr_size,
+			AMDGPU_GEM_DOMAIN_VRAM,
+			&adev->discovery_memory,
+			NULL);
 	if (r)
 		return r;
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi
  2020-01-16 18:57 [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC Hawking Zhang
@ 2020-01-16 18:57 ` Hawking Zhang
  2020-01-17  2:42   ` Cui, Flora
  2020-01-17  2:55   ` Yuan, Xiaojie
  2020-01-16 19:24 ` [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC Alex Deucher
  1 sibling, 2 replies; 6+ messages in thread
From: Hawking Zhang @ 2020-01-16 18:57 UTC (permalink / raw)
  To: amd-gfx, Alex Deucher, Likun Gao; +Cc: Hawking Zhang

IP discovery is only supported in Navi series and onwards.
There is no need to reserve a portion of vram as discovery
tmr region for pre-Navi adapters.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 967f6d0..f21fd8fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1822,14 +1822,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 	 * reserve TMR memory at the top of VRAM which holds
 	 * IP Discovery data and is protected by PSP.
 	 */
-	r = amdgpu_bo_create_kernel_at(adev,
+	if (adev->discovery_tmr_size > 0) {
+		r = amdgpu_bo_create_kernel_at(adev,
 			adev->gmc.real_vram_size - adev->discovery_tmr_size,
 			adev->discovery_tmr_size,
 			AMDGPU_GEM_DOMAIN_VRAM,
 			&adev->discovery_memory,
 			NULL);
-	if (r)
-		return r;
+		if (r)
+			return r;
+	}
 
 	DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
 		 (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC
  2020-01-16 18:57 [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC Hawking Zhang
  2020-01-16 18:57 ` [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi Hawking Zhang
@ 2020-01-16 19:24 ` Alex Deucher
  1 sibling, 0 replies; 6+ messages in thread
From: Alex Deucher @ 2020-01-16 19:24 UTC (permalink / raw)
  To: Hawking Zhang; +Cc: Alex Deucher, Likun Gao, amd-gfx list

On Thu, Jan 16, 2020 at 1:57 PM Hawking Zhang <Hawking.Zhang@amd.com> wrote:
>
> discovery tmr size should be ASIC specific setting, instead
> of fixed 64KB for all ASICs.
>
> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  5 ++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 58 ++++++++++++++-------------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 12 +++---
>  3 files changed, 39 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 63eab0c..792fe16 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -756,7 +756,6 @@ struct amdgpu_device {
>         uint8_t                         *bios;
>         uint32_t                        bios_size;
>         struct amdgpu_bo                *stolen_vga_memory;
> -       struct amdgpu_bo                *discovery_memory;
>         uint32_t                        bios_scratch_reg_offset;
>         uint32_t                        bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
>
> @@ -908,7 +907,9 @@ struct amdgpu_device {
>         struct amdgpu_display_manager dm;
>
>         /* discovery */
> -       uint8_t                         *discovery;
> +       uint8_t                         *discovery_bin;
> +       uint32_t                        discovery_tmr_size;
> +       struct amdgpu_bo                *discovery_memory;
>
>         /* mes */
>         bool                            enable_mes;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> index f950927..800cc78 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> @@ -135,9 +135,10 @@ static int hw_id_map[MAX_HWIP] = {
>  static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary)
>  {
>         uint64_t vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
> -       uint64_t pos = vram_size - DISCOVERY_TMR_SIZE;
> +       uint64_t pos = vram_size - adev->discovery_tmr_size;
>
> -       amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, DISCOVERY_TMR_SIZE, false);
> +       amdgpu_device_vram_access(adev, pos, (uint32_t *)binary,
> +                                 adev->discovery_tmr_size, false);
>         return 0;
>  }
>
> @@ -169,17 +170,18 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
>         uint16_t checksum;
>         int r;
>
> -       adev->discovery = kzalloc(DISCOVERY_TMR_SIZE, GFP_KERNEL);
> -       if (!adev->discovery)
> +       adev->discovery_tmr_size = DISCOVERY_TMR_SIZE;
> +       adev->discovery_bin = kzalloc(adev->discovery_tmr_size, GFP_KERNEL);
> +       if (!adev->discovery_bin)
>                 return -ENOMEM;
>
> -       r = amdgpu_discovery_read_binary(adev, adev->discovery);
> +       r = amdgpu_discovery_read_binary(adev, adev->discovery_bin);
>         if (r) {
>                 DRM_ERROR("failed to read ip discovery binary\n");
>                 goto out;
>         }
>
> -       bhdr = (struct binary_header *)adev->discovery;
> +       bhdr = (struct binary_header *)adev->discovery_bin;
>
>         if (le32_to_cpu(bhdr->binary_signature) != BINARY_SIGNATURE) {
>                 DRM_ERROR("invalid ip discovery binary signature\n");
> @@ -192,7 +194,7 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
>         size = bhdr->binary_size - offset;
>         checksum = bhdr->binary_checksum;
>
> -       if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
> +       if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
>                                               size, checksum)) {
>                 DRM_ERROR("invalid ip discovery binary checksum\n");
>                 r = -EINVAL;
> @@ -202,7 +204,7 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
>         info = &bhdr->table_list[IP_DISCOVERY];
>         offset = le16_to_cpu(info->offset);
>         checksum = le16_to_cpu(info->checksum);
> -       ihdr = (struct ip_discovery_header *)(adev->discovery + offset);
> +       ihdr = (struct ip_discovery_header *)(adev->discovery_bin + offset);
>
>         if (le32_to_cpu(ihdr->signature) != DISCOVERY_TABLE_SIGNATURE) {
>                 DRM_ERROR("invalid ip discovery data table signature\n");
> @@ -210,7 +212,7 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
>                 goto out;
>         }
>
> -       if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
> +       if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
>                                               ihdr->size, checksum)) {
>                 DRM_ERROR("invalid ip discovery data table checksum\n");
>                 r = -EINVAL;
> @@ -220,9 +222,9 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
>         info = &bhdr->table_list[GC];
>         offset = le16_to_cpu(info->offset);
>         checksum = le16_to_cpu(info->checksum);
> -       ghdr = (struct gpu_info_header *)(adev->discovery + offset);
> +       ghdr = (struct gpu_info_header *)(adev->discovery_bin + offset);
>
> -       if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
> +       if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
>                                               ghdr->size, checksum)) {
>                 DRM_ERROR("invalid gc data table checksum\n");
>                 r = -EINVAL;
> @@ -232,16 +234,16 @@ int amdgpu_discovery_init(struct amdgpu_device *adev)
>         return 0;
>
>  out:
> -       kfree(adev->discovery);
> -       adev->discovery = NULL;
> +       kfree(adev->discovery_bin);
> +       adev->discovery_bin = NULL;
>
>         return r;
>  }
>
>  void amdgpu_discovery_fini(struct amdgpu_device *adev)
>  {
> -       kfree(adev->discovery);
> -       adev->discovery = NULL;
> +       kfree(adev->discovery_bin);
> +       adev->discovery_bin = NULL;
>  }
>
>  int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
> @@ -258,13 +260,13 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
>         int hw_ip;
>         int i, j, k;
>
> -       if (!adev->discovery) {
> +       if (!adev->discovery_bin) {
>                 DRM_ERROR("ip discovery uninitialized\n");
>                 return -EINVAL;
>         }
>
> -       bhdr = (struct binary_header *)adev->discovery;
> -       ihdr = (struct ip_discovery_header *)(adev->discovery +
> +       bhdr = (struct binary_header *)adev->discovery_bin;
> +       ihdr = (struct ip_discovery_header *)(adev->discovery_bin +
>                         le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
>         num_dies = le16_to_cpu(ihdr->num_dies);
>
> @@ -272,7 +274,7 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
>
>         for (i = 0; i < num_dies; i++) {
>                 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
> -               dhdr = (struct die_header *)(adev->discovery + die_offset);
> +               dhdr = (struct die_header *)(adev->discovery_bin + die_offset);
>                 num_ips = le16_to_cpu(dhdr->num_ips);
>                 ip_offset = die_offset + sizeof(*dhdr);
>
> @@ -286,7 +288,7 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
>                                 le16_to_cpu(dhdr->die_id), num_ips);
>
>                 for (j = 0; j < num_ips; j++) {
> -                       ip = (struct ip *)(adev->discovery + ip_offset);
> +                       ip = (struct ip *)(adev->discovery_bin + ip_offset);
>                         num_base_address = ip->num_base_address;
>
>                         DRM_DEBUG("%s(%d) #%d v%d.%d.%d:\n",
> @@ -335,24 +337,24 @@ int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id,
>         uint16_t num_ips;
>         int i, j;
>
> -       if (!adev->discovery) {
> +       if (!adev->discovery_bin) {
>                 DRM_ERROR("ip discovery uninitialized\n");
>                 return -EINVAL;
>         }
>
> -       bhdr = (struct binary_header *)adev->discovery;
> -       ihdr = (struct ip_discovery_header *)(adev->discovery +
> +       bhdr = (struct binary_header *)adev->discovery_bin;
> +       ihdr = (struct ip_discovery_header *)(adev->discovery_bin +
>                         le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
>         num_dies = le16_to_cpu(ihdr->num_dies);
>
>         for (i = 0; i < num_dies; i++) {
>                 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
> -               dhdr = (struct die_header *)(adev->discovery + die_offset);
> +               dhdr = (struct die_header *)(adev->discovery_bin + die_offset);
>                 num_ips = le16_to_cpu(dhdr->num_ips);
>                 ip_offset = die_offset + sizeof(*dhdr);
>
>                 for (j = 0; j < num_ips; j++) {
> -                       ip = (struct ip *)(adev->discovery + ip_offset);
> +                       ip = (struct ip *)(adev->discovery_bin + ip_offset);
>
>                         if (le16_to_cpu(ip->hw_id) == hw_id) {
>                                 if (major)
> @@ -375,13 +377,13 @@ int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev)
>         struct binary_header *bhdr;
>         struct gc_info_v1_0 *gc_info;
>
> -       if (!adev->discovery) {
> +       if (!adev->discovery_bin) {
>                 DRM_ERROR("ip discovery uninitialized\n");
>                 return -EINVAL;
>         }
>
> -       bhdr = (struct binary_header *)adev->discovery;
> -       gc_info = (struct gc_info_v1_0 *)(adev->discovery +
> +       bhdr = (struct binary_header *)adev->discovery_bin;
> +       gc_info = (struct gc_info_v1_0 *)(adev->discovery_bin +
>                         le16_to_cpu(bhdr->table_list[GC].offset));
>
>         adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->gc_num_se);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index ae1b00d..967f6d0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1819,15 +1819,15 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>                 return r;
>
>         /*
> -        * reserve one TMR (64K) memory at the top of VRAM which holds
> +        * reserve TMR memory at the top of VRAM which holds
>          * IP Discovery data and is protected by PSP.
>          */
>         r = amdgpu_bo_create_kernel_at(adev,
> -                                      adev->gmc.real_vram_size - DISCOVERY_TMR_SIZE,
> -                                      DISCOVERY_TMR_SIZE,
> -                                      AMDGPU_GEM_DOMAIN_VRAM,
> -                                      &adev->discovery_memory,
> -                                      NULL);
> +                       adev->gmc.real_vram_size - adev->discovery_tmr_size,
> +                       adev->discovery_tmr_size,
> +                       AMDGPU_GEM_DOMAIN_VRAM,
> +                       &adev->discovery_memory,
> +                       NULL);

The indentation looks wrong here.  With that fixed, the series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

>         if (r)
>                 return r;
>
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi
  2020-01-16 18:57 ` [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi Hawking Zhang
@ 2020-01-17  2:42   ` Cui, Flora
  2020-01-17 15:26     ` Zhang, Hawking
  2020-01-17  2:55   ` Yuan, Xiaojie
  1 sibling, 1 reply; 6+ messages in thread
From: Cui, Flora @ 2020-01-17  2:42 UTC (permalink / raw)
  To: amd-gfx

IMHO it's better to handle the size==0 case in amdgpu_bo_create_kernel_at().

在 1/17/2020 2:57 AM, Hawking Zhang 写道:
> IP discovery is only supported in Navi series and onwards.
> There is no need to reserve a portion of vram as discovery
> tmr region for pre-Navi adapters.
>
> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 967f6d0..f21fd8fa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1822,14 +1822,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>   	 * reserve TMR memory at the top of VRAM which holds
>   	 * IP Discovery data and is protected by PSP.
>   	 */
> -	r = amdgpu_bo_create_kernel_at(adev,
> +	if (adev->discovery_tmr_size > 0) {
> +		r = amdgpu_bo_create_kernel_at(adev,
>   			adev->gmc.real_vram_size - adev->discovery_tmr_size,
>   			adev->discovery_tmr_size,
>   			AMDGPU_GEM_DOMAIN_VRAM,
>   			&adev->discovery_memory,
>   			NULL);
> -	if (r)
> -		return r;
> +		if (r)
> +			return r;
> +	}
>   
>   	DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
>   		 (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
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^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi
  2020-01-16 18:57 ` [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi Hawking Zhang
  2020-01-17  2:42   ` Cui, Flora
@ 2020-01-17  2:55   ` Yuan, Xiaojie
  1 sibling, 0 replies; 6+ messages in thread
From: Yuan, Xiaojie @ 2020-01-17  2:55 UTC (permalink / raw)
  To: Zhang, Hawking, amd-gfx, Deucher, Alexander, Gao, Likun

[AMD Official Use Only - Internal Distribution Only]

Series is Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>

BR,
Xiaojie

________________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Hawking Zhang <Hawking.Zhang@amd.com>
Sent: Friday, January 17, 2020 2:57 AM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander; Gao, Likun
Cc: Zhang, Hawking
Subject: [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi

IP discovery is only supported in Navi series and onwards.
There is no need to reserve a portion of vram as discovery
tmr region for pre-Navi adapters.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 967f6d0..f21fd8fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1822,14 +1822,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
         * reserve TMR memory at the top of VRAM which holds
         * IP Discovery data and is protected by PSP.
         */
-       r = amdgpu_bo_create_kernel_at(adev,
+       if (adev->discovery_tmr_size > 0) {
+               r = amdgpu_bo_create_kernel_at(adev,
                        adev->gmc.real_vram_size - adev->discovery_tmr_size,
                        adev->discovery_tmr_size,
                        AMDGPU_GEM_DOMAIN_VRAM,
                        &adev->discovery_memory,
                        NULL);
-       if (r)
-               return r;
+               if (r)
+                       return r;
+       }

        DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
                 (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
--
2.7.4

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^ permalink raw reply related	[flat|nested] 6+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi
  2020-01-17  2:42   ` Cui, Flora
@ 2020-01-17 15:26     ` Zhang, Hawking
  0 siblings, 0 replies; 6+ messages in thread
From: Zhang, Hawking @ 2020-01-17 15:26 UTC (permalink / raw)
  To: Cui, Flora, amd-gfx

[AMD Official Use Only - Internal Distribution Only]

That's a known separated issue. Eve it get fixed, we don’t need additional call in to any bo functions. So let's just create separated fix for that one. You want to send out the patch?

Regards,
Hawking

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Cui, Flora
Sent: Friday, January 17, 2020 10:43
To: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi

IMHO it's better to handle the size==0 case in amdgpu_bo_create_kernel_at().

在 1/17/2020 2:57 AM, Hawking Zhang 写道:
> IP discovery is only supported in Navi series and onwards.
> There is no need to reserve a portion of vram as discovery tmr region 
> for pre-Navi adapters.
>
> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 967f6d0..f21fd8fa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1822,14 +1822,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>   	 * reserve TMR memory at the top of VRAM which holds
>   	 * IP Discovery data and is protected by PSP.
>   	 */
> -	r = amdgpu_bo_create_kernel_at(adev,
> +	if (adev->discovery_tmr_size > 0) {
> +		r = amdgpu_bo_create_kernel_at(adev,
>   			adev->gmc.real_vram_size - adev->discovery_tmr_size,
>   			adev->discovery_tmr_size,
>   			AMDGPU_GEM_DOMAIN_VRAM,
>   			&adev->discovery_memory,
>   			NULL);
> -	if (r)
> -		return r;
> +		if (r)
> +			return r;
> +	}
>   
>   	DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
>   		 (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
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^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-01-17 15:26 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-16 18:57 [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC Hawking Zhang
2020-01-16 18:57 ` [PATCH 2/2] drm/amdgpu: skip reservation of discovery tmr region in pre-Navi Hawking Zhang
2020-01-17  2:42   ` Cui, Flora
2020-01-17 15:26     ` Zhang, Hawking
2020-01-17  2:55   ` Yuan, Xiaojie
2020-01-16 19:24 ` [PATCH 1/2] drm/amdgpu: allow init discovery tmr region per ASIC Alex Deucher

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